From 489ba72c1ef9c6ceb1480be1550f235d9591d59a Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Fri, 7 Nov 2014 13:06:57 -0500 Subject: [PATCH] drm/radeon: fix sclk DS enablement Only enable it for levels 0 and 1. Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/ci_dpm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/radeon/ci_dpm.c b/drivers/gpu/drm/radeon/ci_dpm.c index 9d04e68e4f09..324e31d4b27d 100644 --- a/drivers/gpu/drm/radeon/ci_dpm.c +++ b/drivers/gpu/drm/radeon/ci_dpm.c @@ -2872,6 +2872,8 @@ static int ci_populate_all_graphic_levels(struct radeon_device *rdev) &pi->smc_state_table.GraphicsLevel[i]); if (ret) return ret; + if (i > 1) + pi->smc_state_table.GraphicsLevel[i].DeepSleepDivId = 0; if (i == (dpm_table->sclk_table.count - 1)) pi->smc_state_table.GraphicsLevel[i].DisplayWatermark = PPSMC_DISPLAY_WATERMARK_HIGH; -- 2.20.1