From 470dd70cad61b2a2f7e62d5a20bfa139c9aee05d Mon Sep 17 00:00:00 2001 From: Cho KyongHo Date: Fri, 15 Sep 2017 20:14:16 +0900 Subject: [PATCH] [9610] arm64: dts: add System MMU device nodes to 9610 Change-Id: I910fd34892a22d0c06407c17fe23b3f805a5fe6f Signed-off-by: Janghyuck Kim --- .../boot/dts/exynos/exynos9610-sysmmu.dtsi | 197 ++++++++++++++++++ arch/arm64/boot/dts/exynos/exynos9610.dtsi | 55 +++++ 2 files changed, 252 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/exynos9610-sysmmu.dtsi diff --git a/arch/arm64/boot/dts/exynos/exynos9610-sysmmu.dtsi b/arch/arm64/boot/dts/exynos/exynos9610-sysmmu.dtsi new file mode 100644 index 000000000000..a2c7c2f1919d --- /dev/null +++ b/arch/arm64/boot/dts/exynos/exynos9610-sysmmu.dtsi @@ -0,0 +1,197 @@ +/* + * SAMSUNG EXYNOS9610 SoC device tree source + * + * Copyright (c) 2018 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * SAMSUNG EXYNOS9610 SoC device nodes are listed in this file. + * EXYNOS9610 based board files can include this file and provide + * values for board specfic bindings. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include + +/ { + sysmmu_vipx1: sysmmu@10C50000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x0 0x10C50000 0x9000>; + interrupts = <0 127 0>, + <0 128 0>; + /* + clock-names = "aclk"; + clocks = <&clock GATE_SMMU_XXX>; + */ + port-name = "VIPX"; + sysmmu,secure-irq; + sysmmu,secure_base = <0x10C40000>; + /* + sysmmu,tlb_property = + */ + #iommu-cells = <0>; + }; + + sysmmu_vipx2: sysmmu@10E50000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x0 0x10E50000 0x9000>; + interrupts = <0 371 0>, + <0 372 0>; + /* + clock-names = "aclk"; + clocks = <&clock GATE_SMMU_XXX>; + */ + port-name = "VIPX"; + sysmmu,secure-irq; + sysmmu,secure_base = <0x10E40000>; + /* + sysmmu,tlb_property = + */ + #iommu-cells = <0>; + }; + + sysmmu_mfc0: sysmmu@12C70000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x0 0x12C70000 0x9000>; + interrupts = <0 181 0>, + <0 182 0>; + /* + clock-names = "aclk"; + clocks = <&clock GATE_SMMU_XXX>; + */ + port-name = "MFC0"; + sysmmu,secure-irq; + sysmmu,secure_base = <0x12C80000>; + /* + sysmmu,tlb_property = + */ + #iommu-cells = <0>; + }; + + sysmmu_mfc1: sysmmu@12C90000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x0 0x12C90000 0x9000>; + interrupts = <0 183 0>, + <0 184 0>; + /* + clock-names = "aclk"; + clocks = <&clock GATE_SMMU_XXX>; + */ + port-name = "MFC1"; + sysmmu,secure-irq; + sysmmu,secure_base = <0x12CA0000>; + /* + sysmmu,tlb_property = + */ + #iommu-cells = <0>; + }; + + sysmmu_g2d: sysmmu@12E70000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x0 0x12E70000 0x9000>; + interrupts = <0 168 0>, + <0 169 0>; + /* + clock-names = "aclk"; + clocks = <&clock GATE_SMMU_XXX>; + */ + port-name = "G2D,MSCL,JPEG"; + sysmmu,secure-irq; + sysmmu,secure_base = <0x12E80000>; + /* + sysmmu,tlb_property = + */ + #iommu-cells = <0>; + }; + + sysmmu_cam: sysmmu@14550000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x0 0x14550000 0x9000>; + interrupts = <0 341 0>, + <0 342 0>; + /* + clock-names = "aclk"; + clocks = <&clock GATE_SMMU_XXX>; + */ + port-name = "CAM"; + sysmmu,secure-irq; + sysmmu,secure_base = <0x14560000>; + /* + sysmmu,tlb_property = + */ + #iommu-cells = <0>; + }; + + sysmmu_isp0: sysmmu@14740000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x0 0x14740000 0x9000>; + interrupts = <0 351 0>, + <0 352 0>; + /* + clock-names = "aclk"; + clocks = <&clock GATE_SMMU_XXX>; + */ + port-name = "ISP/VRA/GDC"; + sysmmu,secure-irq; + sysmmu,secure_base = <0x14750000>; + /* + sysmmu,tlb_property = + */ + #iommu-cells = <0>; + }; + + sysmmu_isp1: sysmmu@14770000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x0 0x14770000 0x9000>; + interrupts = <0 355 0>, + <0 356 0>; + /* + clock-names = "aclk"; + clocks = <&clock GATE_SMMU_XXX>; + */ + port-name = "MCSC"; + sysmmu,secure-irq; + sysmmu,secure_base = <0x14780000>; + /* + sysmmu,tlb_property = + */ + #iommu-cells = <0>; + }; + + sysmmu_dpu: sysmmu@14820000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x0 0x14820000 0x9000>; + interrupts = <0 218 0>, + <0 217 0>; + /* + clock-names = "aclk"; + clocks = <&clock GATE_SMMU_XXX>; + */ + port-name = "DPU"; + sysmmu,secure-irq; + sysmmu,secure_base = <0x14830000>; + /* + sysmmu,tlb_property = + */ + #iommu-cells = <0>; + }; + + sysmmu_abox: sysmmu@14920000 { + compatible = "samsung,exynos-sysmmu"; + reg = <0x0 0x14920000 0x9000>; + interrupts = <0 216 0>; + /* + clock-names = "aclk"; + clocks = <&clock GATE_SMMU_XXX>; + */ + port-name = "ABox"; + /* + sysmmu,tlb_property = + */ + #iommu-cells = <0>; + }; +}; diff --git a/arch/arm64/boot/dts/exynos/exynos9610.dtsi b/arch/arm64/boot/dts/exynos/exynos9610.dtsi index 9805a229173f..bc3a9d746e5f 100644 --- a/arch/arm64/boot/dts/exynos/exynos9610.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos9610.dtsi @@ -17,6 +17,7 @@ #include #include "exynos9610-pinctrl.dtsi" #include +#include "exynos9610-sysmmu.dtsi" / { compatible = "samsung,armv8", "samsung,exynos9610"; @@ -1490,4 +1491,58 @@ clock-names = "pwm_pclk", "pwm_sclk"; status = "ok"; }; + + iommu-domain_dpu { + compatible = "samsung,exynos-iommu-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + domain-clients = <>; + }; + + iommu-domain_vipx { + compatible = "samsung,exynos-iommu-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + domain-clients = <>; + }; + + iommu-domain_abox { + compatible = "samsung,exynos-iommu-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + domain-clients = <>; + }; + + iommu-domain_isp { + compatible = "samsung,exynos-iommu-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + domain-clients = <>; + }; + + iommu-domain_mfc { + compatible = "samsung,exynos-iommu-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + domain-clients = <>; + }; + + iommu-domain_g2dmscljpeg { + compatible = "samsung,exynos-iommu-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + domain-clients = <>; + }; }; -- 2.20.1