From 4445befd34cdc883f05497b0a0b9dd3f4ebdf634 Mon Sep 17 00:00:00 2001 From: Jiun Yu Date: Thu, 17 May 2018 14:45:05 +0900 Subject: [PATCH] [9610] fbdev: dpu20: change base address setting function. Change-Id: I14463e7319d6f8f5bde163ded131b0dc99924cae Signed-off-by: Jiun Yu --- .../fbdev/exynos/dpu20/cal_9610/dpp_reg.c | 26 ++++++++++++------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/video/fbdev/exynos/dpu20/cal_9610/dpp_reg.c b/drivers/video/fbdev/exynos/dpu20/cal_9610/dpp_reg.c index 9fd7dbae1382..8600fe6bbf29 100644 --- a/drivers/video/fbdev/exynos/dpu20/cal_9610/dpp_reg.c +++ b/drivers/video/fbdev/exynos/dpu20/cal_9610/dpp_reg.c @@ -659,7 +659,7 @@ static void wb_mux_reg_set_uv_offset(u32 id, u32 off_x, u32 off_y) WB_UV_OFFSET_Y(off_y) | WB_UV_OFFSET_X(off_x), WB_UV_OFFSET_Y_MASK | WB_UV_OFFSET_X_MASK); } - +#if 0 void dma_reg_set_in_base_addr(u32 id, u32 addr_y, u32 addr_c) { dma_write(id, IDMA_IN_BASE_ADDR_Y, addr_y); @@ -726,20 +726,27 @@ void dpp_reg_set_buf_addr(u32 id, struct dpp_params_info *p) (void *)p->addr[2], (void *)p->addr[3]); } - +#endif /********** IDMA and ODMA combination CAL functions **********/ -#if 0 static void dma_reg_set_base_addr(u32 id, struct dpp_params_info *p, const unsigned long attr) { - dpp_info("%s, %d dpp[%d] attr[%lu]\n", __func__, __LINE__, id, attr); if (test_bit(DPP_ATTR_IDMA, &attr)) { - dpp_info("%s, %d dpp[%d] attr[%lu]\n", __func__, __LINE__, id, attr); dma_write(id, IDMA_IN_BASE_ADDR_Y, p->addr[0]); if (p->is_comp) - dma_write(id, IDMA_IN_BASE_ADDR_Y, p->addr[0]); + dma_write(id, IDMA_IN_BASE_ADDR_C, p->addr[0]); else - dma_write(id, IDMA_IN_BASE_ADDR_Y, p->addr[1]); + dma_write(id, IDMA_IN_BASE_ADDR_C, p->addr[1]); + if (p->is_4p) { + dma_write(id, IDMA_IN_BASE_ADDR_Y2, p->addr[2]); + dma_write(id, IDMA_IN_BASE_ADDR_C2, p->addr[3]); + dma_write_mask(id, IDMA_2BIT_STRIDE, + IDMA_LUMA_2B_STRIDE(p->y_2b_strd), + IDMA_LUMA_2B_STRIDE_MASK); + dma_write_mask(id, IDMA_2BIT_STRIDE, + IDMA_CHROMA_2B_STRIDE(p->c_2b_strd), + IDMA_CHROMA_2B_STRIDE_MASK); + } } else if (test_bit(DPP_ATTR_ODMA, &attr)) { dma_write(id, ODMA_IN_BASE_ADDR_Y, p->addr[0]); dma_write(id, ODMA_IN_BASE_ADDR_C, p->addr[1]); @@ -748,7 +755,7 @@ static void dma_reg_set_base_addr(u32 id, struct dpp_params_info *p, (void *)p->addr[0], (void *)p->addr[1], (void *)p->addr[2], (void *)p->addr[3]); } -#endif + /********** IDMA, ODMA, DPP and WB MUX combination CAL functions **********/ static void dma_dpp_reg_set_coordinates(u32 id, struct dpp_params_info *p, const unsigned long attr) @@ -1073,8 +1080,7 @@ void dpp_reg_configure_params(u32 id, struct dpp_params_info *p, idma_reg_set_rotation(id, p->rot); /* configure base address of IDMA and ODMA */ - dpp_reg_set_buf_addr(id, p); -// dma_reg_set_base_addr(id, p, attr); + dma_reg_set_base_addr(id, p, attr); if (test_bit(DPP_ATTR_BLOCK, &attr)) idma_reg_set_block_mode(id, p->is_block, p->block.x, p->block.y, -- 2.20.1