From 3c9e8fbada2b82c7dfe7e58786f52c692340e571 Mon Sep 17 00:00:00 2001 From: Chungwoo Park Date: Wed, 23 May 2018 13:26:55 +0900 Subject: [PATCH] [9610] arm64: Modify exynos9610 related dm header. Change-Id: I7f4a7e5c1c7d8001f097b397f1af433d7ba4ee90 Signed-off-by: Chungwoo Park --- .../dt-bindings/soc/samsung/exynos9610-dm.h | 15 ++++----- include/dt-bindings/soc/samsung/exynos9610.h | 32 ------------------- 2 files changed, 6 insertions(+), 41 deletions(-) delete mode 100644 include/dt-bindings/soc/samsung/exynos9610.h diff --git a/include/dt-bindings/soc/samsung/exynos9610-dm.h b/include/dt-bindings/soc/samsung/exynos9610-dm.h index c5bf419604c4..9a89e1f6ff30 100644 --- a/include/dt-bindings/soc/samsung/exynos9610-dm.h +++ b/include/dt-bindings/soc/samsung/exynos9610-dm.h @@ -8,8 +8,8 @@ * Device Tree binding constants for Exynos9810 */ -#ifndef _DT_BINDINGS_EXYNOS_9820_H -#define _DT_BINDINGS_EXYNOS_9820_H +#ifndef _DT_BINDINGS_EXYNOS_9610_H +#define _DT_BINDINGS_EXYNOS_9610_H /* NUMBER FOR DVFS MANAGER */ #define DM_CPU_CL0 0 @@ -17,13 +17,10 @@ #define DM_MIF 2 #define DM_INT 3 #define DM_INTCAM 4 -#define DM_FSYS0 5 -#define DM_CAM 6 -#define DM_DISP 7 -#define DM_AUD 8 -#define DM_IVA 9 -#define DM_SCORE 10 -#define DM_GPU 11 +#define DM_CAM 5 +#define DM_DISP 6 +#define DM_AUD 7 +#define DM_GPU 8 /* CONSTRAINT TYPE */ #define CONSTRAINT_MIN 0 diff --git a/include/dt-bindings/soc/samsung/exynos9610.h b/include/dt-bindings/soc/samsung/exynos9610.h deleted file mode 100644 index 4ee4e081adab..000000000000 --- a/include/dt-bindings/soc/samsung/exynos9610.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) 2017 Samsung Electronics Co., Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Device Tree binding constants for Exynos9810 -*/ - -#ifndef _DT_BINDINGS_EXYNOS_9610_H -#define _DT_BINDINGS_EXYNOS_9610_H - -/* NUMBER FOR DVFS MANAGER */ -#define DM_CPU_CL0 0 -#define DM_CPU_CL1 1 -#define DM_MIF 2 -#define DM_INT 3 -#define DM_INTCAM 4 -#define DM_FSYS0 5 -#define DM_CAM 6 -#define DM_DISP 7 -#define DM_AUD 8 -#define DM_IVA 9 -#define DM_SCORE 10 -#define DM_GPU 11 - -/* CONSTRAINT TYPE */ -#define CONSTRAINT_MIN 0 -#define CONSTRAINT_MAX 1 - -#endif /* _DT_BINDINGS_EXYNOS_9610_H */ -- 2.20.1