From 29641ce165e5f643b48988cb779c6ba97b647503 Mon Sep 17 00:00:00 2001 From: Kevin Corry Date: Tue, 11 Dec 2007 13:49:17 +0100 Subject: [PATCH] [POWERPC] perfmon2: make pm_interval register read/write The pm_interval register in the Cell PMU is read/write, but was implemented in the kernel as write-only. Previously, the written value was saved in a "shadow" copy so calls to cbe_read_pm() could return the value. Perfmon2 needs to be able to read the current values of pm_interval, so change cbe_read_pm() to read the actual register instead of the "shadow" copy. There is currently no code in the kernel that tries to read the pm_interval register with cbe_read_pm() (expecting to receive the "shadow" value), so this should not break any existing code. Signed-off-by: Kevin Corry Signed-off-by: Carl Love Signed-off-by: Arnd Bergmann --- arch/powerpc/platforms/cell/pmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/cell/pmu.c b/arch/powerpc/platforms/cell/pmu.c index 1ed303678887..99d688e88cbe 100644 --- a/arch/powerpc/platforms/cell/pmu.c +++ b/arch/powerpc/platforms/cell/pmu.c @@ -213,7 +213,7 @@ u32 cbe_read_pm(u32 cpu, enum pm_reg_name reg) break; case pm_interval: - READ_SHADOW_REG(val, pm_interval); + READ_MMIO_UPPER32(val, pm_interval); break; case pm_start_stop: -- 2.20.1