From 22e2c9092c90b9c14a146c853e62baa17fca2cda Mon Sep 17 00:00:00 2001 From: Hosung Kim Date: Sun, 9 Apr 2017 18:10:31 +0900 Subject: [PATCH] [COMMON] clocksource: exynos_mct: use only as clockevent This commit set exynos_mct to use clockevent only. Change-Id: Ie1a103f2a3b5b6283a868f542e1ab0337242d26f Signed-off-by: Hosung Kim --- drivers/clocksource/exynos_mct.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 7a244b681876..d828795a612c 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -194,6 +194,8 @@ static u64 exynos4_read_count_64(void) * * Returns the number of cycles in the global counter (lower 32 bits). */ + +#if !IS_ENABLED(CONFIG_ARM_ARCH_TIMER) static u32 notrace exynos4_read_count_32(void) { return readl_relaxed(reg_base + EXYNOS4_MCT_G_CNT_L); @@ -222,6 +224,7 @@ static u64 notrace exynos4_read_sched_clock(void) { return exynos4_read_count_32(); } +#endif #if defined(CONFIG_ARM) static struct delay_timer exynos4_delay_timer; @@ -243,12 +246,12 @@ static int __init exynos4_clocksource_init(void) exynos4_delay_timer.freq = clk_rate; register_current_timer_delay(&exynos4_delay_timer); #endif - +#if !IS_ENABLED(CONFIG_ARM_ARCH_TIMER) if (clocksource_register_hz(&mct_frc, clk_rate)) panic("%s: can't register clocksource\n", mct_frc.name); sched_clock_register(exynos4_read_sched_clock, 32, clk_rate); - +#endif return 0; } -- 2.20.1