From 22755f813e89fa7a59089513a4ec3a84e45da7e7 Mon Sep 17 00:00:00 2001 From: Youngmin Nam Date: Wed, 23 Dec 2015 18:26:12 +0900 Subject: [PATCH] i2c: exynos5: separate driver data structure to header file Change-Id: I4a7d24acff0ef7b3439a75691537c844392146e4 Signed-off-by: Youngmin Nam --- drivers/i2c/busses/i2c-exynos5.c | 45 +------------------------ drivers/i2c/busses/i2c-exynos5.h | 58 ++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+), 44 deletions(-) create mode 100644 drivers/i2c/busses/i2c-exynos5.h diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c index 35ebbecc6a8d..4378ecdc8dc0 100644 --- a/drivers/i2c/busses/i2c-exynos5.c +++ b/drivers/i2c/busses/i2c-exynos5.c @@ -28,6 +28,7 @@ #include #include #include "../../pinctrl/core.h" +#include "i2c-exynos5.h" #include #ifdef CONFIG_CPU_IDLE @@ -198,50 +199,6 @@ static LIST_HEAD(drvdata_list); #define EXYNOS5_HSI2C_RUNTIME_PM_DELAY (100) -struct exynos5_i2c { - struct list_head node; - struct i2c_adapter adap; - unsigned int need_hw_init; - unsigned int suspended:1; - - struct i2c_msg *msg; - struct completion msg_complete; - unsigned int msg_ptr; - unsigned int msg_len; - - unsigned int irq; - - void __iomem *regs; - struct clk *clk; - struct clk *rate_clk; - struct device *dev; - int state; - - /* - * Since the TRANS_DONE bit is cleared on read, and we may read it - * either during an IRQ or after a transaction, keep track of its - * state here. - */ - int trans_done; - - /* Controller operating frequency */ - unsigned int fs_clock; - unsigned int hs_clock; - - /* - * HSI2C Controller can operate in - * 1. High speed upto 3.4Mbps - * 2. Fast speed upto 1Mbps - */ - int speed_mode; - int operation_mode; - int bus_id; - int scl_clk_stretch; - int stop_after_trans; - unsigned int transfer_delay; - int idle_ip_index; -}; - static const struct of_device_id exynos5_i2c_match[] = { { .compatible = "samsung,exynos5-hsi2c" }, {}, diff --git a/drivers/i2c/busses/i2c-exynos5.h b/drivers/i2c/busses/i2c-exynos5.h new file mode 100644 index 000000000000..70a6bcb15185 --- /dev/null +++ b/drivers/i2c/busses/i2c-exynos5.h @@ -0,0 +1,58 @@ +/** + * i2c-exynos5.h - Samsung Exynos5 I2C Controller Driver Header file + * + * Copyright (C) 2015 Samsung Electronics Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __I2C_EXYNOS5_H +#define __I2C_EXYNOS5_H + +struct exynos5_i2c { + struct list_head node; + struct i2c_adapter adap; + unsigned int need_hw_init; + unsigned int suspended:1; + + struct i2c_msg *msg; + struct completion msg_complete; + unsigned int msg_ptr; + unsigned int msg_len; + + unsigned int irq; + + void __iomem *regs; + struct clk *clk; + struct clk *rate_clk; + struct device *dev; + int state; + + /* + * Since the TRANS_DONE bit is cleared on read, and we may read it + * either during an IRQ or after a transaction, keep track of its + * state here. + */ + int trans_done; + + /* Controller operating frequency */ + unsigned int fs_clock; + unsigned int hs_clock; + + /* + * HSI2C Controller can operate in + * 1. High speed upto 3.4Mbps + * 2. Fast speed upto 1Mbps + */ + int speed_mode; + int operation_mode; + int bus_id; + int scl_clk_stretch; + int stop_after_trans; + unsigned int transfer_delay; + + int idle_ip_index; +}; +#endif /*__I2C_EXYNOS5_H */ -- 2.20.1