From 1eca9e5d423b3ad7d3bd739607d5c11b93d3bd0b Mon Sep 17 00:00:00 2001 From: Sunmi Lee Date: Wed, 4 Jul 2018 11:40:06 +0900 Subject: [PATCH] [COMMON] fimc-is2: Modified the implementation of set_poly/post_scaler_coef To increase the readability, set_poly/post_scaler_coef function was changed. From the MCSC setfile version 0x14027432, scaler_coef should be controlled by setfile. This patch is preparation for applying new method. PR JIRA ID: CPR-33 Change-Id: I5a9812fd900bd37db8f9d4c26527cd221d996167 Signed-off-by: Sunmi Lee --- .../hardware/api/fimc-is-hw-api-mcscaler-v2.h | 5 +- .../api/fimc-is-hw-api-mcscaler-v5_0.c | 144 ++++++------------ 2 files changed, 51 insertions(+), 98 deletions(-) diff --git a/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v2.h b/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v2.h index 0768626d368e..58c4e1435714 100644 --- a/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v2.h +++ b/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v2.h @@ -107,9 +107,8 @@ void fimc_is_scaler_get_poly_dst_size(void __iomem *base_addr, u32 output_id, u3 void fimc_is_scaler_set_poly_scaling_ratio(void __iomem *base_addr, u32 output_id, u32 hratio, u32 vratio); void fimc_is_scaler_set_h_init_phase_offset(void __iomem *base_addr, u32 output_id, u32 h_offset); void fimc_is_scaler_set_v_init_phase_offset(void __iomem *base_addr, u32 output_id, u32 v_offset); -void fimc_is_scaler_set_poly_scaler_coef(void __iomem *base_addr, - u32 output_id, u32 hratio, u32 vratio, - enum exynos_sensor_position sensor_position); +void fimc_is_scaler_set_poly_scaler_coef(void __iomem *base_addr, u32 output_id, + u32 hratio, u32 vratio, enum exynos_sensor_position sensor_position); void fimc_is_scaler_set_poly_round_mode(void __iomem *base_addr, u32 output_id, u32 mode); void fimc_is_scaler_set_post_scaler_enable(void __iomem *base_addr, u32 output_id, u32 enable); diff --git a/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v5_0.c b/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v5_0.c index 0a1c9289df10..47c065a3ca14 100644 --- a/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v5_0.c +++ b/drivers/media/platform/exynos/fimc-is2/hardware/api/fimc-is-hw-api-mcscaler-v5_0.c @@ -1237,16 +1237,37 @@ void fimc_is_scaler_set_poly_scaler_v_coef(void __iomem *base_addr, u32 output_i } } -void fimc_is_scaler_set_poly_scaler_coef(void __iomem *base_addr, - u32 output_id, - u32 hratio, - u32 vratio, +u32 get_scaler_coef_ver1(u32 ratio, bool adjust_coef) +{ + u32 coef; + + if (ratio <= RATIO_X8_8) + coef = MCSC_COEFF_x8_8; + else if (ratio > RATIO_X8_8 && ratio <= RATIO_X7_8) + coef = MCSC_COEFF_x7_8; + else if (ratio > RATIO_X7_8 && ratio <= RATIO_X6_8) + coef = adjust_coef == true ? MCSC_COEFF_x7_8 : MCSC_COEFF_x6_8; + else if (ratio > RATIO_X6_8 && ratio <= RATIO_X5_8) + coef = adjust_coef == true ? MCSC_COEFF_x7_8 : MCSC_COEFF_x5_8; + else if (ratio > RATIO_X5_8 && ratio <= RATIO_X4_8) + coef = MCSC_COEFF_x4_8; + else if (ratio > RATIO_X4_8 && ratio <= RATIO_X3_8) + coef = MCSC_COEFF_x3_8; + else if (ratio > RATIO_X3_8 && ratio <= RATIO_X2_8) + coef = MCSC_COEFF_x2_8; + else + coef = MCSC_COEFF_x2_8; + + return coef; +} + +void fimc_is_scaler_set_poly_scaler_coef(void __iomem *base_addr, u32 output_id, + u32 hratio, u32 vratio, enum exynos_sensor_position sensor_position) { - u32 h_coef = 0; - u32 v_coef = 0; - u32 h_phase_offset = 0; /* this value equals 0 - scale-down operation */ - u32 v_phase_offset = 0; + u32 h_coef = 0, v_coef = 0; + /* this value equals 0 - scale-down operation */ + u32 h_phase_offset = 0, v_phase_offset = 0; bool adjust_coef = false; /* M/M dev team guided, x7/8 ~ x5/8 => x8/8 ~ x7/8 @@ -1256,47 +1277,14 @@ void fimc_is_scaler_set_poly_scaler_coef(void __iomem *base_addr, || (sensor_position == SENSOR_POSITION_REAR2)) adjust_coef = true; - /* adjust H coef */ - if (hratio <= RATIO_X8_8) { /* scale up case */ - h_coef = MCSC_COEFF_x8_8; - if (hratio != RATIO_X8_8) - h_phase_offset = hratio >> 1; - } else if (hratio > RATIO_X8_8 && hratio <= RATIO_X7_8) { - h_coef = MCSC_COEFF_x7_8; - } else if (hratio > RATIO_X7_8 && hratio <= RATIO_X6_8) { - h_coef = adjust_coef == true ? MCSC_COEFF_x7_8 : MCSC_COEFF_x6_8; - } else if (hratio > RATIO_X6_8 && hratio <= RATIO_X5_8) { - h_coef = adjust_coef == true ? MCSC_COEFF_x7_8 : MCSC_COEFF_x5_8; - } else if (hratio > RATIO_X5_8 && hratio <= RATIO_X4_8) { - h_coef = MCSC_COEFF_x4_8; - } else if (hratio > RATIO_X4_8 && hratio <= RATIO_X3_8) { - h_coef = MCSC_COEFF_x3_8; - } else if (hratio > RATIO_X3_8 && hratio <= RATIO_X2_8) { - h_coef = MCSC_COEFF_x2_8; - } else { - h_coef = MCSC_COEFF_x2_8; - } - - /* adjust V coef */ - if (vratio <= RATIO_X8_8) { - v_coef = MCSC_COEFF_x8_8; - if (vratio != RATIO_X8_8) - v_phase_offset = vratio >> 1; - } else if (vratio > RATIO_X8_8 && vratio <= RATIO_X7_8) { - v_coef = MCSC_COEFF_x7_8; - } else if (vratio > RATIO_X7_8 && vratio <= RATIO_X6_8) { - v_coef = adjust_coef == true ? MCSC_COEFF_x7_8 : MCSC_COEFF_x6_8; - } else if (vratio > RATIO_X6_8 && vratio <= RATIO_X5_8) { - v_coef = adjust_coef == true ? MCSC_COEFF_x7_8 : MCSC_COEFF_x5_8; - } else if (vratio > RATIO_X5_8 && vratio <= RATIO_X4_8) { - v_coef = MCSC_COEFF_x4_8; - } else if (vratio > RATIO_X4_8 && vratio <= RATIO_X3_8) { - v_coef = MCSC_COEFF_x3_8; - } else if (vratio > RATIO_X3_8 && vratio <= RATIO_X2_8) { - v_coef = MCSC_COEFF_x2_8; - } else { - v_coef = MCSC_COEFF_x2_8; - } + h_coef = get_scaler_coef_ver1(hratio, adjust_coef); + v_coef = get_scaler_coef_ver1(vratio, adjust_coef); + + /* scale up case */ + if (hratio < RATIO_X8_8) + h_phase_offset = hratio >> 1; + if (vratio < RATIO_X8_8) + v_phase_offset = vratio >> 1; fimc_is_scaler_set_h_init_phase_offset(base_addr, output_id, h_phase_offset); fimc_is_scaler_set_v_init_phase_offset(base_addr, output_id, v_phase_offset); @@ -1602,52 +1590,18 @@ void fimc_is_scaler_set_post_scaler_h_v_coef(void __iomem *base_addr, u32 output void fimc_is_scaler_set_post_scaler_coef(void __iomem *base_addr, u32 output_id, u32 hratio, u32 vratio) { - u32 h_coef = 0; - u32 v_coef = 0; - u32 h_phase_offset = 0; /* this value equals 0 - scale-down operation */ - u32 v_phase_offset = 0; - - /* adjust H coef */ - if (hratio <= RATIO_X8_8) { /* scale up case */ - h_coef = MCSC_COEFF_x8_8; - if (hratio != RATIO_X8_8) - h_phase_offset = hratio >> 1; - } else if (hratio > RATIO_X8_8 && hratio <= RATIO_X7_8) { - h_coef = MCSC_COEFF_x7_8; - } else if (hratio > RATIO_X7_8 && hratio <= RATIO_X6_8) { - h_coef = MCSC_COEFF_x6_8; - } else if (hratio > RATIO_X6_8 && hratio <= RATIO_X5_8) { - h_coef = MCSC_COEFF_x5_8; - } else if (hratio > RATIO_X5_8 && hratio <= RATIO_X4_8) { - h_coef = MCSC_COEFF_x4_8; - } else if (hratio > RATIO_X4_8 && hratio <= RATIO_X3_8) { - h_coef = MCSC_COEFF_x3_8; - } else if (hratio > RATIO_X3_8 && hratio <= RATIO_X2_8) { - h_coef = MCSC_COEFF_x2_8; - } else { - h_coef = MCSC_COEFF_x2_8; - } - - /* adjust V coef */ - if (vratio <= RATIO_X8_8) { - v_coef = MCSC_COEFF_x8_8; - if (vratio != RATIO_X8_8) - v_phase_offset = vratio >> 1; - } else if (vratio > RATIO_X8_8 && vratio <= RATIO_X7_8) { - v_coef = MCSC_COEFF_x7_8; - } else if (vratio > RATIO_X7_8 && vratio <= RATIO_X6_8) { - v_coef = MCSC_COEFF_x6_8; - } else if (vratio > RATIO_X6_8 && vratio <= RATIO_X5_8) { - v_coef = MCSC_COEFF_x5_8; - } else if (vratio > RATIO_X5_8 && vratio <= RATIO_X4_8) { - v_coef = MCSC_COEFF_x4_8; - } else if (vratio > RATIO_X4_8 && vratio <= RATIO_X3_8) { - v_coef = MCSC_COEFF_x3_8; - } else if (vratio > RATIO_X3_8 && vratio <= RATIO_X2_8) { - v_coef = MCSC_COEFF_x2_8; - } else { - v_coef = MCSC_COEFF_x2_8; - } + u32 h_coef = 0, v_coef = 0; + /* this value equals 0 - scale-down operation */ + u32 h_phase_offset = 0, v_phase_offset = 0; + + h_coef = get_scaler_coef_ver1(hratio, false); + v_coef = get_scaler_coef_ver1(vratio, false); + + /* scale up case */ + if (hratio < RATIO_X8_8) + h_phase_offset = hratio >> 1; + if (vratio < RATIO_X8_8) + v_phase_offset = vratio >> 1; fimc_is_scaler_set_post_h_init_phase_offset(base_addr, output_id, h_phase_offset); fimc_is_scaler_set_post_v_init_phase_offset(base_addr, output_id, v_phase_offset); -- 2.20.1