From 1df1b3618d95f7a6668c1a8e749e1be96a7e3fe1 Mon Sep 17 00:00:00 2001 From: Prarit Bhargava Date: Mon, 1 Jun 2015 09:36:04 -0400 Subject: [PATCH] Documentation, intel_pstate: Improve legacy mode internal governors description The current documentation is incomplete wrt the intel_pstate legacy internal governors. The confusion comes from the general cpufreq governors which also use the names performance and powersave. This patch better differentiates between the two sets of governors and gives an explanation of how the internal P-state governors behave differently from one another. Also fix two minor typos. Cc: Prarit Bhargava Cc: "Rafael J. Wysocki" Cc: Kristen Carlson Accardi Cc: Dirk Brandewie Cc: x86@kernel.org Acked-by: Viresh Kumar Signed-off-by: Prarit Bhargava Signed-off-by: Jonathan Corbet --- Documentation/cpu-freq/governors.txt | 2 +- Documentation/cpu-freq/intel-pstate.txt | 21 +++++++++++---------- 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/Documentation/cpu-freq/governors.txt b/Documentation/cpu-freq/governors.txt index 77ec21574fb1..c15aa75f5227 100644 --- a/Documentation/cpu-freq/governors.txt +++ b/Documentation/cpu-freq/governors.txt @@ -36,7 +36,7 @@ Contents: 1. What Is A CPUFreq Governor? ============================== -Most cpufreq drivers (in fact, all except one, longrun) or even most +Most cpufreq drivers (except the intel_pstate and longrun) or even most cpu frequency scaling algorithms only offer the CPU to be set to one frequency. In order to offer dynamic frequency scaling, the cpufreq core must be able to tell these drivers of a "target frequency". So diff --git a/Documentation/cpu-freq/intel-pstate.txt b/Documentation/cpu-freq/intel-pstate.txt index 655750743fb0..be8d4006bf76 100644 --- a/Documentation/cpu-freq/intel-pstate.txt +++ b/Documentation/cpu-freq/intel-pstate.txt @@ -3,24 +3,25 @@ Intel P-state driver This driver provides an interface to control the P state selection for SandyBridge+ Intel processors. The driver can operate two different -modes based on the processor model legacy and Hardware P state (HWP) +modes based on the processor model, legacy mode and Hardware P state (HWP) mode. -In legacy mode the driver implements a scaling driver with an internal -governor for Intel Core processors. The driver follows the same model -as the Transmeta scaling driver (longrun.c) and implements the -setpolicy() instead of target(). Scaling drivers that implement -setpolicy() are assumed to implement internal governors by the cpufreq -core. All the logic for selecting the current P state is contained -within the driver; no external governor is used by the cpufreq core. +In legacy mode, the Intel P-state implements two internal governors, +performance and powersave, that differ from the general cpufreq governors of +the same name (the general cpufreq governors implement target(), whereas the +internal Intel P-state governors implement setpolicy()). The internal +performance governor sets the max_perf_pct and min_perf_pct to 100; that is, +the governor selects the highest available P state to maximize the performance +of the core. The internal powersave governor selects the appropriate P state +based on the current load on the CPU. In HWP mode P state selection is implemented in the processor itself. The driver provides the interfaces between the cpufreq core and the processor to control P state selection based on user preferences and reporting frequency to the cpufreq core. In this mode the -internal governor code is disabled. +internal Intel P-state governor code is disabled. -In addtion to the interfaces provided by the cpufreq core for +In addition to the interfaces provided by the cpufreq core for controlling frequency the driver provides sysfs files for controlling P state selection. These files have been added to /sys/devices/system/cpu/intel_pstate/ -- 2.20.1