From 1c3c1e7996c1f99ab96b7d499d9d90072147909e Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Mon, 21 Jul 2014 15:29:27 -0700 Subject: [PATCH] net: bcmgenet: fix bcmgenet_wol_resume bcmgenet_wol_resume() will create an unbalanced clock state for the wol_clk clock pointer since everywhere else in the code, we always call clk_prepare_enable() and clk_disable_unprepare(). This function also calls init_umac() which is neither correct nor necessary since bcmgenet_resume() and bcmgenet_open() already does that. Finally calling bcmgenet_wol_resume() in bcmgenet_open() is not correct, since the interface would not have been able to put us in Wake-on-LAN mode if it was not UP before. Signed-off-by: Florian Fainelli Signed-off-by: David S. Miller --- drivers/net/ethernet/broadcom/genet/bcmgenet.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c index 319b94381d2e..1925ae1dc1e6 100644 --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c @@ -1965,14 +1965,8 @@ static void bcmgenet_set_hw_addr(struct bcmgenet_priv *priv, static int bcmgenet_wol_resume(struct bcmgenet_priv *priv) { - int ret; - /* From WOL-enabled suspend, switch to regular clock */ - clk_disable(priv->clk_wol); - /* init umac registers to synchronize s/w with h/w */ - ret = init_umac(priv); - if (ret) - return ret; + clk_disable_unprepare(priv->clk_wol); phy_init_hw(priv->phydev); /* Speed settings must be restored */ -- 2.20.1