From 193709c1c4d2543eac5d49428db732837ebcf61f Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Wed, 2 Mar 2016 17:22:15 +0200 Subject: [PATCH] drm/i915: Use g4x_get_aux_clock_divider() for VLV/CHV MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit With the hrawclk frequency cached in dev_priv, we can simply use g4x_get_aux_clock_divider() for VLV/CHV. v2: Rebase due to IS_VALLYVIEW vs. IS_CHERRYVIEW split Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula Link: http://patchwork.freedesktop.org/patch/msgid/1456932138-14004-4-git-send-email-ville.syrjala@linux.intel.com --- drivers/gpu/drm/i915/intel_dp.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index c9be57862613..ddf35bd51ab6 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -720,11 +720,6 @@ static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index) } } -static uint32_t vlv_get_aux_clock_divider(struct intel_dp *intel_dp, int index) -{ - return index ? 0 : 100; -} - static uint32_t skl_get_aux_clock_divider(struct intel_dp *intel_dp, int index) { /* @@ -5859,8 +5854,6 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, /* intel_dp vfuncs */ if (INTEL_INFO(dev)->gen >= 9) intel_dp->get_aux_clock_divider = skl_get_aux_clock_divider; - else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) - intel_dp->get_aux_clock_divider = vlv_get_aux_clock_divider; else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) intel_dp->get_aux_clock_divider = hsw_get_aux_clock_divider; else if (HAS_PCH_SPLIT(dev)) -- 2.20.1