From 147dbfbc54e460682eba3494370ea33e9fd5e9b0 Mon Sep 17 00:00:00 2001 From: David Zhang Date: Thu, 11 Jun 2015 02:28:56 +0800 Subject: [PATCH] drm/amdgpu: remove the VI hardware semaphore in ring sync MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: David Zhang Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 698ea6ce1185..70cc6bd48926 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -3783,11 +3783,10 @@ static bool gfx_v8_0_ring_emit_semaphore(struct amdgpu_ring *ring, unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL; if (ring->adev->asic_type == CHIP_TOPAZ || - ring->adev->asic_type == CHIP_TONGA) { - amdgpu_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1)); - amdgpu_ring_write(ring, lower_32_bits(addr)); - amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel); - } else { + ring->adev->asic_type == CHIP_TONGA) + /* we got a hw semaphore bug in VI TONGA, return false to switch back to sw fence wait */ + return false; + else { amdgpu_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 2)); amdgpu_ring_write(ring, lower_32_bits(addr)); amdgpu_ring_write(ring, upper_32_bits(addr)); -- 2.20.1