From 120305166aa8da2e8166d7ac1adce30194e6e24f Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Thu, 5 Mar 2015 21:19:42 +0200 Subject: [PATCH] drm/i915: Kill DRAIN_LATENCY_PRECISION_* defines MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Kill the silly DRAIN_LATENCY_PRECISION_* defines and just use the raw number instead. v2: Move the sprite 32/16 -> 16/8 preision multiplier change to another patch (Jesse) Reviewed-by: Jesse Barnes Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_reg.h | 4 ---- drivers/gpu/drm/i915/intel_pm.c | 12 ++++-------- 2 files changed, 4 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1e5ce1bf56b1..b0bcb044446d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4205,10 +4205,6 @@ enum skl_disp_power_wells { #define DSPFW_PLANEA_WM1_HI_MASK (1<<0) /* drain latency register values*/ -#define DRAIN_LATENCY_PRECISION_8 8 -#define DRAIN_LATENCY_PRECISION_16 16 -#define DRAIN_LATENCY_PRECISION_32 32 -#define DRAIN_LATENCY_PRECISION_64 64 #define VLV_DDL(pipe) (VLV_DISPLAY_BASE + 0x70050 + 4 * (pipe)) #define DDL_CURSOR_PRECISION_HIGH (1<<31) #define DDL_CURSOR_PRECISION_LOW (0<<31) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 94cc4b66bd89..cc3c2d9eb7f4 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -756,11 +756,9 @@ static bool vlv_compute_drain_latency(struct drm_crtc *crtc, entries = DIV_ROUND_UP(clock, 1000) * pixel_size; if (IS_CHERRYVIEW(dev)) - *prec_mult = (entries > 32) ? DRAIN_LATENCY_PRECISION_16 : - DRAIN_LATENCY_PRECISION_8; + *prec_mult = (entries > 32) ? 16 : 8; else - *prec_mult = (entries > 128) ? DRAIN_LATENCY_PRECISION_64 : - DRAIN_LATENCY_PRECISION_32; + *prec_mult = (entries > 128) ? 64 : 32; *drain_latency = (64 * (*prec_mult) * 4) / entries; if (*drain_latency > DRAIN_LATENCY_MASK) @@ -786,8 +784,7 @@ static void vlv_update_drain_latency(struct drm_crtc *crtc) int drain_latency; enum pipe pipe = intel_crtc->pipe; int plane_prec, prec_mult, plane_dl; - const int high_precision = IS_CHERRYVIEW(dev) ? - DRAIN_LATENCY_PRECISION_16 : DRAIN_LATENCY_PRECISION_64; + const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64; plane_dl = I915_READ(VLV_DDL(pipe)) & ~(DDL_PLANE_PRECISION_HIGH | DRAIN_LATENCY_MASK | DDL_CURSOR_PRECISION_HIGH | @@ -985,8 +982,7 @@ static void valleyview_update_sprite_wm(struct drm_plane *plane, int plane_prec; int sprite_dl; int prec_mult; - const int high_precision = IS_CHERRYVIEW(dev) ? - DRAIN_LATENCY_PRECISION_16 : DRAIN_LATENCY_PRECISION_64; + const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64; sprite_dl = I915_READ(VLV_DDL(pipe)) & ~(DDL_SPRITE_PRECISION_HIGH(sprite) | (DRAIN_LATENCY_MASK << DDL_SPRITE_SHIFT(sprite))); -- 2.20.1