From 0bd4b3461b6d4d562520222cdb70bc826f7a225f Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Thu, 13 Mar 2014 13:32:34 +0100 Subject: [PATCH] ARM: dts: berlin: add scu and chipctrl device nodes for BG2/BG2Q This adds scu and general purpose registers device nodes required for SMP on Berlin BG2 and BG2Q SoCs. The secondary CPUs will pick their jump address from general purpose (SW generic) register 1. Signed-off-by: Sebastian Hesselbarth Acked-by: Alexandre Belloni Acked-by: Antoine Tenart Acked-by: Jisheng Zhang Tested-by: Antoine Tenart --- arch/arm/boot/dts/berlin2.dtsi | 10 ++++++++++ arch/arm/boot/dts/berlin2q.dtsi | 10 ++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi index 56a1af2f1052..4d85312dc17a 100644 --- a/arch/arm/boot/dts/berlin2.dtsi +++ b/arch/arm/boot/dts/berlin2.dtsi @@ -72,6 +72,11 @@ cache-level = <2>; }; + scu: snoop-control-unit@ad0000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xad0000 0x58>; + }; + gic: interrupt-controller@ad1000 { compatible = "arm,cortex-a9-gic"; reg = <0xad1000 0x1000>, <0xad0100 0x0100>; @@ -176,6 +181,11 @@ }; }; + generic-regs@ea0184 { + compatible = "marvell,berlin-generic-regs", "syscon"; + reg = <0xea0184 0x10>; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 07452a7483fa..86d8a2c49f38 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -87,6 +87,11 @@ cache-level = <2>; }; + scu: snoop-control-unit@ad0000 { + compatible = "arm,cortex-a9-scu"; + reg = <0xad0000 0x58>; + }; + local-timer@ad0600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; @@ -183,6 +188,11 @@ }; }; + generic-regs@ea0110 { + compatible = "marvell,berlin-generic-regs", "syscon"; + reg = <0xea0110 0x10>; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>; -- 2.20.1