From 077ebed54fe66612f58b076628a72eca2be8df90 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 22 Dec 2008 17:11:02 +1000 Subject: [PATCH] drm/radeon: fix correctness of irq_enabled check for radeon. MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This check was introduced with the logic the wrong way around. Fixes regression: http://bugzilla.kernel.org/show_bug.cgi?id=12216 Tested-by: François Valenduc Signed-off-by: Dave Airlie --- drivers/gpu/drm/radeon/radeon_irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_irq.c b/drivers/gpu/drm/radeon/radeon_irq.c index 99be11418ac2..8289e16419a8 100644 --- a/drivers/gpu/drm/radeon/radeon_irq.c +++ b/drivers/gpu/drm/radeon/radeon_irq.c @@ -44,7 +44,7 @@ void radeon_irq_set_state(struct drm_device *dev, u32 mask, int state) else dev_priv->irq_enable_reg &= ~mask; - if (!dev->irq_enabled) + if (dev->irq_enabled) RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); } @@ -57,7 +57,7 @@ static void r500_vbl_irq_set_state(struct drm_device *dev, u32 mask, int state) else dev_priv->r500_disp_irq_reg &= ~mask; - if (!dev->irq_enabled) + if (dev->irq_enabled) RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); } -- 2.20.1