git.stricted.de - GitHub/LineageOS/android_kernel_motorola

1 /*

2 * pci.h

3 *

4 * PCI defines and function prototypes

7 *

8 * For more information, please consult the following manuals (look at

9 * http://www.pcisig.com/ for how to get them):

10 *

11 * PCI BIOS Specification

12 * PCI Local Bus Specification

13 * PCI to PCI Bridge Specification

14 * PCI System Design Guide

15 */

17 #ifndef LINUX_PCI_H

18 #define LINUX_PCI_H

20 /* Include the pci register defines */

21 #include <linux/pci_regs.h>

23 /*

24 * The PCI interface treats multi-function devices as independent

25 * devices. The slot/function address of each device is encoded

26 * in a single byte as follows:

27 *

28 * 7:3 = slot

29 * 2:0 = function

30 */

31 #define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))

32 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)

33 #define PCI_FUNC(devfn) ((devfn) & 0x07)

35 /* Ioctls for /proc/bus/pci/X/Y nodes. */

36 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)

37 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */

38 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */

39 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */

40 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */

42 #ifdef __KERNEL__

44 #include <linux/mod_devicetable.h>

46 #include <linux/types.h>

47 #include <linux/ioport.h>

48 #include <linux/list.h>

49 #include <linux/compiler.h>

50 #include <linux/errno.h>

51 #include <asm/atomic.h>

52 #include <linux/device.h>

54 /* Include the ID list */

55 #include <linux/pci_ids.h>

57 /* File state for mmap()s on /proc/bus/pci/X/Y */

58 enum pci_mmap_state {

59 pci_mmap_io,

60 pci_mmap_mem

61 };

63 /* This defines the direction arg to the DMA mapping routines. */

64 #define PCI_DMA_BIDIRECTIONAL 0

65 #define PCI_DMA_TODEVICE 1

66 #define PCI_DMA_FROMDEVICE 2

67 #define PCI_DMA_NONE 3

69 #define DEVICE_COUNT_COMPATIBLE 4

70 #define DEVICE_COUNT_RESOURCE 12

72 typedef int __bitwise pci_power_t;

74 #define PCI_D0 ((pci_power_t __force) 0)

75 #define PCI_D1 ((pci_power_t __force) 1)

76 #define PCI_D2 ((pci_power_t __force) 2)

77 #define PCI_D3hot ((pci_power_t __force) 3)

78 #define PCI_D3cold ((pci_power_t __force) 4)

79 #define PCI_UNKNOWN ((pci_power_t __force) 5)

80 #define PCI_POWER_ERROR ((pci_power_t __force) -1)

82 /** The pci_channel state describes connectivity between the CPU and

83 * the pci device. If some PCI bus between here and the pci device

84 * has crashed or locked up, this info is reflected here.

85 */

86 typedef unsigned int __bitwise pci_channel_state_t;

88 enum pci_channel_state {

89 /* I/O channel is in normal state */

90 pci_channel_io_normal = (__force pci_channel_state_t) 1,

92 /* I/O to channel is blocked */

93 pci_channel_io_frozen = (__force pci_channel_state_t) 2,

95 /* PCI card is dead */

96 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,

97 };

99 typedef unsigned int __bitwise pcie_reset_state_t;

100

101 enum pcie_reset_state {

102 /* Reset is NOT asserted (Use to deassert reset) */

103 pcie_deassert_reset = (__force pcie_reset_state_t) 1,

104

105 /* Use #PERST to reset PCI-E device */

106 pcie_warm_reset = (__force pcie_reset_state_t) 2,

107

108 /* Use PCI-E Hot Reset to reset device */

109 pcie_hot_reset = (__force pcie_reset_state_t) 3

110 };

111

112 typedef unsigned short __bitwise pci_bus_flags_t;

113 enum pci_bus_flags {

114 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,

115 };

116

117 struct pci_cap_saved_state {

118 struct hlist_node next;

119 char cap_nr;

120 u32 data[0];

121 };

122

123 /*

124 * The pci_dev structure is used to describe PCI devices.

125 */

126 struct pci_dev {

127 struct list_head global_list; /* node in list of all PCI devices */

128 struct list_head bus_list; /* node in per-bus list */

129 struct pci_bus *bus; /* bus this device is on */

130 struct pci_bus *subordinate; /* bus this device bridges to */

131

132 void *sysdata; /* hook for sys-specific extension */

133 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */

134

135 unsigned int devfn; /* encoded device & function index */

136 unsigned short vendor;

137 unsigned short device;

138 unsigned short subsystem_vendor;

139 unsigned short subsystem_device;

140 unsigned int class; /* 3 bytes: (base,sub,prog-if) */

141 u8 hdr_type; /* PCI header type (`multi' flag masked out) */

142 u8 rom_base_reg; /* which config register controls the ROM */

143 u8 pin; /* which interrupt pin this device uses */

144

145 struct pci_driver *driver; /* which driver has allocated this device */

146 u64 dma_mask; /* Mask of the bits of bus address this

147 device implements. Normally this is

148 0xffffffff. You only need to change

149 this if your device has broken DMA

150 or supports 64-bit transfers. */

151

152 pci_power_t current_state; /* Current operating state. In ACPI-speak,

153 this is D0-D3, D0 being fully functional,

154 and D3 being off. */

155

156 pci_channel_state_t error_state; /* current connectivity state */

157 struct device dev; /* Generic device interface */

158

159 /* device is compatible with these IDs */

160 unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];

161 unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];

162

163 int cfg_size; /* Size of configuration space */

164

165 /*

166 * Instead of touching interrupt line and base address registers

167 * directly, use the values stored here. They might be different!

168 */

169 unsigned int irq;

170 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */

171

172 /* These fields are used by common fixups */

173 unsigned int transparent:1; /* Transparent PCI bridge */

174 unsigned int multifunction:1;/* Part of multi-function device */

175 /* keep track of device state */

176 unsigned int is_busmaster:1; /* device is busmaster */

177 unsigned int no_msi:1; /* device may not use msi */

178 unsigned int no_d1d2:1; /* only allow d0 or d3 */

179 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */

180 unsigned int broken_parity_status:1; /* Device generates false positive parity */

181 unsigned int msi_enabled:1;

182 unsigned int msix_enabled:1;

183 unsigned int is_managed:1;

184 atomic_t enable_cnt; /* pci_enable_device has been called */

185

186 u32 saved_config_space[16]; /* config space saved at suspend time */

187 struct hlist_head saved_cap_space;

188 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */

189 int rom_attr_enabled; /* has display of the rom attribute been enabled? */

190 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */

191 #ifdef CONFIG_PCI_MSI

192 unsigned int first_msi_irq;

193 #endif

194 };

195

196 extern struct pci_dev *alloc_pci_dev(void);

197

198 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)

199 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)

200 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)

201 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)

202

203 static inline int pci_channel_offline(struct pci_dev *pdev)

204 {

205 return (pdev->error_state != pci_channel_io_normal);

206 }

207

208 static inline struct pci_cap_saved_state *pci_find_saved_cap(

209 struct pci_dev *pci_dev,char cap)

210 {

211 struct pci_cap_saved_state *tmp;

212 struct hlist_node *pos;

213

214 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {

215 if (tmp->cap_nr == cap)

216 return tmp;

217 }

218 return NULL;

219 }

220

221 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,

222 struct pci_cap_saved_state *new_cap)

223 {

224 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);

225 }

226

227 /*

228 * For PCI devices, the region numbers are assigned this way:

229 *

230 * 0-5 standard PCI regions

231 * 6 expansion ROM

232 * 7-10 bridges: address space assigned to buses behind the bridge

233 */

234

235 #define PCI_ROM_RESOURCE 6

236 #define PCI_BRIDGE_RESOURCES 7

237 #define PCI_NUM_RESOURCES 11

238

239 #ifndef PCI_BUS_NUM_RESOURCES

240 #define PCI_BUS_NUM_RESOURCES 8

241 #endif

242

243 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */

244

245 struct pci_bus {

246 struct list_head node; /* node in list of buses */

247 struct pci_bus *parent; /* parent bus this bridge is on */

248 struct list_head children; /* list of child buses */

249 struct list_head devices; /* list of devices on this bus */

250 struct pci_dev *self; /* bridge device as seen by parent */

251 struct resource *resource[PCI_BUS_NUM_RESOURCES];

252 /* address space routed to this bus */

253

254 struct pci_ops *ops; /* configuration access functions */

255 void *sysdata; /* hook for sys-specific extension */

256 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */

257

258 unsigned char number; /* bus number */

259 unsigned char primary; /* number of primary bridge */

260 unsigned char secondary; /* number of secondary bridge */

261 unsigned char subordinate; /* max number of subordinate buses */

262

263 char name[48];

264

265 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */

266 pci_bus_flags_t bus_flags; /* Inherited by child busses */

267 struct device *bridge;

268 struct class_device class_dev;

269 struct bin_attribute *legacy_io; /* legacy I/O for this bus */

270 struct bin_attribute *legacy_mem; /* legacy mem */

271 };

272

273 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)

274 #define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)

275

276 /*

277 * Error values that may be returned by PCI functions.

278 */

279 #define PCIBIOS_SUCCESSFUL 0x00

280 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81

281 #define PCIBIOS_BAD_VENDOR_ID 0x83

282 #define PCIBIOS_DEVICE_NOT_FOUND 0x86

283 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87

284 #define PCIBIOS_SET_FAILED 0x88

285 #define PCIBIOS_BUFFER_TOO_SMALL 0x89

286

287 /* Low-level architecture-dependent routines */

288

289 struct pci_ops {

290 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);

291 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);

292 };

293

294 struct pci_raw_ops {

295 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,

296 int reg, int len, u32 *val);

297 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,

298 int reg, int len, u32 val);

299 };

300

301 extern struct pci_raw_ops *raw_pci_ops;

302

303 struct pci_bus_region {

304 unsigned long start;

305 unsigned long end;

306 };

307

308 struct pci_dynids {

309 spinlock_t lock; /* protects list, index */

310 struct list_head list; /* for IDs added at runtime */

311 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */

312 };

313

314 /* ---------------------------------------------------------------- */

315 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides

316 * a set fof callbacks in struct pci_error_handlers, then that device driver

317 * will be notified of PCI bus errors, and will be driven to recovery

318 * when an error occurs.

319 */

320

321 typedef unsigned int __bitwise pci_ers_result_t;

322

323 enum pci_ers_result {

324 /* no result/none/not supported in device driver */

325 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,

326

327 /* Device driver can recover without slot reset */

328 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,

329

330 /* Device driver wants slot to be reset. */

331 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,

332

333 /* Device has completely failed, is unrecoverable */

334 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,

335

336 /* Device driver is fully recovered and operational */

337 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,

338 };

339

340 /* PCI bus error event callbacks */

341 struct pci_error_handlers

342 {

343 /* PCI bus error detected on this device */

344 pci_ers_result_t (*error_detected)(struct pci_dev *dev,

345 enum pci_channel_state error);

346

347 /* MMIO has been re-enabled, but not DMA */

348 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);

349

350 /* PCI Express link has been reset */

351 pci_ers_result_t (*link_reset)(struct pci_dev *dev);

352

353 /* PCI slot has been reset */

354 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);

355

356 /* Device driver may resume normal operations */

357 void (*resume)(struct pci_dev *dev);

358 };

359

360 /* ---------------------------------------------------------------- */

361

362 struct module;

363 struct pci_driver {

364 struct list_head node;

365 char *name;

366 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */

367 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */

368 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */

369 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */

370 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);

371 int (*resume_early) (struct pci_dev *dev);

372 int (*resume) (struct pci_dev *dev); /* Device woken up */

373 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */

374 void (*shutdown) (struct pci_dev *dev);

375

376 struct pci_error_handlers *err_handler;

377 struct device_driver driver;

378 struct pci_dynids dynids;

379 };

380

381 #define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)

382

383 /**

384 * PCI_DEVICE - macro used to describe a specific pci device

385 * @vend: the 16 bit PCI Vendor ID

386 * @dev: the 16 bit PCI Device ID

387 *

388 * This macro is used to create a struct pci_device_id that matches a

389 * specific device. The subvendor and subdevice fields will be set to

390 * PCI_ANY_ID.

391 */

392 #define PCI_DEVICE(vend,dev) \

393 .vendor = (vend), .device = (dev), \

394 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID

395

396 /**

397 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class

398 * @dev_class: the class, subclass, prog-if triple for this device

399 * @dev_class_mask: the class mask for this device

400 *

401 * This macro is used to create a struct pci_device_id that matches a

402 * specific PCI class. The vendor, device, subvendor, and subdevice

403 * fields will be set to PCI_ANY_ID.

404 */

405 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \

406 .class = (dev_class), .class_mask = (dev_class_mask), \

407 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \

408 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID

409

410 /*

411 * pci_module_init is obsolete, this stays here till we fix up all usages of it

412 * in the tree.

413 */

414 #define pci_module_init pci_register_driver

415

416 /**

417 * PCI_VDEVICE - macro used to describe a specific pci device in short form

418 * @vend: the vendor name

419 * @dev: the 16 bit PCI Device ID

420 *

421 * This macro is used to create a struct pci_device_id that matches a

422 * specific PCI device. The subvendor, and subdevice fields will be set

423 * to PCI_ANY_ID. The macro allows the next field to follow as the device

424 * private data.

425 */

426

427 #define PCI_VDEVICE(vendor, device) \

428 PCI_VENDOR_ID_##vendor, (device), \

429 PCI_ANY_ID, PCI_ANY_ID, 0, 0

430

431 /* these external functions are only available when PCI support is enabled */

432 #ifdef CONFIG_PCI

433

434 extern struct bus_type pci_bus_type;

435

436 /* Do NOT directly access these two variables, unless you are arch specific pci

437 * code, or pci core code. */

438 extern struct list_head pci_root_buses; /* list of all known PCI buses */

439 extern struct list_head pci_devices; /* list of all devices */

440

441 void pcibios_fixup_bus(struct pci_bus *);

442 int __must_check pcibios_enable_device(struct pci_dev *, int mask);

443 char *pcibios_setup (char *str);

444

445 /* Used only when drivers/pci/setup.c is used */

446 void pcibios_align_resource(void *, struct resource *, resource_size_t,

447 resource_size_t);

448 void pcibios_update_irq(struct pci_dev *, int irq);

449

450 /* Generic PCI functions used internally */

451

452 extern struct pci_bus *pci_find_bus(int domain, int busnr);

453 void pci_bus_add_devices(struct pci_bus *bus);

454 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);

455 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)

456 {

457 struct pci_bus *root_bus;

458 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);

459 if (root_bus)

460 pci_bus_add_devices(root_bus);

461 return root_bus;

462 }

463 struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);

464 struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);

465 int pci_scan_slot(struct pci_bus *bus, int devfn);

466 struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);

467 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);

468 unsigned int pci_scan_child_bus(struct pci_bus *bus);

469 int __must_check pci_bus_add_device(struct pci_dev *dev);

470 void pci_read_bridge_bases(struct pci_bus *child);

471 struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);

472 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);

473 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);

474 extern void pci_dev_put(struct pci_dev *dev);

475 extern void pci_remove_bus(struct pci_bus *b);

476 extern void pci_remove_bus_device(struct pci_dev *dev);

477 extern void pci_stop_bus_device(struct pci_dev *dev);

478 void pci_setup_cardbus(struct pci_bus *bus);

479 extern void pci_sort_breadthfirst(void);

480

481 /* Generic PCI functions exported to card drivers */

482

483 struct pci_dev __deprecated *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);

484 struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);

485 int pci_find_capability (struct pci_dev *dev, int cap);

486 int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);

487 int pci_find_ext_capability (struct pci_dev *dev, int cap);

488 int pci_find_ht_capability (struct pci_dev *dev, int ht_cap);

489 int pci_find_next_ht_capability (struct pci_dev *dev, int pos, int ht_cap);

490 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);

491

492 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,

493 struct pci_dev *from);

494 struct pci_dev *pci_get_device_reverse(unsigned int vendor, unsigned int device,

495 struct pci_dev *from);

496

497 struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,

498 unsigned int ss_vendor, unsigned int ss_device,

499 struct pci_dev *from);

500 struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);

501 struct pci_dev *pci_get_bus_and_slot (unsigned int bus, unsigned int devfn);

502 struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);

503 int pci_dev_present(const struct pci_device_id *ids);

504 const struct pci_device_id *pci_find_present(const struct pci_device_id *ids);

505

506 int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);

507 int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);

508 int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);

509 int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);

510 int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);

511 int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);

512

513 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)

514 {

515 return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);

516 }

517 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)

518 {

519 return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);

520 }

521 static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)

522 {

523 return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);

524 }

525 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)

526 {

527 return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);

528 }

529 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)

530 {

531 return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);

532 }

533 static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)

534 {

535 return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);

536 }

537

538 int __must_check pci_enable_device(struct pci_dev *dev);

539 int __must_check pci_enable_device_bars(struct pci_dev *dev, int mask);

540 int __must_check pcim_enable_device(struct pci_dev *pdev);

541 void pcim_pin_device(struct pci_dev *pdev);

542

543 static inline int pci_is_managed(struct pci_dev *pdev)

544 {

545 return pdev->is_managed;

546 }

547

548 void pci_disable_device(struct pci_dev *dev);

549 void pci_set_master(struct pci_dev *dev);

550 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);

551 #define HAVE_PCI_SET_MWI

552 int __must_check pci_set_mwi(struct pci_dev *dev);

553 void pci_clear_mwi(struct pci_dev *dev);

554 void pci_intx(struct pci_dev *dev, int enable);

555 void pci_msi_off(struct pci_dev *dev);

556 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);

557 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);

558 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);

559 int __must_check pci_assign_resource(struct pci_dev *dev, int i);

560 int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i);

561 void pci_restore_bars(struct pci_dev *dev);

562 int pci_select_bars(struct pci_dev *dev, unsigned long flags);

563

564 /* ROM control related routines */

565 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);

566 void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);

567 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);

568 void pci_remove_rom(struct pci_dev *pdev);

569

570 /* Power management related routines */

571 int pci_save_state(struct pci_dev *dev);

572 int pci_restore_state(struct pci_dev *dev);

573 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);

574 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);

575 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);

576

577 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */

578 void pci_bus_assign_resources(struct pci_bus *bus);

579 void pci_bus_size_bridges(struct pci_bus *bus);

580 int pci_claim_resource(struct pci_dev *, int);

581 void pci_assign_unassigned_resources(void);

582 void pdev_enable_device(struct pci_dev *);

583 void pdev_sort_resources(struct pci_dev *, struct resource_list *);

584 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),

585 int (*)(struct pci_dev *, u8, u8));

586 #define HAVE_PCI_REQ_REGIONS 2

587 int __must_check pci_request_regions(struct pci_dev *, const char *);

588 void pci_release_regions(struct pci_dev *);

589 int __must_check pci_request_region(struct pci_dev *, int, const char *);

590 void pci_release_region(struct pci_dev *, int);

591 int pci_request_selected_regions(struct pci_dev *, int, const char *);

592 void pci_release_selected_regions(struct pci_dev *, int);

593

594 /* drivers/pci/bus.c */

595 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,

596 struct resource *res, resource_size_t size,

597 resource_size_t align, resource_size_t min,

598 unsigned int type_mask,

599 void (*alignf)(void *, struct resource *,

600 resource_size_t, resource_size_t),

601 void *alignf_data);

602 void pci_enable_bridges(struct pci_bus *bus);

603

604 /* Proper probing supporting hot-pluggable devices */

605 int __must_check __pci_register_driver(struct pci_driver *, struct module *,

606 const char *mod_name);

607 static inline int __must_check pci_register_driver(struct pci_driver *driver)

608 {

609 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);

610 }

611

612 void pci_unregister_driver(struct pci_driver *);

613 void pci_remove_behind_bridge(struct pci_dev *);

614 struct pci_driver *pci_dev_driver(const struct pci_dev *);

615 const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);

616 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);

617 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);

618

619 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),

620 void *userdata);

621 int pci_cfg_space_size(struct pci_dev *dev);

622 unsigned char pci_bus_max_busnr(struct pci_bus* bus);

623

624 /* kmem_cache style wrapper around pci_alloc_consistent() */

625

626 #include <linux/dmapool.h>

627

628 #define pci_pool dma_pool

629 #define pci_pool_create(name, pdev, size, align, allocation) \

630 dma_pool_create(name, &pdev->dev, size, align, allocation)

631 #define pci_pool_destroy(pool) dma_pool_destroy(pool)

632 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)

633 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)

634

635 enum pci_dma_burst_strategy {

636 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,

637 strategy_parameter is N/A */

638 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter

639 byte boundaries */

640 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of

641 strategy_parameter byte boundaries */

642 };

643

644 struct msix_entry {

645 u16 vector; /* kernel uses to write allocated vector */

646 u16 entry; /* driver uses to specify entry, OS writes */

647 };

648

649

650 #ifndef CONFIG_PCI_MSI

651 static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}

652 static inline void pci_disable_msi(struct pci_dev *dev) {}

653 static inline int pci_enable_msix(struct pci_dev* dev,

654 struct msix_entry *entries, int nvec) {return -1;}

655 static inline void pci_disable_msix(struct pci_dev *dev) {}

656 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}

657 #else

658 extern int pci_enable_msi(struct pci_dev *dev);

659 extern void pci_disable_msi(struct pci_dev *dev);

660 extern int pci_enable_msix(struct pci_dev* dev,

661 struct msix_entry *entries, int nvec);

662 extern void pci_disable_msix(struct pci_dev *dev);

663 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);

664 #endif

665

666 #ifdef CONFIG_HT_IRQ

667 /* The functions a driver should call */

668 int ht_create_irq(struct pci_dev *dev, int idx);

669 void ht_destroy_irq(unsigned int irq);

670 #endif /* CONFIG_HT_IRQ */

671

672 extern void pci_block_user_cfg_access(struct pci_dev *dev);

673 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);

674

675 /*

676 * PCI domain support. Sometimes called PCI segment (eg by ACPI),

677 * a PCI domain is defined to be a set of PCI busses which share

678 * configuration space.

679 */

680 #ifndef CONFIG_PCI_DOMAINS

681 static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }

682 static inline int pci_proc_domain(struct pci_bus *bus)

683 {

684 return 0;

685 }

686 #endif

687

688 #else /* CONFIG_PCI is not enabled */

689

690 /*

691 * If the system does not have PCI, clearly these return errors. Define

692 * these as simple inline functions to avoid hair in drivers.

693 */

694

695 #define _PCI_NOP(o,s,t) \

696 static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \

697 { return PCIBIOS_FUNC_NOT_SUPPORTED; }

698 #define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \

699 _PCI_NOP(o,word,u16 x) \

700 _PCI_NOP(o,dword,u32 x)

701 _PCI_NOP_ALL(read, *)

702 _PCI_NOP_ALL(write,)

703

704 static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)

705 { return NULL; }

706

707 static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)

708 { return NULL; }

709

710 static inline struct pci_dev *pci_get_device(unsigned int vendor,

711 unsigned int device, struct pci_dev *from)

712 { return NULL; }

713

714 static inline struct pci_dev *pci_get_device_reverse(unsigned int vendor,

715 unsigned int device, struct pci_dev *from)

716 { return NULL; }

717

718 static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,

719 unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)

720 { return NULL; }

721

722 static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)

723 { return NULL; }

724

725 #define pci_dev_present(ids) (0)

726 #define pci_find_present(ids) (NULL)

727 #define pci_dev_put(dev) do { } while (0)

728

729 static inline void pci_set_master(struct pci_dev *dev) { }

730 static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }

731 static inline void pci_disable_device(struct pci_dev *dev) { }

732 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }

733 static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}

734 static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}

735 static inline int pci_register_driver(struct pci_driver *drv) { return 0;}

736 static inline void pci_unregister_driver(struct pci_driver *drv) { }

737 static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }

738 static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }

739 static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }

740 static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }

741

742 /* Power management related routines */

743 static inline int pci_save_state(struct pci_dev *dev) { return 0; }

744 static inline int pci_restore_state(struct pci_dev *dev) { return 0; }

745 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }

746 static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }

747 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }

748

749 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) { return -EIO; }

750 static inline void pci_release_regions(struct pci_dev *dev) { }

751

752 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)

753

754 static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }

755 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }

756

757 #endif /* CONFIG_PCI */

758

759 /* Include architecture-dependent settings and functions */

760

761 #include <asm/pci.h>

762

763 /* these helpers provide future and backwards compatibility

764 * for accessing popular PCI BAR info */

765 #define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)

766 #define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)

767 #define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)

768 #define pci_resource_len(dev,bar) \

769 ((pci_resource_start((dev),(bar)) == 0 && \

770 pci_resource_end((dev),(bar)) == \

771 pci_resource_start((dev),(bar))) ? 0 : \

772 \

773 (pci_resource_end((dev),(bar)) - \

774 pci_resource_start((dev),(bar)) + 1))

775

776 /* Similar to the helpers above, these manipulate per-pci_dev

777 * driver-specific data. They are really just a wrapper around

778 * the generic device structure functions of these calls.

779 */

780 static inline void *pci_get_drvdata (struct pci_dev *pdev)

781 {

782 return dev_get_drvdata(&pdev->dev);

783 }

784

785 static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)

786 {

787 dev_set_drvdata(&pdev->dev, data);

788 }

789

790 /* If you want to know what to call your pci_dev, ask this function.

791 * Again, it's a wrapper around the generic device.

792 */

793 static inline char *pci_name(struct pci_dev *pdev)

794 {

795 return pdev->dev.bus_id;

796 }

797

798

799 /* Some archs don't want to expose struct resource to userland as-is

800 * in sysfs and /proc

801 */

802 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER

803 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,

804 const struct resource *rsrc, resource_size_t *start,

805 resource_size_t *end)

806 {

807 *start = rsrc->start;

808 *end = rsrc->end;

809 }

810 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */

811

812

813 /*

814 * The world is not perfect and supplies us with broken PCI devices.

815 * For at least a part of these bugs we need a work-around, so both

816 * generic (drivers/pci/quirks.c) and per-architecture code can define

817 * fixup hooks to be called for particular buggy devices.

818 */

819

820 struct pci_fixup {

821 u16 vendor, device; /* You can use PCI_ANY_ID here of course */

822 void (*hook)(struct pci_dev *dev);

823 };

824

825 enum pci_fixup_pass {

826 pci_fixup_early, /* Before probing BARs */

827 pci_fixup_header, /* After reading configuration header */

828 pci_fixup_final, /* Final phase of device fixups */

829 pci_fixup_enable, /* pci_enable_device() time */

830 pci_fixup_resume, /* pci_enable_device() time */

831 };

832

833 /* Anonymous variables would be nice... */

834 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \

835 static const struct pci_fixup __pci_fixup_##name __attribute_used__ \

836 __attribute__((__section__(#section))) = { vendor, device, hook };

837 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \

838 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \

839 vendor##device##hook, vendor, device, hook)

840 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \

841 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \

842 vendor##device##hook, vendor, device, hook)

843 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \

844 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \

845 vendor##device##hook, vendor, device, hook)

846 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \

847 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \

848 vendor##device##hook, vendor, device, hook)

849 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \

850 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \

851 resume##vendor##device##hook, vendor, device, hook)

852

853

854 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);

855

856 void __iomem * pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);

857 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);

858 void __iomem * const * pcim_iomap_table(struct pci_dev *pdev);

859 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);

860 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);

861

862 extern int pci_pci_problems;

863 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */

864 #define PCIPCI_TRITON 2

865 #define PCIPCI_NATOMA 4

866 #define PCIPCI_VIAETBF 8

867 #define PCIPCI_VSFX 16

868 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */

869 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */

870

871 extern unsigned long pci_cardbus_io_size;

872 extern unsigned long pci_cardbus_mem_size;

873

874 #endif /* __KERNEL__ */

875 #endif /* LINUX_PCI_H */