clk: st: STiH407: Support for Flexgen Clocks
authorGabriel FERNANDEZ <gabriel.fernandez@st.com>
Tue, 15 Jul 2014 15:20:22 +0000 (17:20 +0200)
committerMike Turquette <mturquette@linaro.org>
Tue, 29 Jul 2014 05:36:24 +0000 (22:36 -0700)
commitb116517055b7ebde85fa8ee8704071e31ea25dc3
tree1a5ffd116638934a39a7fee527adaf14420a9057
parent3414666d34bb50f91965d16eab98a5fd7c8af08c
clk: st: STiH407: Support for Flexgen Clocks

This patch is the Flexgen implementation reusing as much as possible
of Common Clock Framework functions.

The idea is to have an instance of "struct flexgen" per output clock.
It represents the clock cross bar (by a mux element), and the pre and final dividers
(using dividers and gates elements).

Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/st/Makefile
drivers/clk/st/clk-flexgen.c [new file with mode: 0644]