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clk: samsung: exynos542x: Add EPLL rate table
authorSylwester Nawrocki <s.nawrocki@samsung.com>
Fri, 9 Jun 2017 10:46:06 +0000 (12:46 +0200)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Fri, 9 Jun 2017 11:12:55 +0000 (13:12 +0200)
commit9842452acd3dae661f4430c4460edd1fc188377f
treec9bf32e40756b4a10421746496abb8944af26d6ftree | snapshot (tar.gz zip)
parent8a9cf26e303f8b1a02d8bf62cd4671f6714aa2fecommit | diff
clk: samsung: exynos542x: Add EPLL rate table

A specific clock rate table is added for EPLL so it is possible
to set frequency of the EPLL output clock as multiple of various
audio sampling rates.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
drivers/clk/samsung/clk-exynos5420.c diff | blob | blame | history