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MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions
authorMarkos Chandras <markos.chandras@imgtec.com>
Thu, 13 Nov 2014 13:25:51 +0000 (13:25 +0000)
committerMarkos Chandras <markos.chandras@imgtec.com>
Tue, 17 Feb 2015 15:37:20 +0000 (15:37 +0000)
commit934c79231c1b3a88ed1ef8f1473fb26849ae501c
tree236efbdff02a3033cc90e8308e7cbb87821e8f23tree | snapshot (tar.gz zip)
parent8716a7635665008291d3f19dd5d36a858ed1561bcommit | diff
MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions

MIPS R6 changed the 'cache' instruction opcode and reduced the
offset field to 8 bits. This means we now have to adjust the
base register every 256 bytes and as a result of which we can
no longer use the previous cache functions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
arch/mips/include/asm/r4kcache.h diff | blob | blame | history