drm/i915: Micro-optimise gen8_ppgtt_insert_entries()
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 15 Feb 2017 08:43:37 +0000 (08:43 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 15 Feb 2017 10:05:53 +0000 (10:05 +0000)
commit894ccebee2b0e606ba9638d20dd87b33568482d7
tree8411c7a90f0aa3d9982a732f6611c6192adc6ac3
parentb31144c0daa8c570d3fb60ddbd0e26ba1ea62485
drm/i915: Micro-optimise gen8_ppgtt_insert_entries()

Improve the sg iteration and in hte process eliminate a bug in
miscomputing the pml4 length as orig_nents<<PAGE_SHIFT is no longer the
full length of the sg table.

v2: Check for the end of the fourth level page table (the final pdpe)
and move onto the next.
v3: Assert that 3lvl insert_pte_entries doesn't overflow its smaller set
of PDP.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170215084357.19977-3-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_gem_gtt.c