iommu/arm-smmu: add support for iova_to_phys through ATS1PR
authorMitchel Humpherys <mitchelh@codeaurora.org>
Wed, 29 Oct 2014 21:13:40 +0000 (21:13 +0000)
committerWill Deacon <will.deacon@arm.com>
Mon, 19 Jan 2015 18:18:38 +0000 (18:18 +0000)
commit859a732e4f713270152c78df6e09accbde006734
treec884b95807acf8df3b4927ae6ceec92bdc0e1d72
parent54c523127bcca986c6f9b04c7b56a949ea011899
iommu/arm-smmu: add support for iova_to_phys through ATS1PR

Currently, we provide the iommu_ops.iova_to_phys service by doing a
table walk in software to translate IO virtual addresses to physical
addresses. On SMMUs that support it, it can be useful to ask the SMMU
itself to do the translation. This can be used to warm the TLBs for an
SMMU. It can also be useful for testing and hardware validation.

Since the address translation registers are optional on SMMUv2, only
enable hardware translations when using SMMUv1 or when SMMU_IDR0.S1TS=1
and SMMU_IDR0.ATOSNS=0, as described in the ARM SMMU v1-v2 spec.

Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
[will: reworked on top of generic iopgtbl changes]
Signed-off-by: Will Deacon <will.deacon@arm.com>
drivers/iommu/arm-smmu.c