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(parent: c3febcc) | patch
drm/i915: fixup overlay checks for interlaced modes
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Sat, 28 Jan 2012 22:48:46 +0000 (23:48 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 10 Feb 2012 16:43:49 +0000 (17:43 +0100)
commit75c13993db592343bda1fd62f2555fea037d56bd
treee21d84f7ac42b4173a3b5be45b20355cab995b23tree | snapshot (tar.gz zip)
parentc3febcc438ba0878b164c74310bd77c50dbb0ba8commit | diff
drm/i915: fixup overlay checks for interlaced modes

The drm core _really_ likes to frob around with the crtc timings and
put halfed vertical timings (in fields) in there. Which confuses the
overlay code, resulting in it's refusal to display anything at the
lower half of an interlaced pipe.

Tested-by: Christopher Egert <cme3000@gmail.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_overlay.c diff | blob | blame | history