2 * linux/arch/arm/kernel/xscale-cp0.c
4 * XScale DSP and iWMMXt coprocessor context switching and handling
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/types.h>
13 #include <linux/kernel.h>
14 #include <linux/signal.h>
15 #include <linux/sched.h>
16 #include <linux/init.h>
18 #include <asm/thread_notify.h>
20 static inline void dsp_save_state(u32 *state)
22 __asm__ __volatile__ (
23 "mrrc p0, 0, %0, %1, c0\n"
24 : "=r" (state[0]), "=r" (state[1]));
27 static inline void dsp_load_state(u32 *state)
29 __asm__ __volatile__ (
30 "mcrr p0, 0, %0, %1, c0\n"
31 : : "r" (state[0]), "r" (state[1]));
34 static int dsp_do(struct notifier_block *self, unsigned long cmd, void *t)
36 struct thread_info *thread = t;
39 case THREAD_NOTIFY_FLUSH:
40 thread->cpu_context.extra[0] = 0;
41 thread->cpu_context.extra[1] = 0;
44 case THREAD_NOTIFY_SWITCH:
45 dsp_save_state(current_thread_info()->cpu_context.extra);
46 dsp_load_state(thread->cpu_context.extra);
53 static struct notifier_block dsp_notifier_block = {
54 .notifier_call = dsp_do,
59 static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t)
61 struct thread_info *thread = t;
64 case THREAD_NOTIFY_FLUSH:
66 * flush_thread() zeroes thread->fpstate, so no need
67 * to do anything here.
69 * FALLTHROUGH: Ensure we don't try to overwrite our newly
70 * initialised state information on the first fault.
73 case THREAD_NOTIFY_EXIT:
74 iwmmxt_task_release(thread);
77 case THREAD_NOTIFY_SWITCH:
78 iwmmxt_task_switch(thread);
85 static struct notifier_block iwmmxt_notifier_block = {
86 .notifier_call = iwmmxt_do,
91 static u32 __init xscale_cp_access_read(void)
95 __asm__ __volatile__ (
96 "mrc p15, 0, %0, c15, c1, 0\n\t"
102 static void __init xscale_cp_access_write(u32 value)
106 __asm__ __volatile__ (
107 "mcr p15, 0, %1, c15, c1, 0\n\t"
108 "mrc p15, 0, %0, c15, c1, 0\n\t"
111 : "=r" (temp) : "r" (value));
115 * Detect whether we have a MAC coprocessor (40 bit register) or an
116 * iWMMXt coprocessor (64 bit registers) by loading 00000100:00000000
117 * into a coprocessor register and reading it back, and checking
118 * whether the upper word survived intact.
120 static int __init cpu_has_iwmmxt(void)
126 * This sequence is interpreted by the DSP coprocessor as:
130 * And by the iWMMXt coprocessor as:
134 __asm__ __volatile__ (
135 "mcrr p0, 0, %2, %3, c0\n"
136 "mrrc p0, 0, %0, %1, c0\n"
137 : "=r" (lo), "=r" (hi)
138 : "r" (0), "r" (0x100));
145 * If we detect that the CPU has iWMMXt (and CONFIG_IWMMXT=y), we
146 * disable CP0/CP1 on boot, and let call_fpe() and the iWMMXt lazy
147 * switch code handle iWMMXt context switching. If on the other
148 * hand the CPU has a DSP coprocessor, we keep access to CP0 enabled
149 * all the time, and save/restore acc0 on context switch in non-lazy
152 static int __init xscale_cp0_init(void)
156 cp_access = xscale_cp_access_read() & ~3;
157 xscale_cp_access_write(cp_access | 1);
159 if (cpu_has_iwmmxt()) {
160 #ifndef CONFIG_IWMMXT
161 printk(KERN_WARNING "CAUTION: XScale iWMMXt coprocessor "
162 "detected, but kernel support is missing.\n");
164 printk(KERN_INFO "XScale iWMMXt coprocessor detected.\n");
165 elf_hwcap |= HWCAP_IWMMXT;
166 thread_register_notifier(&iwmmxt_notifier_block);
169 printk(KERN_INFO "XScale DSP coprocessor detected.\n");
170 thread_register_notifier(&dsp_notifier_block);
174 xscale_cp_access_write(cp_access);
179 late_initcall(xscale_cp0_init);