ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Mon, 17 Feb 2014 14:23:28 +0000 (15:23 +0100)
committerJason Cooper <jason@lakedaemon.net>
Mon, 17 Feb 2014 22:50:20 +0000 (22:50 +0000)
commit0d3d96ab0059074a18dbb5fc2f9df859c06019bf
tree4a69c326d62413f25fee5457fdec1cce075a62e2
parent44e255a5844dcb84d7e9bfab96c6493ce98dca67
ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs

The Armada 380 and 385 SoCs are new SoCs from Marvell, based on a
Cortex-A9 cores (single core for 380, dual core for 385) and a number
of hardware blocks that are common with earlier SoCs from the mvebu
family.

The provided Device Tree describes the following parts of the SoC:

 * CPU
 * Device Bus
 * Clocks
 * Interrupt controllers: GIC and MPIC
 * GPIO controllers
 * I2C buses
 * L2 cache
 * MBus controller
 * Pinctrl
 * Serial
 * SPI buses
 * System controller (for reboot)
 * Timer
 * XOR engines
 * PCIe controllers
 * Network interfaces

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/boot/dts/armada-380.dtsi [new file with mode: 0644]
arch/arm/boot/dts/armada-385.dtsi [new file with mode: 0644]
arch/arm/boot/dts/armada-38x.dtsi [new file with mode: 0644]