Jon Hunter [Mon, 8 Apr 2013 01:17:07 +0000 (20:17 -0500)]
ARM: dts: Add NOR flash bindings for OMAP2420 H4
Add device-tree node for the 64MB NOR on the OMAP2420-H4 board.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Mon, 8 Apr 2013 01:17:06 +0000 (20:17 -0500)]
ARM: dts: Update OMAP3430 SDP NAND and ONENAND properties
The GPMC timing properties for device-tree have been updated by adding
a "-ns" or "-ps" suffix to indicate the units of time the property
represents (as suggested by Rob Herring). Therefore, update the timing
property names for the OMAP3430 SDP NAND and ONENAND devices.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Thu, 4 Apr 2013 20:16:16 +0000 (15:16 -0500)]
ARM: dts: OMAP2+: Identify GPIO banks that are always powered
Add the "ti,gpio-always-on" property to the appropriate GPIO banks to
indicate which banks are always powered and will never lose logic state.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Tue, 19 Mar 2013 17:38:19 +0000 (12:38 -0500)]
ARM: OMAP2+: Populate DMTIMER errata when using device-tree
Currently the DMTIMER errata flags are not being populated when using
device-tree. Add static platform data to populate errata flags when
using device-tree.
Please note that DMTIMER erratum i767 is applicable to OMAP3-5 devices
as well as AM335x devices.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Tue, 19 Mar 2013 17:38:18 +0000 (12:38 -0500)]
ARM: dts: OMAP2+: Update DMTIMER compatibility property
Update the DMTIMER compatibility property to reflect the register level
compatibilty between devices and update the various OMAP/AM timer
bindings with the appropriate compatibility string.
By doing this we can add platform specific data applicable to specific
timer versions to the driver. For example, errata flags can be populated
for the timer versions that are impacted.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Tue, 19 Mar 2013 17:38:17 +0000 (12:38 -0500)]
ARM: OMAP: Add function to request timer by node
Add a function so that OMAP dmtimers can be requested by device-tree
node. This allows for devices, such as the internal DSP, or drivers,
such as PWM, to reference a specific dmtimer node via the device-tree.
Given that there are several APIs available for requesting dmtimers
(by ID, by capability or by node) consolidate the code for all these
functions into a single helper function that can be used by these
request functions.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Tue, 19 Mar 2013 17:38:16 +0000 (12:38 -0500)]
ARM: OMAP: Force dmtimer restore if context loss is not detectable
When booting with device-tree the function pointer for detecting context
loss is not populated. Ideally, the pm_runtime framework should be
enhanced to allow a means for reporting context/state loss and we could
avoid populating such function pointers altogether. In the interim until
a generic non-device specific solution is in place, force a restore of
the dmtimer when enabling the timer.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
NeilBrown [Tue, 19 Mar 2013 17:38:15 +0000 (12:38 -0500)]
ARM: OMAP: Simplify dmtimer context-loss handling
The context loss handling in dmtimer appears to assume that
omap_dm_timer_set_load_start() or omap_dm_timer_start() and
omap_dm_timer_stop() bracket all interactions. Only the first two
restore the context and the last updates the context loss counter.
However omap_dm_timer_set_load() or omap_dm_timer_set_match() can
reasonably be called outside this bracketing, and the fact that they
call omap_dm_timer_enable() / omap_dm_timer_disable() suggest that
is expected.
So if, after a transition into and out of off-mode which would cause
the dm timer to loose all state, omap_dm_timer_set_match() is called
before omap_dm_timer_start(), the value read from OMAP_TIMER_CTRL_REG
will be 'wrong' and this wrong value will be stored context.tclr so
a subsequent omap_dm_timer_start() can fail (As the control register
is wrong).
Simplify this be doing the restore-from-context in
omap_dm_timer_enable() so that whenever the timer is enabled, the
context is correct. Also update the ctx_loss_count at the same time as
we notice it is wrong - these is no value in delaying this until the
omap_dm_timer_disable() as it cannot change while the timer is enabled.
Signed-off-by: NeilBrown <neilb@suse.de>
[jon-hunter@ti.com: minor update to subject and changed variable name]
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Philip Avinash [Fri, 1 Feb 2013 05:37:27 +0000 (11:07 +0530)]
ARM: dts: AM33XX: Corrects typo in interrupt field in SPI node
DT field of "interrupts" was mentioned wrongly as "interrupt" in SPI
node. This went unnoticed as spi-omap2 driver not making use of
interrupt. Fixes the typo.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Nishanth Menon [Tue, 19 Mar 2013 17:53:08 +0000 (12:53 -0500)]
ARM: dts: OMAP4460: Add CPU OPP table
Add DT OPP table for OMAP4460 family of devices. This data is
decoded by OF with of_init_opp_table() helper function.
OPP data here is based on existing opp4xxx_data.c
This is in preparation to use generic cpufreq-cpu0 driver for device
tree enabled boot. Legacy non device tree enabled boot continues to
use omap-cpufreq.c and opp4xxx_data.c.
Signed-off-by: Nishanth Menon <nm@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Nishanth Menon [Tue, 19 Mar 2013 17:53:07 +0000 (12:53 -0500)]
ARM: dts: omap4-panda: move generic sections to panda-common
PandaBoard, PandaBoard-A4 revisions use OMAP4430.
PandaBoard-ES version of the board uses OMAP4460.
Move the original panda dts file into a common dtsi used by all panda
variants. This allows us to introduce SoC variation for PandaBoard ES
without impacting other PandaBoard versions that are supported.
As part of this change, since OMAP4460 adds on to OMAP4430, add
omap4.dtsi to omap4460.dtsi.
Signed-off-by: Nishanth Menon <nm@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Nishanth Menon [Tue, 19 Mar 2013 17:53:06 +0000 (12:53 -0500)]
ARM: dts: OMAP443x: Add CPU OPP table
Add DT OPP table for OMAP443x family of devices. This data is
decoded by OF with of_init_opp_table() helper function.
OPP data here is based on existing opp4xxx_data.c
Since the omap4460 OPP tables would be different from OMAP443x,
introduce an new omap443x.dtsi for 443x specific entries and use
existing omap4.dtsi as the common dtsi file for all OMAP4 platforms.
This is in preparation to use generic cpufreq-cpu0 driver for device
tree enabled boot. Legacy non device tree enabled boot continues to
use omap-cpufreq.c and opp4xxx_data.c.
Signed-off-by: Nishanth Menon <nm@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Nishanth Menon [Tue, 19 Mar 2013 17:53:05 +0000 (12:53 -0500)]
ARM: dts: OMAP3: use twl4030 vdd1 regulator for CPU
Define VDD1 regulator in twl4030 DT and mark it as the supply for the
various OMAP34xx/35xx/36xx/37xx platforms (all use TWL4030 variants with
VDD1 supplying the CPU).
NOTE: This currently will use I2C1 bus communication path to set the
voltage in device tree boot. In the legacy non device tree boot, we
continue to use twl-common.c which bypasses I2C1 bus communication path
and uses I2C4 bus path using OMAP voltage libraries. We should
eventually be able to use I2C4 path once we have voltage regulator for
OMAP which is capable of using the voltage controller/voltage processor
IP blocks.
Signed-off-by: Nishanth Menon <nm@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Nishanth Menon [Tue, 19 Mar 2013 17:53:04 +0000 (12:53 -0500)]
ARM: dts: OMAP36xx: Add CPU OPP table
Add DT OPP table for OMAP36xx/37xx family of devices. This data is
decoded by OF with of_init_opp_table() helper function.
OPP data here is based on existing opp3xxx_data.c
This is in preparation to use generic cpufreq-cpu0 driver for device
tree enabled boot. Legacy non device tree enabled boot continues to
use omap-cpufreq.c and opp3xxx_data.c.
Signed-off-by: Nishanth Menon <nm@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Nishanth Menon [Tue, 19 Mar 2013 17:53:03 +0000 (12:53 -0500)]
ARM: dts: OMAP34xx/35xx: Add CPU OPP table
Add DT OPP table for OMAP34xx/35xx family of devices. This data is
decoded by OF with of_init_opp_table() helper function.
OPP data here is based on existing opp3xxx_data.c
Since the omap36xx OPP tables would be different from OMAP34xx/35xx,
introduce an new omap34xx.dtsi for 34xx/35xx specific entries and use
existing omap3.dtsi as the common dtsi file for all OMAP3 platforms.
This is in preparation to use generic cpufreq-cpu0 driver for device
tree enabled boot. Legacy non device tree enabled boot continues to
use omap-cpufreq.c and opp3xxx_data.c.
Signed-off-by: Nishanth Menon <nm@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Javier Martinez Canillas [Fri, 15 Mar 2013 13:31:57 +0000 (14:31 +0100)]
Documentation: dt: gpio-omap: Move interrupt-controller from #interrupt-cells description
The binding documentation for the OMAP GPIO controller has the
"#interrupt-cells" property listed before "#interrupt-controller"
property but its description after.
This is confusing so we move "#interrupt-cells" after the
"interrupt-controller" property so is followed by its description.
While being there, change the properties order to be consistent with
Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
and Documentation/devicetree/bindings/gpio/gpio.txt.
According with these docs, the order of the properties for a gpio-omap
device node should be:
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Santosh Shilimkar [Tue, 19 Mar 2013 11:30:31 +0000 (17:00 +0530)]
ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc
OMAP hwmod layer does the reset of the IPs in early code so that
we have SOC in sane state. To do the soft-reset, it needs to ioremap()
the IP address space to be able to write to sysconfig registers.
But there are few hwmod which doesn't have sysconfig registers and hence
no need to ioremap() them in early init code.
Prevent calling the _init_mpu_rt_base() conditional based on sysc
availability.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Santosh Shilimkar [Mon, 21 Jan 2013 13:10:57 +0000 (18:40 +0530)]
ARM: OMAP2+: hwmod: extract module address space from DT blob
Patch adds the code for extracting the module ocp address space
from device tree blob in case the hwmod address space look up fails.
The idea is to remove the address space data from hwmod and extract
it from DT blob.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Lokesh Vutla [Wed, 27 Feb 2013 06:24:45 +0000 (11:54 +0530)]
ARM: dts: OMAP5: Add watchdog timer node
Add watchdog timer DT node for OMAP5 devices.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Santosh Shilimkar [Tue, 26 Feb 2013 12:06:14 +0000 (17:36 +0530)]
ARM: dts: OMAP4/5: Update l3-noc DT nodes
Add l3-noc node for OMAP4 and OMAP5 devices.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[jon-hunter@ti.com: Fix the problem caused by adding 32 to the interrupt
number for the L3 interrupts to account for per processor interrupts (PPI)
and software generated interrupts (SGI) which typically are mapped to the
first 32 interrupts in the ARM GIC. This is not necessary because the first
parameter of the ARM GIC interrupt property specifies the GIC interrupt
type (ie. SGI, PPI, etc). Hence, fix the interrupt number for the L3
interrupts by substracting 32]
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Santosh Shilimkar [Tue, 26 Feb 2013 11:26:11 +0000 (16:56 +0530)]
Documentation: dt: OMAP: l3-noc: Add *reg* in required properties
OMAP L3 driver needs reg address space for its operation
and hence its a required property.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Santosh Shilimkar [Wed, 23 Jan 2013 14:23:30 +0000 (19:53 +0530)]
ARM: dts: OMAP5: Update keypad reg property
Add missing OMAP keypad reg property information.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Santosh Shilimkar [Tue, 19 Feb 2013 11:59:24 +0000 (17:29 +0530)]
ARM: dts: OMAP5: Update the timer and GIC nodes for HYP kernel support
To be able to run kernel in HYP mode, virtual timer
and GIC node information needs to be populated.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Santosh Shilimkar [Tue, 12 Feb 2013 10:27:55 +0000 (15:57 +0530)]
ARM: dts: OMAP5: Move the gic node out of ocp space
GIC is not part of OCP space so move the gic DT node
out of ocp DT address space.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Rajendra Nayak [Fri, 18 Jan 2013 14:23:00 +0000 (19:53 +0530)]
ARM: dts: OMAP5: Specify nonsecure PPI IRQ for arch timer
Specify both secure as well as nonsecure PPI IRQ for arch
timer. This fixes the following errors seen on DT OMAP5 boot..
[ 0.000000] arch_timer: No interrupt available, giving up
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Santosh Shilimkar [Sun, 10 Feb 2013 16:10:19 +0000 (21:40 +0530)]
ARM: dts: OMAP5: Align the local timer dt node as per the current binding code
It has been decided to not duplicate banked modules dt nodes and that is
how the current arch timer dt extraction code is.
Update the OMAP5 DT file accordingly.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Santosh Shilimkar [Fri, 18 Jan 2013 06:13:16 +0000 (11:43 +0530)]
ARM: dts: omap5-evm: Update available memory to 2032 MB
On OMAP5 to detect invalid/bad memory accesses, 16MB of DDR is used as a trap.
Hence available memory for linux OS is 2032 MB on boards popullated with 2 GB
memory.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Anil Kumar [Fri, 15 Feb 2013 18:02:25 +0000 (23:32 +0530)]
ARM: dts: omap3-devkit8000: Add NAND DT node
Add the needed sections to enable nand support on
Devkit8000.
Add nand partitions information.
Signed-off-by: Anil Kumar <anilk4.v@gmail.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Anil Kumar [Mon, 4 Feb 2013 14:55:07 +0000 (20:25 +0530)]
ARM: dts: omap3-devkit8000: Enable audio support
Add the needed sections to enable audio support on
Devkit8000 when booted with DT blob.
Signed-off-by: Anil Kumar <anilk4.v@gmail.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Anil Kumar [Sat, 16 Mar 2013 09:59:21 +0000 (15:29 +0530)]
ARM: dts: Add minimal DT support for DevKit8000
DevKit8000 is a beagle board clone from Timll, sold by
armkits.com. The DevKit8000 has RS232 serial port, LCD, DVI-D,
S-Video, Ethernet, SD/MMC, keyboard, camera, SPI, I2C, USB and
JTAG interface.
Add the basic DT support for devkit8000. It includes:
- twl4030 (PMIC)
- MMC1
- I2C1
- leds
Signed-off-by: Anil Kumar <anilk4.v@gmail.com>
Tested-by: Thomas Weber <thomas@tomweber.eu>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Sebastien Guiriec [Mon, 11 Mar 2013 07:50:21 +0000 (08:50 +0100)]
ARM: dts: OMAP2+: Add SDMA Audio IPs bindings
Populate DMA client information for McBSP DMIC and McPDM periperhal on
OMAP2+ devices.
Signed-off-by: Sebastien Guiriec <s-guiriec@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Fri, 11 Jan 2013 16:39:22 +0000 (16:39 +0000)]
ARM: dts: OMAP3: Add support for OMAP3430 SDP board
Adds basic device-tree support for OMAP3430 SDP board which has 256MB
of RAM, 128MB ONENAND flash, 256MB NAND flash and uses the TWL4030
power management IC.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Thu, 7 Mar 2013 22:02:31 +0000 (16:02 -0600)]
ARM: dts: OMAP3: Add reg and interrupt properties for gpio
The OMAP3 gpio bindings are currently missing the reg and interrupt
properties and so add these properties.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Thu, 7 Mar 2013 21:44:39 +0000 (15:44 -0600)]
ARM: dts: OMAP3+: Correct gpio #interrupts-cells property
The OMAP gpio binding documention [1] states that the #interrupts-cells
property for gpio controllers should be 2. Currently, for OMAP3+ devices
the #interrupt-cells is set to 1. By setting this property to 2, it
allows clients to pass a 2nd parameter indicating the sensitivity (level
or edge) and polarity (high or low) of the interrupt. The OMAP gpio
controllers support these options and so update the #interrupt-cells
property for OMAP3+ devices to 2.
[1] Documentation/devicetree/bindings/gpio/gpio-omap.txt
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Thu, 28 Feb 2013 21:32:00 +0000 (15:32 -0600)]
ARM: dts: Add OMAP2 gpio bindings
Add gpios bindings for OMAP2420 and OMAP2430 devices.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Fri, 22 Feb 2013 21:33:31 +0000 (15:33 -0600)]
ARM: dts: Add GPMC node for OMAP2, OMAP4 and OMAP5
Add the device-tree node for GPMC on OMAP2, OMAP4 and OMAP5 devices.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Thu, 26 Apr 2012 18:47:59 +0000 (13:47 -0500)]
ARM: dts: OMAP2+: Add SDMA controller bindings and nodes
Add SDMA controller binding for OMAP2+ devices and populate DMA client
information for SPI and MMC peripheral on OMAP3+ devices. Please note
that OMAP24xx devices do not have SPI and MMC bindings available yet and
so DMA client information is not populated.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Thu, 18 Oct 2012 14:28:52 +0000 (09:28 -0500)]
ARM: dts: OMAP2+: Add PMU nodes
Add PMU nodes for OMAP2, OMAP3 and OMAP4460 devices.
Please note that the node for OMAP4460 has been placed in a separate
header file for OMAP4460, because the node is not compatible with
OMAP4430. The node for OMAP4430 is not included because PMU is not
currently supported on OMAP4430 due to the absence of a cross-trigger
interface driver.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Jon Hunter [Fri, 19 Oct 2012 19:27:34 +0000 (14:27 -0500)]
ARM: OMAP2+: Prepare for device-tree PMU support
If device-tree is present, then do not create the PMU device from within
the OMAP specific PMU code. This is required to allow device-tree to
create the PMU device from the PMU device-tree node.
PMU is not currently supported for OMAP4430 (due to a dependency on
having a cross-trigger interface driver) and so ensure that this
indicated on boot with or without device-tree.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Kishon Vijay Abraham I [Thu, 7 Mar 2013 13:35:20 +0000 (19:05 +0530)]
ARM: dts: OMAP5: add dwc3 omap and dwc3 core data
Add dwc3 omap glue data to the omap5 dt data file.
The information about the dt node added here is available @
Documentation/devicetree/bindings/usb/omap-usb.txt.
Also added dwc3 core dt data as a subnode to dwc3 omap glue
data in omap5 dt data file.
The information for the entered data node is available @
Documentation/devicetree/bindings/usb/dwc3.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Kishon Vijay Abraham I [Thu, 7 Mar 2013 13:35:19 +0000 (19:05 +0530)]
ARM: dts: OMAP5: Add omap-usb3 and omap-usb2 data
Add omap-usb3 and omap-usb2 data node in OMAP5 device tree file.
The information for the node added here is available @
Documentation/devicetree/bindings/usb/usb-phy.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Kishon Vijay Abraham I [Thu, 7 Mar 2013 13:35:18 +0000 (19:05 +0530)]
ARM: dts: OMAP5: Add ocp2scp data
Add ocp2scp data node in omap5 device tree file.
The information for the node added here can be found @
Documentation/devicetree/bindings/bus/omap-ocp2scp.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Kishon Vijay Abraham I [Thu, 7 Mar 2013 13:35:17 +0000 (19:05 +0530)]
ARM: dts: OMAP5: Add OMAP control usb data
Add omap control usb data in OMAP5 device tree file.
This will have the register address of registers to
power on the USB2 PHY and USB3 PHY.
The information for the node added here is available in
Documentation/devicetree/bindings/usb/omap-usb.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Kishon Vijay Abraham I [Thu, 7 Mar 2013 13:35:16 +0000 (19:05 +0530)]
ARM: dts: OMAP: Add usb_otg and glue data to OMAP3+ boards
Add usb otg data node in omap4/omap3 device tree file. Also update
the node with board specific setting in omapx-<board>.dts file.
The dt data specifies among others the interface type (ULPI or UTMI),
mode which is mostly OTG, power that specifies the amount of power
this can supply when in host mode.
The information about usb otg node is available @
Documentation/devicetree/bindings/usb/omap-usb.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Kishon Vijay Abraham I [Thu, 7 Mar 2013 13:35:15 +0000 (19:05 +0530)]
ARM: dts: OMAP4: Add omap-usb2 data
Add omap-usb2 data node in omap4 device tree file. Since omap-usb2
is connected to ocp2scp, omap-usb2 dt data is added as a child node
of ocp2scp. The information about this data node is availabe @
Documentation/devicetree/bindings/usb/usb-phy.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Kishon Vijay Abraham I [Thu, 7 Mar 2013 13:35:14 +0000 (19:05 +0530)]
ARM: dts: OMAP4: Add omap control usb data
Add omap control usb data in omap4 device tree file. This will have the
register address of registers to power on the PHY and to write to
mailbox. The information about this data node is available @
Documentation/devicetree/bindings/usb/omap-usb.txt
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Javier Martinez Canillas [Wed, 27 Feb 2013 01:30:51 +0000 (02:30 +0100)]
ARM: dts: OMAP3: reduce GPMC mapped registers address space
Currently the OMAP General-Purpose Memory Controller (GPMC) device
node maps 16 MB of address space for its hardware registers.
This is because the OMAP Technical Reference Manual says that the
GPMC module register address space size is 16 MB. But in practice
the maximum address offset used by a GPMC register is 0x02d0.
So, there is no need to map such a big address space for GPMC regs.
This change was suggested by Jon Hunter [1].
[1]: https://patchwork.kernel.org/patch/
2057111/
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Florian Vaussard [Mon, 28 Jan 2013 17:54:07 +0000 (18:54 +0100)]
ARM: dts: OMAP3: Add GPMC controller
Add device-tree support for the GPMC controller on the OMAP3.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Sourav Poddar [Wed, 13 Feb 2013 09:28:44 +0000 (14:58 +0530)]
ARM: dts: omap5-evm: Add mcspi data
Add mcspi node and pinmux data for omap5 mcspi controller.
Tested on omap5430 evm with 3.8-rc6 custom kernel.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Felipe Balbi [Wed, 13 Feb 2013 09:28:36 +0000 (14:58 +0530)]
ARM: dts: OMAP5: Add SPI nodes
Add all 4 mcspi instances to omap5.dtsi file.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
[benoit.cousson@linaro.org: Update the subject]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Sourav Poddar [Wed, 13 Feb 2013 09:28:30 +0000 (14:58 +0530)]
ARM: dts: omap4-panda: Add I2c pinctrl data
Booting 3.8-rc6 on omap4 panda results in the following error
[ 0.444427] omap_i2c
48070000.i2c: did not get pins for i2c error: -19
[ 0.445770] omap_i2c
48070000.i2c: bus 0 rev0.11 at 400 kHz
[ 0.473937] omap_i2c
48072000.i2c: did not get pins for i2c error: -19
[ 0.474670] omap_i2c
48072000.i2c: bus 1 rev0.11 at 400 kHz
[ 0.474822] omap_i2c
48060000.i2c: did not get pins for i2c error: -19
[ 0.476379] omap_i2c
48060000.i2c: bus 2 rev0.11 at 100 kHz
[ 0.477294] omap_i2c
48350000.i2c: did not get pins for i2c error: -19
[ 0.477996] omap_i2c
48350000.i2c: bus 3 rev0.11 at 400 kHz
[ 0.483398] Switching to clocksource 32k_counter
This happens because omap4 panda dts file is not adapted to use i2c through
pinctrl framework. Populating i2c pinctrl data to get rid of the error.
Tested on omap4460 panda with 3.8-rc6 kernel.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reported-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Sourav Poddar [Wed, 13 Feb 2013 09:28:22 +0000 (14:58 +0530)]
ARM: dts: omap5-evm: Add I2c pinctrl data
Booting 3.8-rc6 on omap 5430evm results in the following error
omap_i2c
48070000.i2c: did not get pins for i2c error: -19
[ 1.024261] omap_i2c
48070000.i2c: bus 0 rev0.12 at 100 kHz
[ 1.030181] omap_i2c
48072000.i2c: did not get pins for i2c error: -19
[ 1.037384] omap_i2c
48072000.i2c: bus 1 rev0.12 at 400 kHz
[ 1.043762] omap_i2c
48060000.i2c: did not get pins for i2c error: -19
[ 1.050964] omap_i2c
48060000.i2c: bus 2 rev0.12 at 100 kHz
[ 1.056823] omap_i2c
4807a000.i2c: did not get pins for i2c error: -19
[ 1.064025] omap_i2c
4807a000.i2c: bus 3 rev0.12 at 400 kHz
This happens because omap5 dts file is not adapted to use i2c through pinctrl
framework. Populating i2c pinctrl data to get rid of the error.
Tested on omap5430 evm with 3.8-rc6 kernel.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Florian Vaussard [Wed, 23 Jan 2013 17:56:52 +0000 (18:56 +0100)]
ARM: dts: omap3-overo: Add audio support
Add the needed sections to enable audio support on Overo.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Sourav Poddar [Wed, 13 Feb 2013 09:28:12 +0000 (14:58 +0530)]
ARM: dts: omap4-sdp: Add I2c pinctrl data
Booting 3.8-rc6 on omap 4430sdp results in the following error
omap_i2c
48070000.i2c: did not get pins for i2c error: -19
[ 1.024261] omap_i2c
48070000.i2c: bus 0 rev0.12 at 100 kHz
[ 1.030181] omap_i2c
48072000.i2c: did not get pins for i2c error: -19
[ 1.037384] omap_i2c
48072000.i2c: bus 1 rev0.12 at 400 kHz
[ 1.043762] omap_i2c
48060000.i2c: did not get pins for i2c error: -19
[ 1.050964] omap_i2c
48060000.i2c: bus 2 rev0.12 at 100 kHz
[ 1.056823] omap_i2c
4807a000.i2c: did not get pins for i2c error: -19
[ 1.064025] omap_i2c
4807a000.i2c: bus 3 rev0.12 at 400 kHz
This happens because omap4 dts file is not adapted to use i2c through pinctrl
framework. Populating i2c pinctrl data to get rid of the error.
Tested on omap4430 sdp with 3.8-rc6 kernel.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reported-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Florian Vaussard [Wed, 23 Jan 2013 17:56:51 +0000 (18:56 +0100)]
ARM: dts: omap3-overo: Add support for pwm-leds
Convert the on-board LED connected to the TWL4030 (LEDB) to use
pwm-leds.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Peter Ujfalusi [Fri, 18 Jan 2013 14:00:47 +0000 (15:00 +0100)]
ARM: dts: omap4-sdp: Add support for pwm-backlight
Section to describe the backlight for the LCD panels.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Peter Ujfalusi [Mon, 12 Nov 2012 14:06:56 +0000 (15:06 +0100)]
ARM: dts: omap4-sdp: Add support for pwm-leds (keypad and charging LED)
Sections to describe the pwm-leds in the system.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Peter Ujfalusi [Fri, 18 Jan 2013 14:16:18 +0000 (15:16 +0100)]
ARM: dts: omap3-beagle-xm: Use pwm-leds for pmu_stat LED
We have proper driver stack to handle the pmu_stat LED which is connected
PWMB of twl4030.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Peter Ujfalusi [Wed, 7 Nov 2012 14:05:20 +0000 (15:05 +0100)]
ARM: dts: twl6030: Add PWM support
Enable support for the PWMs and LED as PWM drivers.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Peter Ujfalusi [Wed, 7 Nov 2012 14:05:00 +0000 (15:05 +0100)]
ARM: dts: twl4030: Add PWM support
Enable support for the PWMs and LEDs as PWM drivers.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
AnilKumar Ch [Wed, 14 Nov 2012 18:08:25 +0000 (23:38 +0530)]
ARM: dts: AM33XX: Add memory resource to d_can node
Add a new address space/memory resource to d_can device tree node. D_CAN
RAM initialization is achieved through RAMINIT register which is part of
AM33XX control module address space. D_CAN RAM init or de-init should be
done by writing instance corresponding value to control module register.
Till we have a separate control module driver to write to control module,
d_can driver will handle the register writes to control module by itself.
So a new address space to represent this control module register is added
to d_can driver.
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
AnilKumar Ch [Wed, 14 Nov 2012 18:08:24 +0000 (23:38 +0530)]
ARM: dts: AM33XX: Add d_can instances to aliases
Add d_can instances to aliases node to get the D_CAN instance number
from the driver. To initialize D_CAN message RAM, corresponding instance
number is required.
To initialize instance 0 message RAM then 0x1 should be written and for
instance 1 message RAM, 0x2 should be written to control module register.
With device-tree framework ip instance number is "-1" by default for all
instances. To get device id/instance number then modules should be added
to DT "aliases" node. of_alias_get_id() gives the device id number based
on number of alias nodes present in "aliases node".
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Matthias Brugger [Wed, 12 Dec 2012 15:33:42 +0000 (16:33 +0100)]
ARM: dts: omap3-igep: Add uart1 and uart2 to igep boards
This is a follow-up to Javier Martinez effort adding initial
device tree support to IGEP technology devices [1].
It adds uart1 and uart2 bindings to the generic dtsi for the IGEP boards.
[1] http://www.spinics.net/lists/linux-omap/msg83409.html
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Javier Martinez Canillas [Wed, 19 Dec 2012 13:33:10 +0000 (14:33 +0100)]
ARM: dts: omap3: Add support for IGEP COM Module
ISEE IGEP COM Module is an TI OMAP3 SoC computer on module.
This patch adds an initial device tree support to boot an
IGEP COM Module from the MMC/SD.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com>
[b-cousson@ti.com: Update the Makefile for 3.8-rc2]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Javier Martinez Canillas [Wed, 19 Dec 2012 13:33:09 +0000 (14:33 +0100)]
ARM: dts: omap3: Add support for IGEPv2 board
ISEE IGEPv2 is an TI OMAP3 SoC based embedded board.
This patch adds an initial device tree support to boot
an IGEPv2 from the MMC/SD.
Currently is working everything that is supported by DT
on OMAP3 SoCs (MMC/SD, GPIO LEDs, EEPROM, TWL4030 audio).
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com>
[benoit.cousson@linaro.org: Update the Makefile for 3.8-rc2]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Javier Martinez Canillas [Wed, 19 Dec 2012 13:33:08 +0000 (14:33 +0100)]
ARM: dts: omap3: Add generic DT support for IGEP devices
Add a generic .dtsi device tree source file for the
common characteristics across IGEP Technology devices.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
AnilKumar Ch [Wed, 21 Nov 2012 11:52:17 +0000 (17:22 +0530)]
ARM: dts: AM33XX: Rename I2C and GPIO nodes
Rename I2C and GPIO nodes according to AM33XX TRM. According to
AM33XX TRM device instances are starting from "0" like i2c0, i2c1
and i2c3.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
[panto@antoniou-consulting.com: initial patch by pantelis's]
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Benoit Cousson [Mon, 8 Apr 2013 22:11:05 +0000 (00:11 +0200)]
Merge tag 'omap-devel-b-for-3.10' of git://git./linux/kernel/git/pjw/omap-pending into for_3.10/dts_merged
Roger Quadros [Wed, 20 Mar 2013 15:45:00 +0000 (17:45 +0200)]
ARM: dts: omap3-beagle: Add USB Host support
Provide RESET and Power regulators for the USB PHY,
the USB Host port mode and the PHY device.
Also provide pin multiplexer information for USB host
pins.
CC: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:59 +0000 (17:44 +0200)]
ARM: dts: OMAP3: Add HS USB Host IP nodes
Adds device nodes for HS USB Host module, TLL module,
OHCI and EHCI controllers.
CC: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:58 +0000 (17:44 +0200)]
ARM: dts: OMAP4: Add HS USB Host IP nodes
Adds device nodes for HS USB Host module, TLL module,
OHCI and EHCI controllers.
CC: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:57 +0000 (17:44 +0200)]
ARM: OMAP: zoom: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulator
and the NOP PHY device.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:56 +0000 (17:44 +0200)]
ARM: OMAP3: overo: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulator
and the NOP PHY device.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:55 +0000 (17:44 +0200)]
ARM: OMAP3: omap3touchbook: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulator
and the NOP PHY device.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:54 +0000 (17:44 +0200)]
ARM: OMAP3: omap3stalker: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulator
and the NOP PHY device.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:53 +0000 (17:44 +0200)]
ARM: OMAP3: omap3pandora: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulator
and NOP PHY device. VAUX2 supplies the PHY's VCC.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:52 +0000 (17:44 +0200)]
ARM: OMAP3: omap3evm: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulator
and the NOP PHY device. VAUX2 supplies the PHY's VCC.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:51 +0000 (17:44 +0200)]
ARM: OMAP3: igep0020: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulators
and the NOP PHY devices.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:50 +0000 (17:44 +0200)]
ARM: OMAP: devkit8000: Adapt to ehci-omap changes
Remove deprecated USBHS platform data.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:49 +0000 (17:44 +0200)]
ARM: OMAP3: cm-t3517: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulators
and the NOP PHY devices.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:48 +0000 (17:44 +0200)]
ARM: OMAP3: cm-t35: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulators
and the NOP PHY devices.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:47 +0000 (17:44 +0200)]
ARM: OMAP: AM3517evm: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulators
and the NOP PHY device.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:46 +0000 (17:44 +0200)]
ARM: OMAP: AM3517crane: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's VCC and RESET
regulators and the NOP PHY device.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:45 +0000 (17:44 +0200)]
ARM: OMAP3: 3630SDP: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulators
and the NOP PHY devices.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:44 +0000 (17:44 +0200)]
ARM: OMAP3: 3430SDP: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's RESET regulators
and the NOP PHY devices.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:43 +0000 (17:44 +0200)]
ARM: OMAP3: Beagle: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's VCC and RESET
regulators and the NOP PHY device.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:42 +0000 (17:44 +0200)]
ARM: OMAP2+: omap4panda: Adapt to ehci-omap changes
Use usbhs_init_phys() to register the PHY's VCC and RESET
regulators and the NOP PHY device.
Get rid of managing the PHY clock as it will be done by the PHY driver.
For that to work we create a clock alias that links the PHY clock name
to the PHY device name.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Roger Quadros [Wed, 20 Mar 2013 15:44:41 +0000 (17:44 +0200)]
ARM: OMAP2+: omap-usb-host: Add usbhs_init_phys()
This helper allows board support code to add the PHY's
VCC and RESET regulators which are GPIO controlled as well
as the NOP PHY device.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Rajendra Nayak [Mon, 1 Apr 2013 02:22:23 +0000 (20:22 -0600)]
ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass
omap3_noncore_dpll_set_rate() attempts an enable of bypass clk as well
as ref clk for every .set_rate attempt on a noncore DPLL, regardless of
whether the .set_rate results in the DPLL being locked or put in bypass.
Early at boot, while some of these DPLLs are programmed and locked
(using .set_rate for the DPLL), this causes an ordering issue.
For instance, on OMAP5, the USB DPLL derives its bypass clk from ABE DPLL.
If a .set_rate of USB DPLL which programmes the M,N and locks it is called
before the one for ABE, the enable of USB bypass clk (derived from ABE DPLL)
then attempts to lock the ABE DPLL and fails as the M,N values for ABE
are yet to be programmed.
To get rid of this ordering needs, enable bypass clk for a DPLL as part
of its .set_rate only when its being put in bypass, and only enable the
ref clk when its locked.
Reported-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Paul Walmsley [Mon, 1 Apr 2013 02:22:22 +0000 (20:22 -0600)]
ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0
_pwrdm_save_clkdm_state_and_activate() tried to test one of its
unsigned arguments to determine whether it was less than zero. Fix by
moving the error test to the caller.
Reported-by: Chen Gang <gang.chen@asianux.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Rajendra Nayak [Mon, 1 Apr 2013 02:22:22 +0000 (20:22 -0600)]
ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag
_HWMOD_WAKEUP_ENABLED is currently unused across the hwmod
framework. Just get rid of it, so we have one less flag to
worry about.
Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Vaibhav Hiremath [Mon, 1 Apr 2013 02:22:21 +0000 (20:22 -0600)]
ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk
WDT1 module can take one of the below clocks as input functional
clock -
- On-Chip 32K RC Osc [default/reset]
- 32K from PRCM
The On-Chip 32K RC Osc clock is not an accurate clock-source as per
the design/spec, so as a result, for example, timer which supposed
to get expired @60Sec, but will expire somewhere ~@40Sec, which is
not expected by any use-case.
The solution here is to switch the input clock-source to PRCM
generated 32K clock-source during boot-time itself.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <benoit.cousson@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Vaibhav Hiremath [Mon, 1 Apr 2013 02:22:21 +0000 (20:22 -0600)]
ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry
This patch adds sysc definitions to the wdt1 hwmod entry, which in-turn
makes sure that sysc idle bit-fields are configured to valid state on
enable/disable callbacks.
With the recent submitted patch from Santosh Shilimkar,
"ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc"
(commit:
4a98c2d89), it is required to add sysconf
information to each valid hwmod entry, else device will not be
come out from idle state properly and leads to below kernel
crash -
[2.190237] Unhandled fault: external abort on non-linefetch (0x1028) at
0xf9e35034
[2.198325] Internal error: : 1028 [#1] SMP ARM
[2.203101] Modules linked in:
[2.206334] CPU: 0 Not tainted (
3.9.0-rc3-00059-gd114294#1)
[2.212679] PC is at omap_wdt_disable.clone.5+0xc/0x60
[2.218090] LR is at omap_wdt_probe+0x184/0x1fc
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <benoit.cousson@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Linus Torvalds [Sun, 31 Mar 2013 22:12:43 +0000 (15:12 -0700)]
Linux 3.9-rc5
Linus Torvalds [Sun, 31 Mar 2013 18:41:47 +0000 (11:41 -0700)]
Merge branch 'fixes' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine fixes from Vinod Koul:
"Two fixes for slave-dmaengine.
The first one is for making slave_id value correct for dw_dmac and
the other one fixes the endieness in DT parsing"
* 'fixes' of git://git.infradead.org/users/vkoul/slave-dma:
dw_dmac: adjust slave_id accordingly to request line base
dmaengine: dw_dma: fix endianess for DT xlate function
Linus Torvalds [Sun, 31 Mar 2013 18:40:33 +0000 (11:40 -0700)]
Merge branch 'v4l_for_linus' of git://git./linux/kernel/git/mchehab/linux-media
Pull media fixes from Mauro Carvalho Chehab:
"For a some fixes for Kernel 3.9:
- subsystem build fix when VIDEO_DEV=y, VIDEO_V4L2=m and I2C=m
- compilation fix for arm multiarch preventing IR_RX51 to be selected
- regression fix at bttv crop logic
- s5p-mfc/m5mols/exynos: a few fixes for cameras on exynos hardware"
* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
[media] [REGRESSION] bt8xx: Fix too large height in cropcap
[media] fix compilation with both V4L2 and I2C as 'm'
[media] m5mols: Fix bug in stream on handler
[media] s5p-fimc: Do not attempt to disable not enabled media pipeline
[media] s5p-mfc: Fix encoder control 15 issue
[media] s5p-mfc: Fix frame skip bug
[media] s5p-fimc: send valid m2m ctx to fimc_m2m_job_finish
[media] exynos-gsc: send valid m2m ctx to gsc_m2m_job_finish
[media] fimc-lite: Fix the variable type to avoid possible crash
[media] fimc-lite: Initialize 'step' field in fimc_lite_ctrl structure
[media] ir: IR_RX51 only works on OMAP2
Linus Torvalds [Sun, 31 Mar 2013 18:38:59 +0000 (11:38 -0700)]
Merge tag 'for-linus-
20130331' of git://git.kernel.dk/linux-block
Pull block fixes from Jens Axboe:
"Alright, this time from 10K up in the air.
Collection of fixes that have been queued up since the merge window
opened, hence postponed until later in the cycle. The pull request
contains:
- A bunch of fixes for the xen blk front/back driver.
- A round of fixes for the new IBM RamSan driver, fixing various
nasty issues.
- Fixes for multiple drives from Wei Yongjun, bad handling of return
values and wrong pointer math.
- A fix for loop properly killing partitions when being detached."
* tag 'for-linus-
20130331' of git://git.kernel.dk/linux-block: (25 commits)
mg_disk: fix error return code in mg_probe()
rsxx: remove unused variable
rsxx: enable error return of rsxx_eeh_save_issued_dmas()
block: removes dynamic allocation on stack
Block: blk-flush: Fixed indent code style
cciss: fix invalid use of sizeof in cciss_find_cfgtables()
loop: cleanup partitions when detaching loop device
loop: fix error return code in loop_add()
mtip32xx: fix error return code in mtip_pci_probe()
xen-blkfront: remove frame list from blk_shadow
xen-blkfront: pre-allocate pages for requests
xen-blkback: don't store dev_bus_addr
xen-blkfront: switch from llist to list
xen-blkback: fix foreach_grant_safe to handle empty lists
xen-blkfront: replace kmalloc and then memcpy with kmemdup
xen-blkback: fix dispatch_rw_block_io() error path
rsxx: fix missing unlock on error return in rsxx_eeh_remap_dmas()
Adding in EEH support to the IBM FlashSystem 70/80 device driver
block: IBM RamSan 70/80 error message bug fix.
block: IBM RamSan 70/80 branding changes.
...
Paul Walmsley [Sun, 31 Mar 2013 00:04:40 +0000 (00:04 +0000)]
Revert "lockdep: check that no locks held at freeze time"
This reverts commit
6aa9707099c4b25700940eb3d016f16c4434360d.
Commit
6aa9707099c4 ("lockdep: check that no locks held at freeze time")
causes problems with NFS root filesystems. The failures were noticed on
OMAP2 and 3 boards during kernel init:
[ BUG: swapper/0/1 still has locks held! ]
3.9.0-rc3-00344-ga937536 #1 Not tainted
-------------------------------------
1 lock held by swapper/0/1:
#0: (&type->s_umount_key#13/1){+.+.+.}, at: [<
c011e84c>] sget+0x248/0x574
stack backtrace:
rpc_wait_bit_killable
__wait_on_bit
out_of_line_wait_on_bit
__rpc_execute
rpc_run_task
rpc_call_sync
nfs_proc_get_root
nfs_get_root
nfs_fs_mount_common
nfs_try_mount
nfs_fs_mount
mount_fs
vfs_kern_mount
do_mount
sys_mount
do_mount_root
mount_root
prepare_namespace
kernel_init_freeable
kernel_init
Although the rootfs mounts, the system is unstable. Here's a transcript
from a PM test:
http://www.pwsan.com/omap/testlogs/test_v3.9-rc3/
20130317194234/pm/37xxevm/37xxevm_log.txt
Here's what the test log should look like:
http://www.pwsan.com/omap/testlogs/test_v3.8/
20130218214403/pm/37xxevm/37xxevm_log.txt
Mailing list discussion is here:
http://lkml.org/lkml/2013/3/4/221
Deal with this for v3.9 by reverting the problem commit, until folks can
figure out the right long-term course of action.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Mandeep Singh Baines <msb@chromium.org>
Cc: Jeff Layton <jlayton@redhat.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: <maciej.rutecki@gmail.com>
Cc: Fengguang Wu <fengguang.wu@intel.com>
Cc: Trond Myklebust <Trond.Myklebust@netapp.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Ben Chan <benchan@chromium.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Tejun Heo <tj@kernel.org>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Sat, 30 Mar 2013 20:13:05 +0000 (13:13 -0700)]
Merge git://git./linux/kernel/git/nab/target-pending
Pull SCSI target fixes from Nicholas Bellinger:
"This includes the bug-fix for a >= v3.8-rc1 regression specific to
iscsi-target persistent reservation conflict handling (CC'ed to
stable), and a tcm_vhost patch to drop VIRTIO_RING_F_EVENT_IDX usage
so that in-flight qemu vhost-scsi-pci device code can detect the
proper vhost feature bits.
Also, there are two more tcm_vhost patches still being discussed by
MST and Asias for v3.9 that will be required for the in-flight qemu
vhost-scsi-pci device patch to function properly, and that should
(hopefully) be the last target fixes for this round."
* git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending:
target: Fix RESERVATION_CONFLICT status regression for iscsi-target special case
tcm_vhost: Avoid VIRTIO_RING_F_EVENT_IDX feature bit
Andy Shevchenko [Wed, 20 Feb 2013 11:52:17 +0000 (13:52 +0200)]
dw_dmac: adjust slave_id accordingly to request line base
On some hardware configurations we have got the request line with the offset.
The patch introduces convert_slave_id() helper for that cases. The request line
base is came from the driver data provided by the platform_device_id table.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>