Arnd Bergmann [Wed, 30 Nov 2016 22:20:47 +0000 (23:20 +0100)]
Merge tag 'zte-dt64-4.10' of git://git./linux/kernel/git/shawnguo/linux into next/dt64
Pull "ZTE arm64 device tree update for 4.10" from Shawn Guo:
Add clock controller device nodes, including one top clock controller,
two low speed clock controllers and one audio clock controller.
* tag 'zte-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: zx: Add clock controller nodes
Arnd Bergmann [Wed, 30 Nov 2016 22:10:24 +0000 (23:10 +0100)]
Merge tag 'berlin64-dt-for-v4.10-1' of git://git./linux/kernel/git/jszhang/linux-berlin into next/dt64
Pull "Berlin64 DT changes for v4.10" from Jisheng Zhang:
- fix some dtc compiler warnings
* tag 'berlin64-dt-for-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/jszhang/linux-berlin:
arm64: dts: berlin4ct-dmp: add missing unit name to /memory node
arm64: dts: berlin4ct-stb: add missing unit name to /memory node
arm64: dts: berlin4ct: add missing unit name to /soc node
Arnd Bergmann [Wed, 30 Nov 2016 22:07:33 +0000 (23:07 +0100)]
Merge tag 'v4.10-rockchip-dts64-2' of git://git./linux/kernel/git/mmind/linux-rockchip into next/dt64
Pull "Rockchip dts64 changes for 4.10" from Heiko Stübner:
Some more powerdomains and usb2-otg support for the rk3399 as well
as the binding doc for the 32bit rk1108 eval board to prevent it
from conflicting with the recently added 64bit px5 board.
* tag 'v4.10-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: add rockchip RK1108 Evaluation board
arm64: dts: rockchip: add usb2-phy otg-port support for rk3399
arm64: dts: rockchip: add pd_sd power-domain node for rk3399
arm64: dts: rockchip: add eMMC's power domain support for rk3399
arm64: dts: rockchip: add backlight support for rk3399 evb board
arm64: dts: rockchip: add gmac needed pclk for rk3399 pd
Arnd Bergmann [Wed, 30 Nov 2016 21:58:54 +0000 (22:58 +0100)]
Merge tag 'qcom-arm64-for-4.10-2' of git://git./linux/kernel/git/agross/linux into next/dt64
Pull "Qualcomm ARM64 Updates for v4.10 - Part 2" from Andy Gross:
* Add SDHC xo clk and 1.8V DDR support
* tag 'qcom-arm64-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: qcom: msm8916: Add ddr support to sdhc1
ARM: dts: Add xo to sdhc clock node on qcom platforms
Arnd Bergmann [Wed, 30 Nov 2016 21:40:08 +0000 (22:40 +0100)]
Merge tag 'samsung-dt64-4.10-2' of git://git./linux/kernel/git/krzk/linux into next/dt64
Pull "Samsung DeviceTree arm64 second update for v4.10" from Krzysztof Kozłowski:
1. Add Performance Monitor Unit to Exynos7.
2. Add MFC, JPEG and Gscaler to Exynos5433 based TM2 board.
3. Cleanups and fixes for recently added TM2 and TM2E boards.
* tag 'samsung-dt64-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Enable HS400 mode for eMMC for TM2
arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash
arm64: dts: exynos: TM2 - add support for MFC video codec device
arm64: dts: exynos: TM2 - add support for JPEG codec device
arm64: dts: exynos: TM2 - add support for GScaler devices
arm64: dts: exynos: TM2 - remove unused UART3 and set clocks directly on CMU
arm64: dts: exynos: Assign parent clock of the clkout clock for TM2 board
arm64: dts: exynos: Move FSYS CMU configuration from Exynos5433 dtsi to TM2 dts
arm64: dts: exynos: Add missing parent clocks to audio block in Exynos5433 SoC
arm64: dts: exynos: Fix FSYS CMU parent clocks in Exynos5433 SoC
arm64: dts: exynos: Fix IRQ type flags for Exynos5433 SoC
arm64: dts: Add ARM PMU node for exynos7
Arnd Bergmann [Wed, 30 Nov 2016 16:57:26 +0000 (17:57 +0100)]
Merge tag 'arm-soc/for-4.10/devicetree-arm64' of github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom devicetree-arm64 changes for 4.10" from Florian Fainelli:
This pull request contains Broadcom ARM64 based SoC Device Tree changes for
4.10, please pull the following:
- Robin updates the Northstart 2 DTS to use the generic IOMMU binding
- Scott renames the Broadcom Northstar 2 binding document to use a standard name
including the brcm vendor prefix
- Kamal adds the QSPI Device Tree node to the Northstar 2 SoC and updates the
Northstar 2 SVK reference board DTS file with it enabled.
- Rob adds the Device Tree node for the Broadcom PDC (mailbox) hardware to the
Northstar 2 SoC
- Jon enables the SDIO1 block and adds proper PCIe PHYs Device Tree nodes to the
Northstar 2 SoC
- Ray adds required properties NAND controller properties to make NAND work on
the Northstar 2 SVK board, this was submitted as a 4.9 fixes and is included
here to resolve DTS file merges
- Andrea removes an incorrect power LED from the Raspberry Pi 3 DTS
- Andreas fixes the compatible string for the BCM2837 (Raspberry Pi 3)
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also uses the proper DTSI file to define the USB host mode
for the USB Device Tree nodes
* tag 'arm-soc/for-4.10/devicetree-arm64' of http://github.com/Broadcom/stblinux: (23 commits)
arm64: dts: NS2: Add PCI PHYs
arm64: dts: NS2: enable sdio1
ARM64: dts: bcm2837-rpi-3-b: remove incorrect pwr LED
ARM64: bcm2835: dts: add thermal node to device-tree of bcm2837
ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
dt: bindings: add thermal device driver for bcm2835
arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver.
ARM: dts: bcm283x: fix typo in mailbox address
DT: binding: bcm2835-mbox: fix address typo in example
ARM64: dts: bcm2835: Fix bcm2837 compatible string
arm64: dts: Update Broadcom NS2 to generic IOMMU binding
arm64: dts: Updated NAND DT properties for NS2 SVK
arm64: dts: rename ns2.txt to brcm,ns2.txt
ARM64: dts: Add QSPI Device Tree node for NS2
ARM64: dts: bcm283x: Use dtsi for USB host mode
ARM: dts: bcm283x: drop alt3 from &gpio
ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from &gpio
ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from &gpio
...
Arnd Bergmann [Wed, 30 Nov 2016 16:07:13 +0000 (17:07 +0100)]
Merge tag 'tegra-for-4.10-arm64-dt-numeric-ids' of git://git./linux/kernel/git/tegra/linux into next/dt64
Pull "arm64: tegra: Device tree changes for v4.10-rc1" from Thierry Reding:
This adds initial support for Tegra186, the P3310 processor module as
well as the P2771 development board. Not much is functional, but there
is enough to boot to an initial ramdisk with debug serial output.
* tag 'tegra-for-4.10-arm64-dt-numeric-ids' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add NVIDIA P2771 board support
arm64: tegra: Enable PSCI on P3310
arm64: tegra: Add NVIDIA P3310 processor module support
arm64: tegra: Add GPIO controllers on Tegra186
arm64: tegra: Add SDHCI controllers on Tegra186
arm64: tegra: Add I2C controllers on Tegra186
arm64: tegra: Add serial ports on Tegra186
arm64: tegra: Add CPU nodes for Tegra186
arm64: tegra: Add Tegra186 support
Arnd Bergmann [Wed, 30 Nov 2016 15:51:07 +0000 (16:51 +0100)]
Merge tag 'renesas-arm64-dt2-for-v4.10' of git://git./linux/kernel/git/horms/renesas into next/dt64
Pull "Second Round of Renesas ARM64 Based SoC DT Updates for v4.10" from Simon Horman:
Enhancements:
* Add device nodes for PRR
* Add m3ulcb board
* Enable I2C on r8a7796/salvator-x board
* Enable SDHI0 on h3ulcb board
* tag 'renesas-arm64-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7796: Add device node for PRR
arm64: dts: r8a7795: Add device node for PRR
arm64: dts: h3ulcb: rename SDHI0 pins
arm64: dts: h3ulcb: enable SDHI2
arm64: dts: m3ulcb: enable SDHI2
arm64: dts: m3ulcb: enable SDHI0
arm64: dts: m3ulcb: enable WDT
arm64: dts: m3ulcb: enable EXTALR clk
arm64: dts: m3ulcb: enable GPIO keys
arm64: dts: m3ulcb: enable GPIO leds
arm64: dts: m3ulcb: enable SCIF clk and pins
arm64: dts: m3ulcb: initial device tree
arm64: dts: m3ulcb: add M3ULCB board DT bindings
arm64: dts: h3ulcb: update header
arm64: dts: h3ulcb: update documentation with official board name
arm64: dts: r8a7796: salvator-x: enable I2C
arm64: dts: r8a7796: Enable I2C DMA
arm64: dts: r8a7796: add I2C support
Arnd Bergmann [Wed, 30 Nov 2016 14:08:55 +0000 (15:08 +0100)]
arm64: dts: fix build errors from missing dependencies
Two branches were incorrectly sent without having the necessary
header file changes. Rather than back those out now, I'm replacing
the symbolic names for the clks and resets with the numeric
values to get 'make allmodconfig dtbs' back to work.
After the header file changes are merged, we can revert this
patch.
Fixes:
6bc37fa ("arm64: dts: add Allwinner A64 SoC .dtsi")
Fixes:
50784e6 ("dts: arm64: db820c: add pmic pins specific dts file")
Acked-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Nov 2016 23:49:49 +0000 (00:49 +0100)]
Merge tag 'mvebu-dt64-4.10-2' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt64 for 4.10 (part 2)" from Gregory CLEMENT:
Fix DTC warning on Armada 37xx and 7K/8K
* tag 'mvebu-dt64-4.10-2' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: Fixup memory DT warning for Armada 37xx
arm64: dts: marvell: Fixup config-space DT warning For Armada 7K/8K
arm64: dts: marvell: Fixup internal-regs DT warning for Armada 37xx
Niklas Cassel [Fri, 14 Oct 2016 13:09:13 +0000 (15:09 +0200)]
ARM: dts: artpec: add pcie support
Add PCIe support to the ARTPEC-6 SoC. This uses the existing
pcie-artpec6 driver.
So, all that is needed is device tree entries in the DTS.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Jesper Nilsson <jespern@axis.com>
Jisheng Zhang [Tue, 6 Sep 2016 08:51:23 +0000 (16:51 +0800)]
arm64: dts: berlin4ct-dmp: add missing unit name to /memory node
This patch fixes the following DTC warning with W=1:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Jisheng Zhang [Tue, 6 Sep 2016 08:49:17 +0000 (16:49 +0800)]
arm64: dts: berlin4ct-stb: add missing unit name to /memory node
This patch fixes the following DTC warning with W=1:
"Node /memory has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Jisheng Zhang [Tue, 6 Sep 2016 08:44:59 +0000 (16:44 +0800)]
arm64: dts: berlin4ct: add missing unit name to /soc node
This patch fixes the following DTC warning with W=1:
"Node /soc has a reg or ranges property, but no unit name"
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Ritesh Harjani [Mon, 21 Nov 2016 06:37:22 +0000 (12:07 +0530)]
arm64: dts: qcom: msm8916: Add ddr support to sdhc1
This adds mmc-ddr-1_8v support to DT for sdhc1 of msm8916.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Jaehoon Chung [Wed, 23 Nov 2016 07:43:34 +0000 (16:43 +0900)]
arm64: dts: exynos: Enable HS400 mode for eMMC for TM2
TM2 can support the HS400 mode, but eMMC is working in the lowest mode.
This patch adds the properties for HS400 and other modes.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Ritesh Harjani [Mon, 21 Nov 2016 06:37:14 +0000 (12:07 +0530)]
ARM: dts: Add xo to sdhc clock node on qcom platforms
Add xo entry to sdhc clock node on all qcom platforms.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Andy Gross [Wed, 23 Nov 2016 17:10:57 +0000 (11:10 -0600)]
Merge tag 'qcom-arm64-for-4.10' into arm64-for-4.10-2
Qualcomm ARM64 Updates for v4.10
* Add Hexagon SMD/PIL nodes
* Add DB820c PMIC pins
* Fixup APQ8016 voltage ranges
* Add various MSM8996 nodes to support SMD/SMEM/SMP2P
* Add support for Huawei Nexus 6P (Angler)
* Add support for LG Nexus 5x (Bullhead)
Florian Fainelli [Tue, 22 Nov 2016 05:09:19 +0000 (21:09 -0800)]
Merge tag 'bcm2835-dt-64-next-2016-11-18' into devicetree-arm64/next
This pull request brings thermal support to the BCM2837 DT, and a few
other fixes.
In order to get the thermal node that we're adjusting the compatible
string on, we have to merge in the bcm2835-dt-next branch.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Andy Yan [Mon, 14 Nov 2016 12:17:43 +0000 (20:17 +0800)]
dt-bindings: add rockchip RK1108 Evaluation board
RK1108 EVB is designed by Rockchip for CVR field.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
[split off from dts patch and to prevent conflicts with px5 addition]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Jon Mason [Thu, 17 Nov 2016 23:25:03 +0000 (18:25 -0500)]
arm64: dts: NS2: Add PCI PHYs
PCI PHYs are missing from the Northstar2 DT entries for the 2 PCI buses.
Add them so that PCI devices can be discovered.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Jon Mason [Thu, 17 Nov 2016 23:25:02 +0000 (18:25 -0500)]
arm64: dts: NS2: enable sdio1
Enable sdio1 in the Northstar2 SVK device tree file
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Jaehoon Chung [Mon, 21 Nov 2016 04:58:39 +0000 (13:58 +0900)]
arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash
Add the mshc_2 node for supporting T-Flash.
Also add the "mshc*" aliases. dwmmc driver should be assigned to
"ctrl_id" after parsing to "mshc". If there are no aliases for mshc,
then it might be set to the wrong capabilities.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Joseph Lo [Tue, 5 Jul 2016 09:04:31 +0000 (17:04 +0800)]
arm64: tegra: Add NVIDIA P2771 board support
The NVIDIA P2771 is composed of a P3310 processor module that connects
to the P2597 I/O board. It comes with a 1200x1920 MIPI DSI panel that is
connected via the P2597's display connector and has several connectors
such as HDMI, USB 3.0, PCIe and ethernet.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 17 Nov 2016 16:36:56 +0000 (17:36 +0100)]
arm64: tegra: Enable PSCI on P3310
The P3310 processor module comes ships with a firmware that implements
PSCI 1.0. Enable and use it to bring up all CPUs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Joseph Lo [Tue, 5 Jul 2016 09:04:30 +0000 (17:04 +0800)]
arm64: tegra: Add NVIDIA P3310 processor module support
The NVIDIA P3310 is a processor module used in several reference designs
that features a Tegra186 SoC, 8 GiB of LPDDR4 RAM, 32 GiB eMMC and other
essentials such as ethernet, WiFi and a PMIC. It is typically connected
to an I/O board (such as the P2597) that provides the connecters needed
to hook it up to the outside world.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Aug 2016 14:31:53 +0000 (16:31 +0200)]
arm64: tegra: Add GPIO controllers on Tegra186
Tegra186 has two GPIO controllers that are no longer compatible with the
controller found on earlier generations. One of these controllers exists
in an always-on partition of the SoC whereas the other can be clock- and
powergated.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Aug 2016 14:23:19 +0000 (16:23 +0200)]
arm64: tegra: Add SDHCI controllers on Tegra186
Tegra186 has a total of four SDHCI controllers that each support SD 4.2
(up to UHS-I speed), SDIO 4.1 (up to UHS-I speed), eSD 2.1, eMMC 5.1 and
SDHOST 4.1 (up to UHS-I speed).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Aug 2016 14:07:15 +0000 (16:07 +0200)]
arm64: tegra: Add I2C controllers on Tegra186
Tegra186 has a total of nine I2C controllers that are compatible with
the I2C controllers introduced in Tegra114. Two of these controllers
share pads with two DPAUX controllers (for AUX transactions).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 17 Nov 2016 15:29:32 +0000 (16:29 +0100)]
arm64: tegra: Add serial ports on Tegra186
The initial patch only added UARTA, but there's no reason we shouldn't
be adding all of them. While at it, also specify the missing clocks and
resets for UARTA.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Tue, 15 Nov 2016 12:01:08 +0000 (13:01 +0100)]
arm64: tegra: Add CPU nodes for Tegra186
Tegra186 has six CPUs: two CPUs are second generation Denver CPUs that
support ARMv8 and four CPUs are Cortex-A57 CPUs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Joseph Lo [Tue, 5 Jul 2016 09:04:29 +0000 (17:04 +0800)]
arm64: tegra: Add Tegra186 support
This adds the initial support of Tegra186 SoC. It provides enough to
enable the serial console and boot from an initial ramdisk.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
[treding@nvidia.com: remove leading 0 from unit-addresses]
[treding@nvidia.com: remove unused nvidia,bpmp property]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:17 +0000 (19:37 +0100)]
arm64: dts: r8a7796: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:16 +0000 (19:37 +0100)]
arm64: dts: r8a7795: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Tue, 8 Nov 2016 14:16:29 +0000 (17:16 +0300)]
arm64: dts: h3ulcb: rename SDHI0 pins
This changes SDHI0 pin names for H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Tue, 8 Nov 2016 14:16:19 +0000 (17:16 +0300)]
arm64: dts: h3ulcb: enable SDHI2
This supports SDHI2 for H3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Tue, 8 Nov 2016 14:14:42 +0000 (17:14 +0300)]
arm64: dts: m3ulcb: enable SDHI2
This supports SDHI2 for M3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Tue, 8 Nov 2016 14:14:21 +0000 (17:14 +0300)]
arm64: dts: m3ulcb: enable SDHI0
This supports SDHI0 on M3ULCB board SD card slot
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:08:12 +0000 (21:08 +0300)]
arm64: dts: m3ulcb: enable WDT
This supports watchdog timer for M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:08:02 +0000 (21:08 +0300)]
arm64: dts: m3ulcb: enable EXTALR clk
This enables EXTALR clock that can be used for the watchdog.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:07:43 +0000 (21:07 +0300)]
arm64: dts: m3ulcb: enable GPIO keys
This supports GPIO keys on M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:07:31 +0000 (21:07 +0300)]
arm64: dts: m3ulcb: enable GPIO leds
This supports GPIO leds on M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:07:20 +0000 (21:07 +0300)]
arm64: dts: m3ulcb: enable SCIF clk and pins
This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:07:09 +0000 (21:07 +0300)]
arm64: dts: m3ulcb: initial device tree
Add the initial device tree for the R8A7796 SoC based M3ULCB low cost
board (R-Car Starter Kit Pro)
This commit supports the following peripherals:
- SCIF (console)
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:06:57 +0000 (21:06 +0300)]
arm64: dts: m3ulcb: add M3ULCB board DT bindings
Add M3ULCB Device tree bindings Documentation, listing it as a supported
board.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:04:54 +0000 (21:04 +0300)]
arm64: dts: h3ulcb: update header
This updates H3ULCB device tree header with official board name
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:04:44 +0000 (21:04 +0300)]
arm64: dts: h3ulcb: update documentation with official board name
This updates H3ULCB Device tree bindings Documentation with
official board name
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ulrich Hecht [Wed, 26 Oct 2016 14:14:09 +0000 (16:14 +0200)]
arm64: dts: r8a7796: salvator-x: enable I2C
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ulrich Hecht [Wed, 26 Oct 2016 14:14:08 +0000 (16:14 +0200)]
arm64: dts: r8a7796: Enable I2C DMA
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ulrich Hecht [Wed, 26 Oct 2016 14:14:07 +0000 (16:14 +0200)]
arm64: dts: r8a7796: add I2C support
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Gregory CLEMENT [Mon, 7 Nov 2016 14:03:51 +0000 (15:03 +0100)]
ARM64: dts: marvell: Fixup memory DT warning for Armada 37xx
memory has a reg property so the unit name should contain an address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Gregory CLEMENT [Mon, 7 Nov 2016 14:02:06 +0000 (15:02 +0100)]
arm64: dts: marvell: Fixup config-space DT warning For Armada 7K/8K
config-space has a ranges property so the unit name should contain an
address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Gregory CLEMENT [Mon, 7 Nov 2016 14:00:15 +0000 (15:00 +0100)]
arm64: dts: marvell: Fixup internal-regs DT warning for Armada 37xx
internal-regs has a ranges property so the unit name should contain an
address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Olof Johansson [Sat, 19 Nov 2016 02:00:11 +0000 (18:00 -0800)]
Merge tag 'samsung-dt64-gic-flags-4.10' of git://git./linux/kernel/git/krzk/linux into next/dt64
Topic branch with DT arm64 changes for v4.10.
Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC
interrupts. Although this was working but with error messages like:
genirq: Setting trigger mode 0 for irq 16 failed
Use level high interrupt instead of type none. The choice of level high was
rather an arbitrary decision hoping it will work on each platform. Tests shown
no issues so far.
* tag 'samsung-dt64-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Use human-friendly symbols for interrupt properties in exynos7
arm64: dts: exynos: Fix invalid GIC interrupt flags in exynos7
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 19 Nov 2016 01:58:58 +0000 (17:58 -0800)]
Merge tag 'mvebu-dt64-4.10-1' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu dt64 for 4.10 (part 1)
Adding the new "community" board for Armada 3700
* tag 'mvebu-dt64-4.10-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: Add definition for the Globalscale Marvell ESPRESSOBin Board
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 19 Nov 2016 00:50:59 +0000 (16:50 -0800)]
Merge tag 'amlogic-dt64' of git://git./linux/kernel/git/khilman/linux-amlogic into next/dt64
Amlogic DT changes for 64-bit platforms for v4.10
Support for new drivers:
- USB
- i2c
- SPI
- mailbox/MHU
- PWM
- ethernet MAC, PHY
- secure monitor
- IR
- watchdog
* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (27 commits)
ARM64: dts: meson-gxbb-vega-s95: Add SD/SDIO/MMC and PWM nodes
ARM64: dts: meson-gxl-s905x: Enable internal ethernet PHY
ARM64: dts: meson-gxl-p23x: Enable ethernet
ARM64: dts: meson-gxl: Add ethernet nodes with internal PHY
ARM64: dts: amlogic: Reorder copyrights for meson-gx
ARM64: dts: meson-gxl-p23x: Enable IR receiver
ARM64: dts: meson-gxl-p23x: Add SD/SDIO/MMC and PWM nodes
ARM64: dts: meson-gxl-p23x: Add uart pinctrl
ARM64: dts: meson-gxl: Add MMC/SD/SDIO nodes
ARM64: dts: meson-gxl: Add i2c nodes
ARM64: dts: meson-gxl: Add clock nodes
ARM64: dts: meson-gxl: Add pinctrl nodes
ARM64: dts: meson-gxbb: Move common nodes to meson-gx
ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes
ARM64: dts: meson-gxbb: Add SRAM node
ARM64: dts: meson-gxbb: Add MMC nodes to Nexbox A95x
ARM64: dts: meson-gxbb: Add P20x Wifi SDIO support
ARM64: dts: meson-gxbb: Add Wifi 32K clock for p20x boards
ARM64: dts: meson-gxbb: add MMC support
ARM64: dts: meson-gxbb-odroidc2: Enable USB Nodes
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 19 Nov 2016 00:40:48 +0000 (16:40 -0800)]
Merge tag 'sunxi-dt64-for-4.10' of https://git./linux/kernel/git/mripard/linux into next/dt64
Allwinner arm64 DT changes for 4.10
Support for the Allwinner A64, their first armv8 SoC.
* tag 'sunxi-dt64-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm64: dts: add Pine64 support
Documentation: devicetree: add vendor prefix for Pine64
arm64: dts: add Allwinner A64 SoC .dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 18:38:12 +0000 (10:38 -0800)]
Merge tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi into next/dt64
ARM64: DT: Hisilicon SoC DT updates for 4.10
- Correct the hardware pin number of the usb node on the Hip06
- Add the Hisilicon Hip07 D05 board dts binding
- Add the initial dts for the Hip07 D05 board
- Fix the warning for the node without reg propery on the Hip06
- Fix the sas am max transmissions quirk property on the Hip06
- Disable the sas0 and sas2 on D03 board
- Add refclk node for SAS on the Hip06
* tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisi: add refclk node to hip06 dts files for SAS
arm64: dts: hisi: disable sas0 and sas2 for d03
arm64: dts: hisi: fix hip06 sas am-max-trans quirk
arm64: dts: hip06: Fix no reg property warning
arm64: dts: hisilicon: Add initial dts for Hip07 D05 board
Documentation: arm64: Add Hisilicon Hip07 D05 dts binding
arm64: dts: hip06: Correct hardware pin number of usb node
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 18:32:14 +0000 (10:32 -0800)]
Merge tag 'imx-dt64-4.10' of git://git./linux/kernel/git/shawnguo/linux into next/dt64
Freescale arm64 device tree updates for 4.10:
- Enable Thermal Monitoring Unit (TMU) for thermal management on
LS1043A and LS2080A.
- Add support for LS1046A SoC, which has similar peripherals as
LS1043A but integrates 4 A72 cores.
- Add two LS1046A based board support: LS1046A-QDS and LS1046A-RDB.
* tag 'imx-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: Add TMU device tree support for LS2080A
arm64: dts: ls1043a: Add TMU device tree support for LS1043A
arm64: dts: add LS1046A-QDS board support
Documentation: DT: Add entry for QorIQ LS1046A-QDS board
arm64: dts: add LS1046A-RDB board support
Documentation: DT: Add entry for QorIQ LS1046A-RDB board
arm64: dts: add QorIQ LS1046A SoC support
dt-bindings: ahci-fsl-qoriq: updated for SoC ls1046a
dt-bindings: qoriq-clock: add LS1043A/LS1046A/LS2080A compatible for clockgen
dt-bindings: i2c: adds two more nxp devices
dt-bindings: fsl: add LS1043A/LS1046A/LS2080A compatible for SCFG and DCFG
dt-bindings: fsl: Add LS1043A/LS1046A/LS2080A SoC compatible strings
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 17:42:26 +0000 (09:42 -0800)]
Merge tag 'qcom-arm64-for-4.10' of git://git./linux/kernel/git/agross/linux into next/dt64
Qualcomm ARM64 Updates for v4.10
* Add Hexagon SMD/PIL nodes
* Add DB820c PMIC pins
* Fixup APQ8016 voltage ranges
* Add various MSM8996 nodes to support SMD/SMEM/SMP2P
* Add support for Huawei Nexus 6P (Angler)
* Add support for LG Nexus 5x (Bullhead)
* tag 'qcom-arm64-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: msm8994 SoC and Huawei Angler (Nexus 6P) support
dt-bindings: qcom: Add msm899(2/4) bindings
arm64: dts: msm8992 SoC and LG Bullhead (Nexus 5X) support
arm64: dts: msm8996: Add SMP2P and APCS nodes
arm64: dts: msm8996: Add SMEM DT nodes
arm64: dts: msm8996: Add reserve-memory nodes
arm64: dts: msm8996: Add SMEM reserve-memory node
arm64: dts: apq8016-sbc: add analog audio support with multicodec
arm64: dts: qcom: Add missing interrupt entry for pm8994 gpios
arm64: dts: apq8016-sbc: Set up LDO2, LDO6 and LDO17 regulator voltage ranges
dts: arm64: db820c: add pmic pins specific dts file
arm64: dts: qcom: msm8916: Add Hexagon PIL node
arm64: dts: qcom: msm8916: Add Hexagon SMD edge
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 17:42:08 +0000 (09:42 -0800)]
Merge branch 'clk-qcom-8994' of git://git./linux/kernel/git/clk/linux into next/dt64
* 'clk-qcom-8994' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: qcom: Add support for msm8994 global clock controller
dt-bindings: qcom: clocks: Add msm8994 clock bindings
Marek Szyprowski [Fri, 18 Nov 2016 12:23:13 +0000 (13:23 +0100)]
arm64: dts: exynos: TM2 - add support for MFC video codec device
This patch adds device nodes for MFC video codec device to Exynos5433 SoC
dtsi and proper initial clock configuration to TM2 dts.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Marek Szyprowski [Fri, 18 Nov 2016 12:23:12 +0000 (13:23 +0100)]
arm64: dts: exynos: TM2 - add support for JPEG codec device
This patch adds device nodes for JPEG codec device to Exynos5433 SoC dtsi
and proper initial clock configuration to TM2 dts.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Marek Szyprowski [Fri, 18 Nov 2016 12:23:11 +0000 (13:23 +0100)]
arm64: dts: exynos: TM2 - add support for GScaler devices
This patch adds device nodes for GScaler devices to Exynos5433 SoC dtsi
and proper initial clock configuration to TM2 dts.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Marek Szyprowski [Thu, 17 Nov 2016 08:58:01 +0000 (09:58 +0100)]
arm64: dts: exynos: TM2 - remove unused UART3 and set clocks directly on CMU
UART3 device is not really needed for enabling audio block on TM2.
Enabling it made it working by enabling some common parent clocks,
what is now handled by improved exynos5433 clocks driver. Thus the UART3
device node can be safely disabled. The assigned-clocks entries are
however still needed, so move them under the respective CMU node.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Sylwester Nawrocki [Thu, 17 Nov 2016 08:58:00 +0000 (09:58 +0100)]
arm64: dts: exynos: Assign parent clock of the clkout clock for TM2 board
Without this patch the clkout clock is orphaned and sound doesn't
work properly.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Marek Szyprowski [Thu, 17 Nov 2016 08:57:59 +0000 (09:57 +0100)]
arm64: dts: exynos: Move FSYS CMU configuration from Exynos5433 dtsi to TM2 dts
Move initial FSYS CMU (related to USB 3.0 devices) clocks configuration
from generic exynos5433.dtsi file to exynos5433-tm2.dts, as this is
a board specific item.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Marek Szyprowski [Thu, 17 Nov 2016 08:57:58 +0000 (09:57 +0100)]
arm64: dts: exynos: Add missing parent clocks to audio block in Exynos5433 SoC
Audio PLL and oscillator clocks are proper parent clocks for AUD CMU.
They are not visible as such on first glance on Exynos5433 SoC docs,
but they are needed for this CMU to operate properly.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Marek Szyprowski [Thu, 17 Nov 2016 08:57:57 +0000 (09:57 +0100)]
arm64: dts: exynos: Fix FSYS CMU parent clocks in Exynos5433 SoC
This patch corrects FSYS CMU parent clocks specified in clock controller
node to let improved Exynos5433 clocks driver to control proper clocks
on FSYS<->TOP CMU boundary.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Marek Szyprowski [Thu, 17 Nov 2016 14:27:29 +0000 (15:27 +0100)]
arm64: dts: exynos: Fix IRQ type flags for Exynos5433 SoC
Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts. The
GIC requires shared interrupts to be edge rising or level high. Platform
declares support for both. Set all interrupts type to level high, as this
works fine - tested on Exynos5433-based TM2 board.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Olof Johansson [Fri, 18 Nov 2016 07:32:45 +0000 (23:32 -0800)]
Merge tag 'v4.10-rockchip-dts64-1' of git://git./linux/kernel/git/mmind/linux-rockchip into next/dt64
64bit devicetree changes including the px5 evaluation board
a fix for wrong i2c registers on rk3368 a new nvmem cell and
power-domain on rk3399 as well as moving mmc frequency
properties to the more generic max-frequency one.
* tag 'v4.10-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
arm64: dts: rockchip: add cpu-id nvmem cell node for rk3399
arm64: dts: rockchip: add sdmmc support for px5-evb
arm64: dts: rockchip: Add more properties for emmc on px5-evb
arm64: dts: rockchip: Add PX5 Evaluation board
arm64: dts: rockchip: add powerdomain for typec on rk3399
arm64: dts: rockchip: fix i2c resource error of rk3368
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 01:53:42 +0000 (17:53 -0800)]
Merge tag 'samsung-dt64-4.10' of git://git./linux/kernel/git/krzk/linux into next/dt64
Finally, I am really pleased to announce adding support for Exynos5433 ARMv8
SoC along with two boards. A lot of Samsung people contributed into this
but the final work and commits were done by Chanwoo Choi.
This means that for v4.10 we got:
1. Exynos5433 DTSI.
2. Two boards: TM2 and TM2E. These are (almost fully) working mobile phones.
* tag 'samsung-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board
arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board
arm64: dts: exynos: Add dtsi files for Samsung Exynos5433 64bit SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 01:46:58 +0000 (17:46 -0800)]
Merge tag 'uniphier-dt64-v4.10' of git://git./linux/kernel/git/masahiroy/linux-uniphier into next/dt64
UniPhier ARM64 SoC DT updates for v4.10
- Switch CPU enable-method from spin-table to PSCI
- Add OPP tables to support generic cpufreq driver
- Misc fixes
* tag 'uniphier-dt64-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: make compatible of syscon nodes SoC-specific
arm64: dts: uniphier: add CPU clocks and OPP tables for LD20 SoC
arm64: dts: uniphier: add CPU clock and OPP table for LD11 SoC
arm64: dts: uniphier: increase register region size of sysctrl node
arm64: dts: uniphier: switch over to PSCI enable method
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 01:46:45 +0000 (17:46 -0800)]
Merge tag 'v4.9-rc3' into next/dt64
Linux 4.9-rc3
* tag 'v4.9-rc3': (292 commits)
Linux 4.9-rc3
x86/smpboot: Init apic mapping before usage
ACPICA: Dispatcher: Fix interpreter locking around acpi_ev_initialize_region()
ACPICA: Dispatcher: Fix an unbalanced lock exit path in acpi_ds_auto_serialize_method()
ACPICA: Dispatcher: Fix order issue of method termination
ARC: module: print pretty section names
ARC: module: elide loop to save reference to .eh_frame
ARC: mm: retire ARC_DBG_TLB_MISS_COUNT...
ARC: build: retire old toggles
ARC: boot log: refactor cpu name/release printing
ARC: boot log: remove awkward space comma from MMU line
ARC: boot log: don't assume SWAPE instruction support
ARC: boot log: refactor printing abt features not captured in BCRs
ARCv2: boot log: print IOC exists as well as enabled status
ubifs: Fix regression in ubifs_readdir()
ubi: fastmap: Fix add_vol() return value test in ubi_attach_fastmap()
MAINTAINERS: Add entry for genwqe driver
VMCI: Doorbell create and destroy fixes
GenWQE: Fix bad page access during abort of resource allocation
vme: vme_get_size potentially returning incorrect value on failure
...
Olof Johansson [Fri, 18 Nov 2016 01:39:56 +0000 (17:39 -0800)]
Merge tag 'renesas-arm64-dt-for-v4.10' of git://git./linux/kernel/git/horms/renesas into next/dt64
Renesas ARM64 Based SoC DT Updates for v4.10
Enablement:
* Enable On-board eMMC
* Enable SDHI 0 & 3 with UHS
* Add SYS-DMAC controller nodes to r8a7796 SoC
* Populate EXTALR on r8a7796/salvator-x board; used by watchdog
* Add DU LVDS output endpoint on r8a7795/salvator-x board
* Add bias setting for USB1 pins on r8a7795/salvator-x board
Clean-Up:
* Remove FCP SoC-specific compatible strings
* tag 'renesas-arm64-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: renesas: r8a7796: add SYS-DMAC controller nodes
arm64: dts: r8a7795: salvator-x: add bias setting for usb1_pins
arm64: dts: r8a7796: salvator: enable on board eMMC
arm64: dts: r8a7795: salvator: enable on-board eMMC
arm64: dts: r8a7796: salvator-x: enable UHS for SDHI 0 & 3
arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3
arm64: dts: r8a7796: add SDHI nodes
arm64: dts: r8a7795: Remove FCP SoC-specific compatible strings
dt-bindings: media: renesas-fcp: Remove SoC-specific compatible strings
arm64: dts: r8a7795: salvator-x: Add DU LVDS output endpoint
arm64: dts: r8a7796: salvator-x: Populate EXTALR
arm64: dts: r8a7795: salvator-x: enable UHS for SDHI 0 & 3
Signed-off-by: Olof Johansson <olof@lixom.net>
Andrea Merello [Fri, 11 Nov 2016 17:38:21 +0000 (09:38 -0800)]
ARM64: dts: bcm2837-rpi-3-b: remove incorrect pwr LED
We are incorrectly defining the pwr LED, attaching it to a gpio line
that is wired to the Wi-Fi SDIO module (which fails due to this).
The actual power LED is connected to the GPIO expander, which we don't
expose currently.
Fixes:
9d56c22a7861 ("ARM: bcm2835: Add devicetree for the Raspberry Pi 3.")
Thanks-to: Eric Anholt <eric@anholt.net> [for clarifying we can't control the LED]
Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Martin Blumenstingl [Sat, 12 Nov 2016 13:07:19 +0000 (14:07 +0100)]
ARM64: dts: meson-gxbb-vega-s95: Add SD/SDIO/MMC and PWM nodes
All boards from the Tronsmart Vega S95 series are sharing similar MMC
based hardware.
sd_emmc_a is used to connect a Broadcom based SDIO wifi card (supported
by the brcmfmac driver). The 32.768KHz LPO clock for the wifi chip is
generated by PWM_E.
sd_emmc_b is routed to the SD-card. Unlike p20x there is no GPIO
regulator, meaning it only supports 3.3V (which seems to be hard-wired).
The eMMC chip is connected to sd_emmc_c and is implemented similar to
the meson-gxbb-p20x boards (meaning that hard-wired fixed regulators
are used).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 7 Nov 2016 10:43:57 +0000 (11:43 +0100)]
ARM64: dts: meson-gxl-s905x: Enable internal ethernet PHY
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 7 Nov 2016 10:43:56 +0000 (11:43 +0100)]
ARM64: dts: meson-gxl-p23x: Enable ethernet
Enable Ethernet on the p23x board, pinctrl attribute is only added for
the p230 board since the p231 only uses the Internal PHY.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 7 Nov 2016 10:43:55 +0000 (11:43 +0100)]
ARM64: dts: meson-gxl: Add ethernet nodes with internal PHY
Add Ethernet node with Internal PHY selection for the Amlogic GXL SoCs
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Andreas Färber [Sun, 6 Nov 2016 19:25:34 +0000 (20:25 +0100)]
ARM64: dts: amlogic: Reorder copyrights for meson-gx
meson-gx.dtsi was directly derived from meson-gxbb.dtsi, so keep the
copyrights in chronological order to not give a wrong impression.
Fixes:
c328666d58aa ("ARM64: dts: amlogic: Add Meson GX dtsi from GXBB")
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:46 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl-p23x: Enable IR receiver
Enable the Infraread Receiver on the p23x board.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:45 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl-p23x: Add SD/SDIO/MMC and PWM nodes
Add SD/SDIO/MMC nodes and PWM 32768Hz clock configuration to provide
storage and WiFi functionality on the p23x boards.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:44 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl-p23x: Add uart pinctrl
Add pinctrl attribute to p23x uart node.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:43 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl: Add MMC/SD/SDIO nodes
Add MMC/SD/SDIO nodes clock attributes for Amlogic Meson GXL.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:42 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl: Add i2c nodes
Add i2c nodes clock attributes for Amlogic Meson GXL.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:41 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl: Add clock nodes
Add clock node for Amlogic Meson GXL.
The GXBB compatible is retained since the GXBB clock tree is used for now.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:40 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl: Add pinctrl nodes
Add pinctrl nodes and pin definitions for Amlogic Meson GXL.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: use GXBB include until GXL pinctrl support merged]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:39 +0000 (17:44 +0100)]
ARM64: dts: meson-gxbb: Move common nodes to meson-gx
Move common nodes between GXBB and GXL in to the common GX dtsi.
Leave the clock attributes in the GXBB dtsi for now.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Wed, 19 Oct 2016 12:51:12 +0000 (14:51 +0200)]
ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Alim Akhtar [Sat, 12 Nov 2016 10:17:12 +0000 (15:47 +0530)]
arm64: dts: Add ARM PMU node for exynos7
This patch adds ARM Performance Monitor Unit dt node for exynos7.
PMU provides various statistics on the operation of the CPU and
memory system at runtime, which are very useful when debugging or
profiling code. This enables the same.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
[krzk: Squashed with "Add level for cpu dt node for exynos7"]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
William Wu [Mon, 7 Nov 2016 12:08:49 +0000 (20:08 +0800)]
arm64: dts: rockchip: add usb2-phy otg-port support for rk3399
Add otg-port nodes for both u2phy0 and u2phy1. The otg-port can
be used for USB2.0 part of USB3.0 OTG controller.
Signed-off-by: William Wu <wulf@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
John Garry [Mon, 7 Nov 2016 16:44:25 +0000 (00:44 +0800)]
arm64: dts: hisi: add refclk node to hip06 dts files for SAS
We will only maintain 1 dts for D03 and there are 50MHz
and 66MHz versions of D03: so we expect UEFI to update
refclk rate in the fdt at boot time.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
John Garry [Mon, 7 Nov 2016 16:44:24 +0000 (00:44 +0800)]
arm64: dts: hisi: disable sas0 and sas2 for d03
The SAS nodes sas0 and sas2 are not available on d03, so
disable them.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
John Garry [Mon, 7 Nov 2016 16:44:23 +0000 (00:44 +0800)]
arm64: dts: hisi: fix hip06 sas am-max-trans quirk
The string for the am max transmissions quirk property
is not correct -> fix it.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Mon, 24 Oct 2016 03:40:28 +0000 (11:40 +0800)]
arm64: dts: hip06: Fix no reg property warning
Warning (unit_address_vs_reg): Node /soc/ethernet@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@1 has a unit name, but no reg property
Fix warning when build with W=1.
Cc: Kejian Yan <yankejian@huawei.com>
Cc: Yisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Sat, 24 Sep 2016 09:14:23 +0000 (17:14 +0800)]
arm64: dts: hisilicon: Add initial dts for Hip07 D05 board
Adding initial dt file for Hip07 D05 board, it is with dual socket
and each socket has two SCCLs(supper cpu cluster), one SCCL contains
four clusters and each cluster has quard Cortex-A72.
Since each SCCL has their own DDR controller, it could be treated as
a separate numa node. Thus, there are four numa nodes(one node with
sixteen core) on Hip07 SoC.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Sat, 24 Sep 2016 09:14:22 +0000 (17:14 +0800)]
Documentation: arm64: Add Hisilicon Hip07 D05 dts binding
This patch adds documentation for the devicetree bindings used by
the DT files of Hisilicon Hip07 D05 board.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Sat, 24 Sep 2016 09:14:21 +0000 (17:14 +0800)]
arm64: dts: hip06: Correct hardware pin number of usb node
The ohci/ehci hardware pin number should be 640/641, correct them.
Fixes: commit
aa8d3e74f54d ("arm64: dts: Add initial dts for Hisilicon Hip06 D03 board")
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Hongtao Jia [Sun, 9 Oct 2016 06:47:06 +0000 (14:47 +0800)]
arm64: dts: ls2080a: Add TMU device tree support for LS2080A
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>