GitHub/moto-9609/android_kernel_motorola_exynos9610.git
9 years agodrm/i915: Fix SKL i_boost level
Ander Conselvan de Oliveira [Wed, 11 Nov 2015 13:15:54 +0000 (15:15 +0200)]
drm/i915: Fix SKL i_boost level

The i_boost level in the DDI translation tables are stored per level.
However, skl_ddi_set_iboos() would choose an entry of that table based
on the port argument.

Cc: Jim Bride <jim.bride@linux.intel.com>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Jim Bride <jim.bride@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1447247754-802-1-git-send-email-ander.conselvan.de.oliveira@intel.com
9 years agodrm/i915/skl: Removed assert for csr-fw-loading check during disabling dc6
Animesh Manna [Wed, 28 Oct 2015 21:59:07 +0000 (23:59 +0200)]
drm/i915/skl: Removed assert for csr-fw-loading check during disabling dc6

As during disabling dc6 no need to check for csr firmware
loading status, so removed the assert call (Requested by Damien).

Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-14-git-send-email-imre.deak@intel.com
9 years agodrm/i915/gen9: flush DMC fw loading work during system suspend
Imre Deak [Wed, 28 Oct 2015 21:59:06 +0000 (23:59 +0200)]
drm/i915/gen9: flush DMC fw loading work during system suspend

Currently during system s/r we enable/disable DC6, so before we do so
make sure that the firmware loading is complete.

Note that whether we need to enable DC6 for S3/S4 is still open.  At
least the firmware program is lost during S3 and we need to reprogram it
after resuming. Until this is clarified we keep the current behavior and
enable/disable DC6.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-13-git-send-email-imre.deak@intel.com
9 years agodrm/i915/gen9: Use flush_work to synchronize with dmc loader
Animesh Manna [Wed, 28 Oct 2015 21:59:05 +0000 (23:59 +0200)]
drm/i915/gen9: Use flush_work to synchronize with dmc loader

During driver unload to ensure we dont have any pending task,
flush_work added to complete firmware loading task.

v1: Initial version.

v2: As per review comments from Daniel,
Removed flush_work from skl_set_power_well. As we have taken
power well refernece and rpm count during firmware loading
by using display_power_domain_get/put - this will always
ensure rpm will be blocked if firmware is not loaded.

Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-12-git-send-email-imre.deak@intel.com
9 years agodrm/i915: Use request_firmware and our own async work
Daniel Vetter [Wed, 28 Oct 2015 21:59:04 +0000 (23:59 +0200)]
drm/i915: Use request_firmware and our own async work

Two benefits:
- We can use FW_LOADER_USERSPACE_FALLBACK.
- We can use flush_work to synchronize with the oustanding worker,
  which is a notch more obvious what it does than having a special
  completion.

The next patch will properly synchronize against the async loader in
the resume and unload code.

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-11-git-send-email-imre.deak@intel.com
9 years agodrm/i915/gen9: extract parse_csr_fw
Daniel Vetter [Thu, 12 Nov 2015 15:11:29 +0000 (17:11 +0200)]
drm/i915/gen9: extract parse_csr_fw

The loader function will get a bit more complicated soon, extract the
parsing code to make the control flow clearer. While doing that just
use dev_priv->csr.dmc_payload as the indicator for whether it all
suceeded or not.

v2-v3:
- unchanged
v4:
- rebased on top of latest drm-intel-nightly

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
[imre: remove note about BE cast from commit message, it's not relevant
 any more]
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
[Jani: fix checkpatch warn on multiple blank lines]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1447341089-2735-1-git-send-email-imre.deak@intel.com
9 years agodrm/i915/gen9: Use dev_priv in csr functions
Daniel Vetter [Wed, 28 Oct 2015 21:59:02 +0000 (23:59 +0200)]
drm/i915/gen9: Use dev_priv in csr functions

As all csr firmware related opertion are not using any
any data structures of drm framework level, so better to
use dev_priv instead of dev. it's a new style! :)

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-9-git-send-email-imre.deak@intel.com
9 years agodrm/i915/gen9: Don't try to load garbage dmc firmware on resume
Daniel Vetter [Wed, 28 Oct 2015 21:59:01 +0000 (23:59 +0200)]
drm/i915/gen9: Don't try to load garbage dmc firmware on resume

We need to make sure we don't put garbage into the hw if dmc firmware
loading failed mid-thru.

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-8-git-send-email-imre.deak@intel.com
9 years agodrm/i915/gen9: Simplify csr loading failure printing.
Daniel Vetter [Wed, 28 Oct 2015 21:59:00 +0000 (23:59 +0200)]
drm/i915/gen9: Simplify csr loading failure printing.

If we really want to we can be more verbose here, but we really don't
need an entire function for this.

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-7-git-send-email-imre.deak@intel.com
9 years agodrm/i915/gen9: Align line continuations in intel_csr.c.
Daniel Vetter [Wed, 28 Oct 2015 21:58:59 +0000 (23:58 +0200)]
drm/i915/gen9: Align line continuations in intel_csr.c.

Standard is to align continuations of parameter lists and if
conditions to the opening ( in i915 and drm code.

Apply this across the entire file since it was sticking out a bit too
much.

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
[imre: removed note about reg definitions from the commit message, it's
 not relevant any more]
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-6-git-send-email-imre.deak@intel.com
9 years agodrm/i915/gen9: Remove csr.state, csr_lock and related code.
Daniel Vetter [Thu, 12 Nov 2015 15:10:37 +0000 (17:10 +0200)]
drm/i915/gen9: Remove csr.state, csr_lock and related code.

This removes two anti-patterns:
- Locking shouldn't be used to synchronize with async work (of any
  form, whether callbacks, workers or other threads). This is what the
  mutex_lock/unlock seems to have been for in intel_csr_load_program.
  Instead ordering should be ensured with the generic
  wait_for_completion()/complete(). Or more specific functions
  provided by the core kernel like e.g.
  flush_work()/cancel_work_sync() in the case of synchronizing with a
  work item.

- Don't invent own completion like the following code did with the
  (already removed) wait_for(csr_load_status_get()) pattern - it's
  really hard to get these right when you want them to be _really_
  correct (and be fast) in all cases. Furthermore it's easier to read
  code using the well-known primitives than new ones using
  non-standard names.

Before enabling/disabling DC6 check if the firmware is loaded
successfully. This is guaranteed during runtime s/r, since otherwise we
don't enable RPM, but not during system s/r.

Note that it's still unclear whether we need to enable/disable DC6
during system s/r, until that's clarified, keep the current behavior and
enable/disable DC6.

Also after this patch there is a race during system s/r where the
firmware may not be loaded yet, that's addressed in an upcoming patch.

v2-v3:
- unchanged
v4:
- rebased on latest drm-intel-nightly

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
[imre: added code and note about checking if the firmware loaded ok,
 before enabling/disabling it]
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1447341037-2623-1-git-send-email-imre.deak@intel.com
9 years agodrm/i915/gen9: move assert_csr_loaded into intel_rpm.c
Daniel Vetter [Wed, 28 Oct 2015 21:58:57 +0000 (23:58 +0200)]
drm/i915/gen9: move assert_csr_loaded into intel_rpm.c

Avoids non-static functions since all the callers are in intel_rpm.c.

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
[imre: removed note about reg definitions from commit message, since
 it's not relevant any more]
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
[Jani: make assert_csr_loaded static]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-4-git-send-email-imre.deak@intel.com
9 years agodrm/i915: use correct power domain for csr loading
Daniel Vetter [Wed, 28 Oct 2015 21:58:56 +0000 (23:58 +0200)]
drm/i915: use correct power domain for csr loading

Grabbing a runtime pm reference with intel_runtime_pm_get will only
prevent device D3. But dmc firmware is required even earlier (namely
for the skl power well 2).

Hence we need to grab a rpm reference higher up in the hierarchy. For
simplicity just grab the _INIT display power well. That's a bit too
much, but since the firmware loading task should completely fairly
quickly this won't be a real problem really.

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-3-git-send-email-imre.deak@intel.com
9 years agodrm/i915/gen9: csr_init after runtime pm enable
Animesh Manna [Wed, 28 Oct 2015 21:58:55 +0000 (23:58 +0200)]
drm/i915/gen9: csr_init after runtime pm enable

Skl is fully dependent on dmc for going to low power state (dc5/dc6).
This requires a trigger from rpm. To ensure the dmc firmware
is available for runtime pm support rpm-reference-count is used
by not releasing the rpm reference if firmware loading is
not completed.

So moved the intel_csr_ucode_init call after runtime pm enable.

Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
[imre: moved the call right after power domain init to avoid race with
 the console modesetting]
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Reviewed-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446069547-24760-2-git-send-email-imre.deak@intel.com
9 years agodrm/i915: refactor stepping info retrieval
Jani Nikula [Tue, 20 Oct 2015 12:38:33 +0000 (15:38 +0300)]
drm/i915: refactor stepping info retrieval

Have only one if ladder for platforms and only one range check for
size. Makes it easier to handle new platforms. Remove the use of
negative return values in char, which might underflow to be positive for
some negative error codes.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445344713-1407-3-git-send-email-jani.nikula@intel.com
9 years agodrm/i915: constify bxt stepping info
Jani Nikula [Tue, 20 Oct 2015 12:38:32 +0000 (15:38 +0300)]
drm/i915: constify bxt stepping info

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445344713-1407-2-git-send-email-jani.nikula@intel.com
9 years agodrm/i915: fix indentation on skl stepping info
Jani Nikula [Tue, 20 Oct 2015 12:38:31 +0000 (15:38 +0300)]
drm/i915: fix indentation on skl stepping info

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445344713-1407-1-git-send-email-jani.nikula@intel.com
9 years agodrm/i915: Remove redundant check in i915_gem_obj_to_vma
Tvrtko Ursulin [Thu, 12 Nov 2015 11:59:55 +0000 (11:59 +0000)]
drm/i915: Remove redundant check in i915_gem_obj_to_vma

No need to verify VMA belongs to GGTT since:

1. The function must return a normal VMA belonging to passed in VM.
2. There can only be one normal VMA for any VM.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1447329595-17495-1-git-send-email-tvrtko.ursulin@linux.intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: Clean up LVDS register handling harder
Lukas Wunner [Thu, 5 Nov 2015 08:30:50 +0000 (09:30 +0100)]
drm/i915: Clean up LVDS register handling harder

Minor fixup to d0669d007542 ("drm/i915: Clean up LVDS register
handling") which intended to read lvds_reg just once at the
beginning of intel_lvds_init() and use that throughout the rest
of the function but accidentally missed one register readout.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Link: http://patchwork.freedesktop.org/patch/msgid/20151107141244.AB7616E242@gabe.freedesktop.org
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: Move the fbdev async_schedule() into intel_fbdev.c
Ville Syrjälä [Fri, 6 Nov 2015 13:08:33 +0000 (15:08 +0200)]
drm/i915: Move the fbdev async_schedule() into intel_fbdev.c

Reading the driver load/unload code leaves one confused as there's
an async_schedule() in the load, but not async_synchronize_full()
in sight. In fact it's hidden inside intel_fbdev.c. So let's move the
async_schedule() into intel_fbdev.c as well so that it's next to the
async_synchronize_full(), which should make the relationship easier
to see.

Plus this way we won't schedule a nop function call when fbdev is
disabled. And we were passing a pointer to a static inline
function to async_schedule(), which seems rather dubious to me.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446815313-9490-4-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agodrm/i915: Do fbdev fini first during unload
Ville Syrjälä [Fri, 6 Nov 2015 13:08:32 +0000 (15:08 +0200)]
drm/i915: Do fbdev fini first during unload

We set up fbdev last during load, so doing the fbdev cleanup should be
first.

We weren't supposed to drop the init power during driver unload, but since
the fbdev teardown happened after intel_power_domains_fini() that could
have happened due in one of two ways. First it could have happened
during the modeset caused by normal fbdev cleanup. But in addition it
could have happened already via the intel_fbdev_initial_config() since
that is executed asynhronously, and the async_synchronize_full() was
done during fbdev cleanup, after intel_power_domains_fini(). All of
that got eliminated by
commit 292b990e86abc ("drm/i915: Update power domains on readout.")
since we now drop the init power synchronously during driver load.

So there is no real bug wrt. the init power anymore, but still it seems
better to do the fbdev cleanup first, before we've potentially cleaned
up something else important.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446815313-9490-3-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agodrm/i915: Kill intel_runtime_pm_disable()
Ville Syrjälä [Fri, 6 Nov 2015 13:08:31 +0000 (15:08 +0200)]
drm/i915: Kill intel_runtime_pm_disable()

intel_runtime_pm_disable() takes an extra rpm reference which combined
with the one we leak from intel_display_set_init_power() leaves the
usage count at <original>+1 after the driver has been unloaded.
The original ref is dropped explicitly in intel_runtime_pm_enable().
So the next time we load the driver we can no longer do runtime PM ever.

This used to work, but
commit 292b990e86ab ("drm/i915: Update power domains on readout.")
broke things by not dropping the init power domain during fbdev
teardown. Based on the comment in intel_power_domains_fini(), the
way it used to to work wasn't intentional. As in we weren't supposed
to drop the init power during driver unload. And since we no longer
do, we now leak an extra rpm reference.

So fix things by throwing intel_runtime_pm_disable() to the bin, so
that the only leaked reference comes from the init power domain.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Daniel Stone <daniels@collabora.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Fixes: 292b990e86ab ("drm/i915: Update power domains on readout.")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446815313-9490-2-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
9 years agodrm/i915: Setup DDI clk for MST on SKL
Ville Syrjälä [Mon, 17 Aug 2015 15:46:20 +0000 (18:46 +0300)]
drm/i915: Setup DDI clk for MST on SKL

Set up the DDI->PLL mapping on SKL also for MST links. Might help make
MST operational on SKL.

v2: Rebased due to KBL
    Improve the patch subject, Jesse provided the new one

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1439826380-18403-1-git-send-email-ville.syrjala@linux.intel.com
References: https://bugs.freedesktop.org/show_bug.cgi?id=91791
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
9 years agodrm/i915: Configure eDP PLL freq from ironlake_edp_pll_on()
Ville Syrjälä [Thu, 29 Oct 2015 19:26:03 +0000 (21:26 +0200)]
drm/i915: Configure eDP PLL freq from ironlake_edp_pll_on()

ironlake_set_pll_cpu_edp() only gets called just before
ironlake_edp_pll_on(), so just pull the code into ironlake_edp_pll_on().

Also toss in a debug print into ironlake_edp_pll_off() to match the one
we have in ironlake_edp_pll_on().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-15-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Use intel_dp->DP in eDP PLL setup
Ville Syrjälä [Tue, 10 Nov 2015 14:16:17 +0000 (16:16 +0200)]
drm/i915: Use intel_dp->DP in eDP PLL setup

Use intel_dp->DP in the eDP PLL setup, instead of doing RMWs.

To do this we need to move DP_AUDIO_OUTPUT_ENABLE setup to happen later,
so that we don't enable audio accidentally while configuring the PLL.

Note that actually we already enabled audio before the port due to
the double port register write magic required by VLV/CHV from
7b713f50d78b6 ("drm/i915: Fix eDP link training when switching pipes on VLV/CHV")
So that gets changed now to keep audio off as long as the port is off.

Also intel_dp_link_down() must be made to update intel_dp->DP so that we
don't re-enable the port by accident when turning off the PLL. This is
safe now that we don't call intel_dp_link_down() during link retraining.

v2: Add a note about the audio vs. port enable (Daniel)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1447164977-32315-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: Clean up eDP PLL state asserts
Ville Syrjälä [Thu, 29 Oct 2015 19:26:01 +0000 (21:26 +0200)]
drm/i915: Clean up eDP PLL state asserts

Rewrite the eDP PLL state asserts to conform to our usual state assert
style.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-13-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Remove ILK-A eDP PLL workaround notes
Ville Syrjälä [Thu, 29 Oct 2015 19:26:00 +0000 (21:26 +0200)]
drm/i915: Remove ILK-A eDP PLL workaround notes

We don't care about ILK-A and the old w/a notes may just confuse
people, so get rid of them.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-12-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
9 years agodrm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/
Ville Syrjälä [Thu, 29 Oct 2015 19:25:59 +0000 (21:25 +0200)]
drm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/

The DP link frequency is 162MHz, not 160MHz. Rename the ILK eDP PLL
defines to match.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-11-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Hide underruns from eDP PLL and port enable on ILK
Ville Syrjälä [Thu, 29 Oct 2015 19:25:58 +0000 (21:25 +0200)]
drm/i915: Hide underruns from eDP PLL and port enable on ILK

We get underruns on the other pipe when enabling the CPU eDP PLL and
port on ILK.

Bspec knows about the PLL issue, and recommends doing a vblank wait just
prior to enabling the PLL. That does seem to help, but unfortunately we
get another underrun when actually enabling the CPU eDP port. Bspec
doesn't mention that at all, and the same vblank wait trick doesn't
appear to be effective there.

Since I have no better clue how to deal with this, just hide the errors.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-10-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
9 years agodrm/i915: Disable FIFO underrun reporting around IBX transcoder B workaround
Ville Syrjälä [Fri, 30 Oct 2015 17:23:22 +0000 (19:23 +0200)]
drm/i915: Disable FIFO underrun reporting around IBX transcoder B workaround

Doing the IBX transcoder B workaround causes underruns on
pipe/transcoder A. Just hide them by disabling underrun reporting for
pipe A around the workaround.

It might be possible to avoid the underruns by moving the workaround
to be applied only when enabling pipe A. But I was too lazy to try it
right now, and the current method has been proven to work, so didn't
want to change it too hastily.

Note that this can re-enable underrun reporting on pipe A if was
already disabled due to a previous actual underrun. But that's OK, we
may just get a second underrun report if another real underron occurrs
on pipe A.

v2: Note that pipe A underruns can get re-enabled due to this (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v1)
Link: http://patchwork.freedesktop.org/patch/msgid/1446225802-11180-1-git-send-email-ville.syrjala@linux.intel.com
9 years agodrm/i915: Check for CPT and not !IBX in ironlake_disable_pch_transcoder()
Ville Syrjälä [Thu, 29 Oct 2015 19:25:56 +0000 (21:25 +0200)]
drm/i915: Check for CPT and not !IBX in ironlake_disable_pch_transcoder()

ironlake_enaable_pch_transcoder() checks for CPT to see if it should
enable the timing override chicken bit, but
ironlake_disable_pch_transcoder() checks for !IBX to see if it should
clear the same bit. Change ironlake_disable_pch_transcoder() to check
for CPT as well to keep the two sides consistent.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-8-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
9 years agodrm/i915: Check for FIFO underruns after modeset on IVB/HSW and CPT/PPT
Ville Syrjälä [Fri, 30 Oct 2015 17:22:21 +0000 (19:22 +0200)]
drm/i915: Check for FIFO underruns after modeset on IVB/HSW and CPT/PPT

Due to the shared error interrupt on IVB/HSW and CPT/PPT we may not
always get an interrupt on a FIFO underrun. But we can always do an
explicit check (like we do on GMCH platforms that have no underrun
interrupt).

v2: Drop stale kerneldoc for i9xx_check_fifo_underruns() (Daniel)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1446225741-11070-1-git-send-email-ville.syrjala@linux.intel.com
9 years agodrm/i915: Re-enable PCH FIO underrun reporting after pipe has been disabled
Ville Syrjälä [Fri, 30 Oct 2015 17:21:31 +0000 (19:21 +0200)]
drm/i915: Re-enable PCH FIO underrun reporting after pipe has been disabled

Some hardware (IVB/HSW and CPT/PPT) have a shared error interrupt for
all the relevant underrun bits, so in order to keep the error interrupt
enabled, we need to have underrun reporting enabled on all PCH
transocders. Currently we leave the underrun reporting disabled when
the pipe is off, which means we won't get any underrun interrupts
when only a subset of the pipes are active.

Fix the problem by re-enabling the underrun reporting after the pipe has
been disabled. And to avoid the spurious underruns during pipe enable,
disable the underrun reporting before embarking on the pipe enable
sequence. So this way we have the error reporting disabled while
running through the modeset sequence.

v2: Re-enable PCH FIFO underrun reporting unconditionally on pre-HSW

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v1)
Link: http://patchwork.freedesktop.org/patch/msgid/1446225691-10928-1-git-send-email-ville.syrjala@linux.intel.com
9 years agodrm/i915: Enable PCH FIFO underruns later on HSW+
Ville Syrjälä [Thu, 29 Oct 2015 19:25:53 +0000 (21:25 +0200)]
drm/i915: Enable PCH FIFO underruns later on HSW+

As we did for ILK/SNB/IVB, move the PCH FIFO underrun enable to happen
after the encoder enable on HSW+. And again, for symmetry, move the
the disable to happen before encoder disable.

I've left out the vblank wait before the enable here because I don't
know if it's needed or not. Actually I don't know if this entire
change is needed as I don't have a HSW/BDW with VGA output.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-5-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
9 years agodrm/i915: Enable PCH FIFO underruns later on ILK/SNB/IVB
Ville Syrjälä [Fri, 30 Oct 2015 17:20:27 +0000 (19:20 +0200)]
drm/i915: Enable PCH FIFO underruns later on ILK/SNB/IVB

We get spurious PCH FIFO underruns if we enable the reporting too soon
after enabling the crtc. Move it to be the last step, after the encoder
enable. Additionally we need an extra vblank wait, otherwise we still
get the underruns. Presumably the pipe/fdi isn't yet fully up and running
otherwise.

For symmetry, disable the PCH underrun reporting as the first thing,
just before encoder disable, when shutting down the crtc.

v2: Do the PCH underrun enable unconditionally (Jani, Daniel)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v1)
Link: http://patchwork.freedesktop.org/patch/msgid/1446225627-10809-1-git-send-email-ville.syrjala@linux.intel.com
9 years agodrm/i915: Set sync polarity from adjusted mode for TRANS_DP_CTL
Ville Syrjälä [Thu, 29 Oct 2015 19:25:51 +0000 (21:25 +0200)]
drm/i915: Set sync polarity from adjusted mode for TRANS_DP_CTL

Rather than looking at crtc->mode (which is the user mode) dig up the
sync polarity settings from the adjusted_mode when programming
TRANS_DP_CTL on CPT/PPT.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-3-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
9 years agodrm/i915: Don't use intel_pipe_to_cpu_transcoder() when there's a pipe config around
Ville Syrjälä [Thu, 29 Oct 2015 19:25:50 +0000 (21:25 +0200)]
drm/i915: Don't use intel_pipe_to_cpu_transcoder() when there's a pipe config around

No point in doing the crtc->pipe->crtc->config->cpu_transcoder dance
when we can just do crtc->config->cpu_transcoder.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-2-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
9 years agodrm/i915: remove in_dbg_master check from intel_fbc.c
Paulo Zanoni [Wed, 4 Nov 2015 19:10:56 +0000 (17:10 -0200)]
drm/i915: remove in_dbg_master check from intel_fbc.c

From our maintainer Daniel Vetter a few days ago:
  "Oh dear this is dead code. kdbg uses the fbcon, which always uses
  untiled, which means fbc will never be enabled. Also we have 0 users
  and 0 test coverage for kdbg on top of i915 (Jesse implemented it
  for fun years back). Imo just remove all this code."

Adding to what Daniel said: for kgdboc's KMS support,
intel_pipe_set_base_atomic() already manually disables FBC, so we
won't do the in_dbg_master() check there. This is essentially a revert
of:

commit c924b934d0cd14a4559611da91f28f59acebe32a
Author: Jason Wessel <jason.wessel@windriver.com>
Date:   Thu Aug 5 09:22:32 2010 -0500
    i915: when kgdb is active display compression should be off

Besides, it is not clear what is the exact problem caused by FBC, and
why other features such as PSR, DRRS, IPS and RPM are not also
checking for in_dbg_master(). IMHO we should either remove the code as
suggested by Daniel or we add some nice comments explaining why is FBC
so special.

v2: Rebase due to new patch order.

Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-13-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: clarify that checking the FB stride for CFB is intentional
Paulo Zanoni [Wed, 4 Nov 2015 19:10:55 +0000 (17:10 -0200)]
drm/i915: clarify that checking the FB stride for CFB is intentional

Daniel was looking at this code and asked about whether fb->pitches[0]
is correct, then he suggested we should a comment to make sure it is
actually intentional.

For more information on the CFB size calculation, please see the
commit message of:

commit c4ffd40908c30a33291227920e921f6b45b9e8f7
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date:   Thu Oct 1 19:55:57 2015 -0300
    drm/i915: fix CFB size calculation

Requested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-12-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: remove too-frequent FBC debug message
Paulo Zanoni [Wed, 4 Nov 2015 19:10:53 +0000 (17:10 -0200)]
drm/i915: remove too-frequent FBC debug message

If we run igt/kms_frontbuffer_tracking, this message will appear
thousands of times, eating a significant part of our dmesg buffer.
It's part of the expected FBC behavior, so let's just silence it.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-10-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: refactor FBC deactivation at init
Paulo Zanoni [Wed, 4 Nov 2015 19:10:52 +0000 (17:10 -0200)]
drm/i915: refactor FBC deactivation at init

Make sure we deactivate FBC at intel_fbc_init(), so we can remove the
call from intel_display.c. Currently we only have the "enabled"
software state, but later we'll have both "enabled" and "active", and
we'll add assertions to them, so just calling intel_fbc_disable() from
intel_modeset_init() won't work. It's better to make sure
intel_fbc_init() already puts the hardware in the expected state, so
we can put nice assertions in the other functions.

v2: Keep/improve the comment (Chris).
v3: Improve the commit message a little bit.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-9-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: don't disable_fbc() if FBC is already disabled
Paulo Zanoni [Wed, 4 Nov 2015 19:10:51 +0000 (17:10 -0200)]
drm/i915: don't disable_fbc() if FBC is already disabled

If FBC is disabled we will still call intel_fbc_invalidate(), and as a
result we may call intel_fbc_deactivate(), which will try to touch
registers.

I'm pretty sure I saw this happen on a runtime suspended device, and
I'm almost sure I was running igt/pm_rpm. It produced the "you touched
registers while the device is suspended" WARNs. But this was some time
ago and I can't remember exactly which conditions were necessary to
reproduce the problem.

v2: Rebase to new series order.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-8-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: fix the __intel_fbc_update() comments
Paulo Zanoni [Wed, 4 Nov 2015 19:10:50 +0000 (17:10 -0200)]
drm/i915: fix the __intel_fbc_update() comments

Don't try to list in comments the cases where we should enable or
disable FBC: it varies a lot with the hardware generations and the
code should be the documentation. Also notice that there's already a
huge gap between the comments and what's in the code.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-7-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: use struct intel_crtc *crtc at __intel_fbc_update()
Paulo Zanoni [Wed, 4 Nov 2015 19:10:49 +0000 (17:10 -0200)]
drm/i915: use struct intel_crtc *crtc at __intel_fbc_update()

This change was part of the commit that makes intel_fbc_update()
receive an intel_crtc as argument instead of dev_priv, but since it
was polluting the diff with too many chunks I decided to move it to
its own commit.

It seems that our developers are favoring having this instead of the
old combination drm_crtc *crtc + intel_crtc *intel_crtc, and on the
mentioned commit we'll get rid of the drm_crtc variable, so let's do
an intermediate commit with the rename, so on the next commit we'll
have just struct intel_crtc *crtc.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-6-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: extract crtc_is_valid() on the FBC code
Paulo Zanoni [Wed, 4 Nov 2015 19:10:48 +0000 (17:10 -0200)]
drm/i915: extract crtc_is_valid() on the FBC code

We're going to kill intel_fbc_find_crtc(), that's why a big part of
the logic moved from intel_fbc_find_crtc() to crtc_is_valid().

v2:
  - Rebase due to pipe_a_only change.
  - Split the multiline conditional (Chris).

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-5-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: remove unnecessary check for crtc->primary->fb
Paulo Zanoni [Wed, 4 Nov 2015 19:10:47 +0000 (17:10 -0200)]
drm/i915: remove unnecessary check for crtc->primary->fb

We already check if the CRTC is visible, and it shouldn't be possible
to have a visible CRTC without an FB.

This was noticed by both Chris and Ville on different ocasions.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-4-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: extract fbc_on_pipe_a_only()
Paulo Zanoni [Wed, 4 Nov 2015 19:10:46 +0000 (17:10 -0200)]
drm/i915: extract fbc_on_pipe_a_only()

Make the code easier to read.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-3-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: rename intel_fbc_nuke to intel_fbc_recompress
Paulo Zanoni [Wed, 4 Nov 2015 19:10:45 +0000 (17:10 -0200)]
drm/i915: rename intel_fbc_nuke to intel_fbc_recompress

Although the term "nuke" is part of the FBC spec, it's not very
intuitive, so let's rename it to make it easier for people that are
not familiar with the spec.

Requested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-2-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: remove newline from a no_fbc_reason message
Paulo Zanoni [Wed, 4 Nov 2015 19:10:57 +0000 (17:10 -0200)]
drm/i915: remove newline from a no_fbc_reason message

Newlines are not needed and they're not used by the other messages. I
added the newline by mistake.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446664257-32012-14-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915/bxt: Force port A DDI to use 4 lanes
Matt Roper [Thu, 5 Nov 2015 22:53:32 +0000 (14:53 -0800)]
drm/i915/bxt: Force port A DDI to use 4 lanes

The bspec indicates that DDI A using four lanes is the only valid
configuration for Broxton (Broxton doesn't have a DDI E to split these
lanes with); the DDI_A_4_LANES bit of port A's DDI_BUF_CTL should always
be set by the BIOS.  However some BIOS versions seem to only be setting
this bit if eDP is actually lit up at boot time; if the BIOS doesn't
turn on the eDP panel because an external display is plugged in, then
this bit is never properly initialized.  The end result of this is that
we wind up calculating a lower max data rate than we should and may wind
up rejecting the native mode for panels that we should be able to drive.

Let's workaround this BIOS bug by just turning the DDI_A_4_LANES bit on
in our driver's internal state if we recognize that we're running on BXT
where it should have been on anyway.

Cc: Imre Deak <imre.deak@intel.com>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Tested-by: Bob Paauwe <bob.j.paauwe@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446764012-27251-1-git-send-email-matthew.d.roper@intel.com
9 years agodrm/i915: Print a debug message when exceeding dotclock limit on pre-gen4
Ville Syrjälä [Fri, 30 Oct 2015 21:39:38 +0000 (23:39 +0200)]
drm/i915: Print a debug message when exceeding dotclock limit on pre-gen4

Currently there's no trace in dmesg when the gen2/3 dotclock checks
reject the modeset. Add some to avoid further head scratching.

While at it refactor the code a bit to look nicer.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446241178-432-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
9 years agodrm/i915: Avoid pointer arithmetic in calculating plane surface offset
Mika Kuoppala [Fri, 30 Oct 2015 11:26:15 +0000 (13:26 +0200)]
drm/i915: Avoid pointer arithmetic in calculating plane surface offset

VMA offsets are 64 bits. Plane surface offsets are in ggtt and
the hardware register to set this is thus 32 bits. Be explicit
about these and convert carefully to from vma to final size.

This will make sparse happy by not creating 32bit pointers out
of 64bit vma offsets.

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446204375-29831-1-git-send-email-mika.kuoppala@intel.com
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
9 years agodrm/i915: Add dmc firmware load state and version to error state
Mika Kuoppala [Thu, 29 Oct 2015 13:21:19 +0000 (15:21 +0200)]
drm/i915: Add dmc firmware load state and version to error state

We have had one case where buggy csr/dmc firmware version influenced
gt side and caused a hang. Add dmc firmware loading state and
version to error state.

v2: - Rebased on top of Damien's patches
    - included fw load state
v3: include dmc info only if platform supports it (Chris)
v4: move *csr to branch scope (Chris)
v5: remove dependency to csr_state

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v4)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446124879-22240-1-git-send-email-mika.kuoppala@intel.com
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
9 years agodrm/i915: Add csr programming registers to dmc debugfs entry
Mika Kuoppala [Fri, 30 Oct 2015 15:54:47 +0000 (17:54 +0200)]
drm/i915: Add csr programming registers to dmc debugfs entry

We check these to determine firmware loading status. Include
them to help to debug causes of firmware loading fails.

v2: Move all CSR specific registers to i915_reg.h (Ville)
v3: Rebase
v4: Rebase (RPM ref)

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446220487-32691-1-git-send-email-mika.kuoppala@intel.com
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
9 years agodrm/i915/bxt: Expose DC5 entry count
Mika Kuoppala [Tue, 27 Oct 2015 12:47:03 +0000 (14:47 +0200)]
drm/i915/bxt: Expose DC5 entry count

For bxt CSR firmware exposes a count of dc5 entries. Expose
it through debugs

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
9 years agodrm/i915/skl: Expose DC5/DC6 entry counts
Damien Lespiau [Fri, 30 Oct 2015 15:53:32 +0000 (17:53 +0200)]
drm/i915/skl: Expose DC5/DC6 entry counts

The CSR firmware expose two counters, handy to check if we are indeed
entering DC5/DC6.

v2: Rebase
v3: Take RPM ref before reading (Imre)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> (v1)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446220412-32574-1-git-send-email-mika.kuoppala@intel.com
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
9 years agodrm/i915/skl: Print the DMC firmware status in debugfs
Damien Lespiau [Tue, 27 Oct 2015 12:47:01 +0000 (14:47 +0200)]
drm/i915/skl: Print the DMC firmware status in debugfs

Create a new debufs file for it, we'll have a few more things to add
there.

v2: Fix checkpatch warning about static const array
v3: use named initializers (Ville)
v4: strip out csr_state as it will be removed in future (Ville, Imre)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> (v1)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445950025-5793-3-git-send-email-mika.kuoppala@intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
9 years agodrm/i915/skl: Refuse to load outdated dmc firmware
Mika Kuoppala [Fri, 30 Oct 2015 15:52:16 +0000 (17:52 +0200)]
drm/i915/skl: Refuse to load outdated dmc firmware

There is known issue on GT interrupt delivery with DC6 and
firmwares <1.21. There is a suspicion that this causes
spurious gpu hangs on driver init and with some workloads,
as upgrading the firmware to 1.21 makes these problems
disappear.

As of now the current version included in distribution
firmware packages is very like to be 1.19. Play it safe and
refuse to load a firmware version that may affect gpu
side stability.

With < 1.23 there is a palette and dmc ram corruption issue
so blacklist anything below that.

v2: Refuse to load fw instead of notifying the user
v3: Rebase on header version changes
v4: Refuse to load anything less than 1.23
v5: Give enough information for user for finding correct fw (Chris)
v6: better url and formatting (Chris)
v7: move error log for each fail path (Mika)
    bail out earlier in load path (Imre)
v8: Fix the version check (Imre)

Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Cc: Arun Siluvery <arun.siluvery@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
References: https://01.org/linuxgraphics/downloads/skldmcver121
References: https://01.org/linuxgraphics/downloads/skylake-dmc-1.23
Testcase: igt/gem_exec_nop
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446220336-32392-1-git-send-email-mika.kuoppala@intel.com
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
9 years agodrm/i915/skl: Store and print the DMC firmware version we load
Damien Lespiau [Tue, 27 Oct 2015 12:46:59 +0000 (14:46 +0200)]
drm/i915/skl: Store and print the DMC firmware version we load

That can be handy later on to tell which DMC firmware version the user
has, by just looking at the dmesg.

v2: use DRM_DEBUG_DRIVER (Chris)
v3: use DRM_INFO (Marc Herbert)

Cc: Marc Herbert <marc.herbert@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> (v1)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445950025-5793-1-git-send-email-mika.kuoppala@intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Tested-by: Daniel Stone <daniels@collabora.com> # SKL
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
9 years agodrm/i915: Fix failure paths around initial fbdev allocation
Tvrtko Ursulin [Tue, 30 Jun 2015 09:06:27 +0000 (10:06 +0100)]
drm/i915: Fix failure paths around initial fbdev allocation

We had two failure modes here:

1.
Deadlock in intelfb_alloc failure path where it calls
drm_framebuffer_remove, which grabs the struct mutex and intelfb_create
(caller of intelfb_alloc) was already holding it.

2.
Deadlock in intelfb_create failure path where it calls
drm_framebuffer_unreference, which grabs the struct mutex and
intelfb_create was already holding it.

[Daniel Vetter on why struct_mutex needs to be locked in the second half
of intelfb_create: "The vma [for the fbdev] is pinned, the problem is
that we re-lookup it a few times, which is racy. We should instead track
the vma directly, but oh well we don't."]

v2:
   * Reformat commit msg to 72 chars. (Lukas Wunner)
   * Add third failure mode. (Lukas Wunner)

v5:
   * Rebase on drm-intel-nightly 2015y-09m-01d-09h-06m-08s UTC,
     rephrase commit message. (Jani Nicula)

v6:
   * In intelfb_alloc, if __intel_framebuffer_create failed,
     fb will be an ERR_PTR, thus not null. So in the failure
     path we need to check for IS_ERR_OR_NULL to avoid calling
     drm_framebuffer_remove on the ERR_PTR. (Lukas Wunner)
   * Since this is init code a drm_framebuffer_unreference should
     be all we need. drm_framebuffer_remove is for framebuffers
     that userspace has created - and is getting somewhat
     defeatured. (Daniel Vetter)

v7:
   * Clarify why struct_mutex needs to be locked in the second half
     of intelfb_create. (Daniel Vetter)

Fixes: 60a5ca015ffd ("drm/i915: Add locking around
    framebuffer_references--")
Reported-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
[Lukas: Create v3 + v4 + v5 + v6 + v7 based on Tvrtko's v2]
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/47d4e88c91b3bf0f7a280cabec54c8c8cf0cf6f2.1446892879.git.lukas@wunner.de
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: Fix double unref in intelfb_alloc failure path
Lukas Wunner [Thu, 22 Oct 2015 11:37:18 +0000 (13:37 +0200)]
drm/i915: Fix double unref in intelfb_alloc failure path

In intelfb_alloc(), if the call to intel_pin_and_fence_fb_obj() fails,
the bo is unrefed twice: By drm_framebuffer_remove() and once more by
drm_gem_object_unreference(). Fix it.

Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/cd7b33330621a350b0159ec5e098297b139cfaf7.1446892879.git.lukas@wunner.de
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: On fb alloc failure, unref gem object where it gets refed
Lukas Wunner [Sat, 4 Jul 2015 09:50:58 +0000 (11:50 +0200)]
drm/i915: On fb alloc failure, unref gem object where it gets refed

Currently when allocating a framebuffer fails, the gem object gets
unrefed at the bottom of the call stack in __intel_framebuffer_create,
not where it gets refed, which is in intel_framebuffer_create_for_mode
(via i915_gem_alloc_object) and in intel_user_framebuffer_create
(via drm_gem_object_lookup).

This invites mistakes: __intel_framebuffer_create is also called from
intelfb_alloc, and as discovered by Tvrtko Ursulin, a double unref
was introduced there with a8bb6818270c ("drm/i915: Fix error path leak
in fbdev fb allocation").

As suggested by Ville Syrjälä, fix the double unref and improve code
clarity by moving the unref away from __intel_framebuffer_create to
where the gem object gets refed.

Based on Tvrtko Ursulin's original v2.

v3: On fb alloc failure, unref gem object where it gets refed,
    fix double unref in separate commit (Ville Syrjälä)

v4: Lock struct_mutex on unref (Chris Wilson)

v5: Rebase on drm-intel-nightly 2015y-09m-01d-09h-06m-08s UTC,
    rephrase commit message (Jani Nicula)

Tested-by: Pierre Moreau <pierre.morrow@free.fr>
    [MBP  5,3 2009  nvidia MCP79 + G96        pre-retina]
Tested-by: Paul Hordiienko <pvt.gord@gmail.com>
    [MBP  6,2 2010  intel ILK + nvidia GT216  pre-retina]
Tested-by: William Brown <william@blackhats.net.au>
    [MBP  8,2 2011  intel SNB + amd turks     pre-retina]
Tested-by: Lukas Wunner <lukas@wunner.de>
    [MBP  9,1 2012  intel IVB + nvidia GK107  pre-retina]
Tested-by: Bruno Bierbaumer <bruno@bierbaumer.net>
    [MBP 11,3 2013  intel HSW + nvidia GK107  retina]

Fixes: a8bb6818270c ("drm/i915: Fix error path leak in fbdev fb
    allocation")
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/2161c5062ef5d6458f8ae14d924a26d4d1dba317.1446892879.git.lukas@wunner.de
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: Make intel_dp_source_supports_hbr2() take an intel_dp pointer
Ander Conselvan de Oliveira [Fri, 23 Oct 2015 10:01:50 +0000 (13:01 +0300)]
drm/i915: Make intel_dp_source_supports_hbr2() take an intel_dp pointer

The function name implies it should get intel_dp, and it mostly used
where there is an intel_dp in the context.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445594525-7174-8-git-send-email-ander.conselvan.de.oliveira@intel.com
9 years agodrm/i915: Create intel_dp->prepare_link_retrain() hook
Ander Conselvan de Oliveira [Fri, 23 Oct 2015 10:01:49 +0000 (13:01 +0300)]
drm/i915: Create intel_dp->prepare_link_retrain() hook

In order to prepare for a link training with DDI, the state machine
would call intel_ddi_prepare_link_retrain(). To remove the dependency to
the hardware information, replace that direct call with a callback.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445594525-7174-7-git-send-email-ander.conselvan.de.oliveira@intel.com
9 years agodrm/i915: Move generic link training code to a separate file
Ander Conselvan de Oliveira [Fri, 23 Oct 2015 10:01:48 +0000 (13:01 +0300)]
drm/i915: Move generic link training code to a separate file

No functional changes, just moving code around.

v2: Rebase

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445594525-7174-6-git-send-email-ander.conselvan.de.oliveira@intel.com
9 years agodrm/i915: Move register write into intel_dp_set_signal_levels()
Ander Conselvan de Oliveira [Fri, 23 Oct 2015 10:01:47 +0000 (13:01 +0300)]
drm/i915: Move register write into intel_dp_set_signal_levels()

Move register write from intel_dp_update_link_train() into
intel_dp_set_signal_levels(). This creates a better split between the
i915 specific code and the generic link training part. Note that this
causes an extra register write in intel_dp_reset_link_train(), since
both intel_dp_set_signal_levels() and intel_dp_set_link_train() write
to the DP register.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445594525-7174-5-git-send-email-ander.conselvan.de.oliveira@intel.com
9 years agodrm/i915 Call get_adjust_train() from clock recovery and channel eq
Ander Conselvan de Oliveira [Fri, 23 Oct 2015 10:01:46 +0000 (13:01 +0300)]
drm/i915 Call get_adjust_train() from clock recovery and channel eq

Move the call to intel_dp_get_adjust_train() out of
intel_dp_update_link_train() and call it instead from the clock recovery
and channel equalization features. A follow up patch will remove the DP
register write from that function, so that it handles only the DPCD
write.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445594525-7174-4-git-send-email-ander.conselvan.de.oliveira@intel.com
9 years agodrm/i915: Split write of pattern to DP reg from intel_dp_set_link_train
Ander Conselvan de Oliveira [Fri, 23 Oct 2015 10:01:45 +0000 (13:01 +0300)]
drm/i915: Split write of pattern to DP reg from intel_dp_set_link_train

Split the register write with the new link training pattern out of
intel_dp_set_link_train(), so that the i915 specific code is in a
separate function.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445594525-7174-3-git-send-email-ander.conselvan.de.oliveira@intel.com
9 years agodrm/i915: Don't pass *DP around to link training functions
Ander Conselvan de Oliveira [Fri, 23 Oct 2015 10:01:44 +0000 (13:01 +0300)]
drm/i915: Don't pass *DP around to link training functions

It just makes the code more confusing, so just reference intel_dp_>DP
directly.

Note that this also fix a bug where the value of intel_dp->DP could be
different than the last value written to the hw, due to an early return
that would skip the 'intel_dp->DP = DP' line.

v2: Don't preserve old DP value on failure. (Sivakumar)
  - Don't call drm_dp_clock_recovery_ok() twice. (Sivakumar)
  - Keep return type of clock recovery and channel equalization
    functions as void. (Ander)

v3: Remove DP parameter from intel_dp_set_signal_levels(). (Sivakumar)

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445594525-7174-2-git-send-email-ander.conselvan.de.oliveira@intel.com
9 years agodrm/i915/kbl: Kabylake uses the same GMS values as Skylake
Deepak S [Thu, 29 Oct 2015 17:22:01 +0000 (10:22 -0700)]
drm/i915/kbl: Kabylake uses the same GMS values as Skylake

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Deepak S <deepak.s@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446139321-2818-2-git-send-email-rodrigo.vivi@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915/skl: While sanitizing cdclock check the SWF18 as well
Shobhit Kumar [Thu, 5 Nov 2015 12:35:32 +0000 (18:05 +0530)]
drm/i915/skl: While sanitizing cdclock check the SWF18 as well

SWF18 is set if the display has been initialized by the pre-os. It also
gives what configuration is enabled on which pipe. In skl_sanitize_cdclk,
the DPLL sanity check can pass even if GOP/VBIOS is not loaded as BIOS
enables DPLL for integrated audio codec related programming.
So fisrt check if SWF18 is set and then follow through with other DPLL
and CDCLK verification. If not set then for sure we need to sanitize the
cdclock.

v2: Update the commit message for clarity (Siva)
v3: Correct the mask to check for bits[23:0] instead of only bits[16:0].
    Had missed checking for PIPE C altogether. Remaining are reserved (Siva)
v4: Use ILK_SWF macro for SWF register definitions. Taken from Ville's patch
    http://lists.freedesktop.org/archives/intel-gfx/2015-November/079480.html

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446726932-14078-1-git-send-email-shobhit.kumar@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915/bxt: Fix eDP panel fitting (v2)
Matt Roper [Wed, 4 Nov 2015 17:05:27 +0000 (09:05 -0800)]
drm/i915/bxt: Fix eDP panel fitting (v2)

BXT CRTC scaling uses the same gen9 codepaths as SKL; these codepaths
store panel fitter information in pipe_config->pch_pfit.  However since
HAS_PCH_SPLIT() is false for BXT we never actually wind up filling in
this structure (we wind up filling in pipe_config->gmch_pfit instead,
which is ignored when we go to program the hardware).  Make sure we
always take the PCH code path on gen9+ platforms.

v2: Use HAS_GMCH_DISPLAY() to more cleanly describe the platforms that
    actually want to use GMCH-style panel fitting.  (Ville)

Cc: Imre Deak <imre.deak@intel.com>
Cc: Chandra Konduru <chandra.konduru@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446656727-3516-1-git-send-email-matthew.d.roper@intel.com
9 years agodrm/i915: change no_fbc_reason from enum to string
Paulo Zanoni [Tue, 27 Oct 2015 16:50:03 +0000 (14:50 -0200)]
drm/i915: change no_fbc_reason from enum to string

I wanted to add yet another check to intel_fbc_update() and realized
I would need to create yet another enum no_fbc_reason case. So I
remembered this patch series that Damien wrote a long time ago and
nobody ever reviewed, so I decided to reimplement it since the code
changed a lot since then.

Credits-to: Damien Lespiau <damien.lespiau@intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445964628-30226-2-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915: Wait for object idle without locks in atomic_commit, v2.
Maarten Lankhorst [Tue, 18 Aug 2015 11:40:06 +0000 (13:40 +0200)]
drm/i915: Wait for object idle without locks in atomic_commit, v2.

Make pinning and waiting a separate step, and wait for object idle
without struct_mutex held.

Changes since v1:
- Do not wait when a reset is in progress.
- Remove call to i915_gem_object_wait_rendering for
  intel_overlay_do_put_image (Chris Wilson)

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agodrm/i915: Change locking for struct_mutex, v3.
Maarten Lankhorst [Tue, 18 Aug 2015 11:40:05 +0000 (13:40 +0200)]
drm/i915: Change locking for struct_mutex, v3.

struct_mutex is being locked for every plane in intel_prepare_plane_fb
and intel_cleanup_plane_fb.

Require the caller to hold the mutex, and only acquire the mutex for
each helper call. This way the lock only needs to be acquired
twice in ->atomic_commit(). Once for pinning new framebuffers at the
start, the second time for unpinning old framebuffer.

Changes since v1:
- Use mutex_lock_interruptible instead of i915 variant,
  to prevent a deadlock when called from the reset code.
Changes since v2:
- Clarify struct_mutex is locked by the caller.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com> #v1
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agodrm/i915: Make wait_for_flips interruptible.
Maarten Lankhorst [Tue, 18 Aug 2015 11:40:05 +0000 (13:40 +0200)]
drm/i915: Make wait_for_flips interruptible.

Move it from intel_crtc_atomic_commit to prepare_plane_fb.
Waiting is done before committing, otherwise it's too late
to undo the changes.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan De Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agodrm/i915: Add extra plane information in debugfs.
Robert Fekete [Tue, 27 Oct 2015 15:58:32 +0000 (16:58 +0100)]
drm/i915: Add extra plane information in debugfs.

Extends i915_display_info so that for each active crtc also print
all planes associated with the pipe. This patch shows information
about each plane wrt format, size, position, rotation, and scaling.
This is very useful when debugging user space compositors that try
to utilize several planes for a commit.

V2: Fixed comments from Maarten, Ville, and Chris. Fixed printing of
16.16 fixpoint, better rotation bitmask management and some minor fixes

V3: Corrected state->src_x & 0x00ff to state->src_x & 0xffff...

Signed-off-by: Robert Fekete <robert.fekete@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445961512-25317-1-git-send-email-robert.fekete@linux.intel.com
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
9 years agodrm/i915/dma: enforce pr_<loglevel> consistency
Ioan-Adrian Ratiu [Fri, 30 Oct 2015 23:16:00 +0000 (01:16 +0200)]
drm/i915/dma: enforce pr_<loglevel> consistency

One branch of the if clause uses pr_info, the other pr_err; change
the 'false' branch to also use pr_info. This minor oversight has gone
unfixed since the initial vga_switcheroo implementation in 6a9ee8af.

Signed-off-by: Ioan-Adrian Ratiu <adi@adirat.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446246960-22620-1-git-send-email-adi@adirat.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: Don't complain about lack of ACPI video bios
Daniel Vetter [Fri, 23 Oct 2015 09:00:06 +0000 (11:00 +0200)]
drm/i915: Don't complain about lack of ACPI video bios

Another CI fail we have for no reason. Totally unjustified since
nothing fails at all.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445590806-23886-1-git-send-email-daniel.vetter@ffwll.ch
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Shut up GuC errors when it's disabled
Daniel Vetter [Fri, 23 Oct 2015 09:10:59 +0000 (11:10 +0200)]
drm/i915: Shut up GuC errors when it's disabled

DRM_ERROR an continue without any issues aren't allowed since that
causes noise in the CI system. But we absolutely want to have the
DRM_ERROR when we want to run with GuC.

For simplicity just short-circuit all the loader code when it's not
needed.

v2: Mika&Chris complained that I shouldn't hit send on patches written
before coffee kicks in.

v3: Make it compile at least ...

Cc: Alex Dai <yu.dai@intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445591459-4327-1-git-send-email-daniel.vetter@ffwll.ch
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: make A0 wa's applied to A1
Tim Gore [Mon, 26 Oct 2015 10:48:58 +0000 (10:48 +0000)]
drm/i915: make A0 wa's applied to A1

Since A1 chips use the same GPU as A0, they need all the
same wa's in the i915 driver. Update some conditionals
to do this.

Signed-off-by: Tim Gore <tim.gore@intel.com>
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445856538-5417-1-git-send-email-tim.gore@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915/kbl: Add Kabylake GT4 PCI ID
Deepak S [Wed, 28 Oct 2015 19:21:12 +0000 (12:21 -0700)]
drm/i915/kbl: Add Kabylake GT4 PCI ID

v2: (Rodrigo) Rebase after commit 3cb27f38f
    ("drm/i915: remove an extra level of indirection in PCI ID list")

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Deepak S <deepak.s@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446060072-19489-1-git-send-email-rodrigo.vivi@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915/kbl: Add Kabylake PCI ID
Deepak S [Wed, 28 Oct 2015 19:19:51 +0000 (12:19 -0700)]
drm/i915/kbl: Add Kabylake PCI ID

v2: separate out device info into different GT (Damien)
v3: Add is_kabylake to the KBL gt3 structuer (Damien)
    Sort the platforms in older -> newer order (Damien)

v4: Split platform definition since is_skylake=1 on
    kabylake structure was Nacked. (Rodrigo)

v5: (Rodrigo) Rebase after commit 3cb27f38f
("drm/i915: remove an extra level of indirection in PCI ID list")

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Deepak S <deepak.s@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446059991-17033-1-git-send-email-rodrigo.vivi@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915/kbl: Introduce Kabylake platform defition.
Rodrigo Vivi [Wed, 28 Oct 2015 11:16:45 +0000 (04:16 -0700)]
drm/i915/kbl: Introduce Kabylake platform defition.

Kabylake is a Intel® Processor containing Intel® HD Graphics
following Skylake.

It is Gen9p5, so it inherits everything from Skylake.

Let's start by adding the platform separated from Skylake
but reusing most of all features, functions etc. Later we
rebase the PCI-ID patch without is_skylake=1
so we don't replace what original Author did there.

Few IS_SKYLAKEs if statements are not being covered by this patch
on purpose:
   - Workarounds: Kabylake is derivated from Skylake H0 so no
        W/As apply here.
   - GuC: A following patch removes Kabylake support with an
        explanation: No firmware available yet.
   - DMC/CSR: Done in a separated patch since we need to be carefull
            and load the version for revision 7 since
      Kabylake is Skylake H0.

v2: relative cleaner commit message and added the missed
    IS_KABYLAKE to intel_i2c.c as pointed out by Jani.

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: Define IS_BROXTON properly.
Rodrigo Vivi [Tue, 27 Oct 2015 17:14:54 +0000 (10:14 -0700)]
drm/i915: Define IS_BROXTON properly.

Kabylake will also be defined as gen9 and !is_skylake.
So we need start by creating a proper Broxton
definition, otherwise we will break broxton with the
introduction of Kabylake.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445966099-1640-2-git-send-email-rodrigo.vivi@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: remove an extra level of indirection in PCI ID list
Jani Nikula [Wed, 28 Oct 2015 17:33:09 +0000 (19:33 +0200)]
drm/i915: remove an extra level of indirection in PCI ID list

Add the PCI IDs directly in the pciidlist array instead of defining an
extra macro. The minor benefit from this is neater diffs when adding to
the end of the list.

v2: drop the "aka" comment (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446053589-21283-1-git-send-email-jani.nikula@intel.com
9 years agodrm/i915: Recover all available ringbuffer space following reset
Chris Wilson [Thu, 3 Sep 2015 12:01:40 +0000 (13:01 +0100)]
drm/i915: Recover all available ringbuffer space following reset

Having flushed all requests from all queues, we know that all
ringbuffers must now be empty. However, since we do not reclaim
all space when retiring the request (to prevent HEADs colliding
with rapid ringbuffer wraparound) the amount of available space
on each ringbuffer upon reset is less than when we start. Do one
more pass over all the ringbuffers to reset the available space

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Arun Siluvery <arun.siluvery@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
9 years agodrm/i915: Use paramtrized WRPLL_CTL()
Ville Syrjälä [Fri, 18 Sep 2015 17:03:33 +0000 (20:03 +0300)]
drm/i915: Use paramtrized WRPLL_CTL()

v2: Rebase due to SKL_DPLLx usage

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1442595836-23981-21-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: Add NEEDS_FORCEWAKE() checks for vlv/chv
Ville Syrjälä [Thu, 22 Oct 2015 12:35:00 +0000 (15:35 +0300)]
drm/i915: Add NEEDS_FORCEWAKE() checks for vlv/chv

Include an early NEEDS_FORCEWAKE() check for vlv and chv.
Hopefully that will avoid doing so many range checks in for many
register accesses (at least for all display registers).

Note that vlv already had the check in the write path since it shares
the gen6+ code for that.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445517300-28173-6-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agodrm/i915: Respin vlv/chv reagister access to look more like SKL
Ville Syrjälä [Thu, 22 Oct 2015 12:34:59 +0000 (15:34 +0300)]
drm/i915: Respin vlv/chv reagister access to look more like SKL

Change the fw domain handling in the vlv/chv register read/write
functions to look more like the SKL code, ie. have a single
__force_wake_get() get call instead of multiple ones.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445517300-28173-5-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agodrm/i915: Minor style nits in intel_uncore.c
Ville Syrjälä [Thu, 22 Oct 2015 12:34:58 +0000 (15:34 +0300)]
drm/i915: Minor style nits in intel_uncore.c

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445517300-28173-4-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agodrm/i915: Read FORCEWAKE registers with I915_READ_FW()
Ville Syrjälä [Thu, 22 Oct 2015 12:34:57 +0000 (15:34 +0300)]
drm/i915: Read FORCEWAKE registers with I915_READ_FW()

Change FORCEWAKE & co. reads for the error state to use I915_READ_FW().
Reading a FORCEWAKE register using a function that can frob forcewake
just seems wrong.

There is a check to skip grabbing the forcewake for accessing FORCEWAKE
in intel_uncore.c, but there's no such check for FORCEWAKE_MT. So no
idea what is currently happening with FORCEWAKE_MT reads. FORCEWAKE_VLV
is fortunately outside the forcewake range anyway, so no actual issue
with that one.

So let's just make the rule that you can't access FORCEWAKE registers with
the normal I915_READ() stuff, and we can drop the extra FORCEWAKE check
from NEEDS_FORCEWAKE(). While at it use NEEDS_FORCEWAKE() on BDW, where
it was skipped for whatever bikeshed reason that I've already forgotten.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445517300-28173-3-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agodrm/i915: Turn __raw_i915_read8() & co. in to inline functions
Ville Syrjälä [Thu, 22 Oct 2015 12:34:56 +0000 (15:34 +0300)]
drm/i915: Turn __raw_i915_read8() & co. in to inline functions

There's no need for __raw_i915_read8() & co. to be macros, so make them
inline functions. To avoid typo mistakes generate the inline functions
using preprocessor templates.

We have a few users of the raw register acces functions outside
intel_uncore.c, so let's also move the functions into intel_drv.h.

While doing that switch I915_READ_FW() & co. to use the
__raw_i915_read() functions, and use the _FW macros everywhere
outside intel_uncore.c where we want to read registers without
grabbing forcewake and whatnot. The only exception is
i915_check_vgpu() which itself gets called from intel_uncore.c,
so using the __raw_i915_read stuff there seems appropriate.

v2: Squash in the intel_uncore.c->i915_drv.h move
    Convert I915_READ_FW() to use __raw_i915_read(), and use
    I915_READ_FW() outside of intel_uncore.c (Chris)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445517300-28173-2-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
9 years agodrm/i915: Cope with request list state change during error state capture
Tomas Elf [Mon, 19 Oct 2015 16:51:57 +0000 (17:51 +0100)]
drm/i915: Cope with request list state change during error state capture

Since we're not synchronizing the ring request list during error state capture
the request list state might change between the time the corresponding error
request list was allocated and dimensioned to the time when the ring request
list is actually captured into the error state. If this happens then do an
early exit and be aware that the captured error state might not be fully
reliable.

* v2:
- Chris Wilson: Removed WARN_ON from size check since having the error state
  request list and the live driver request list diverge like this is a
  legitimate behaviour.

- Tomas Elf: Removed update of num_request field since this made no sense. Just
  exit and move on.

* v3:
- Chris Wilson: Removed error message at the point of early exit. The user is
  not interested in any state changes happening during the error state capture,
  only in the state that we're trying to capture at the point of the error.

Signed-off-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agoRevert "drm/i915: Add soft-pinning API for execbuffer"
Daniel Vetter [Fri, 23 Oct 2015 10:01:00 +0000 (12:01 +0200)]
Revert "drm/i915: Add soft-pinning API for execbuffer"

This reverts commit 510567234180d7d65d2db9f7bd8424cabef13d3c.

I somehow managed to combine a patch from Tomas Elf with a totally
unrelated commit message from Chris Wilson. Let's revert this and
reapply properly.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
9 years agodrm/i915: Update DRIVER_DATE to 20151023
Daniel Vetter [Fri, 23 Oct 2015 09:57:40 +0000 (11:57 +0200)]
drm/i915: Update DRIVER_DATE to 20151023

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: shut up gen8+ SDE irq dmesg noise
Daniel Vetter [Fri, 23 Oct 2015 08:56:12 +0000 (10:56 +0200)]
drm/i915: shut up gen8+ SDE irq dmesg noise

We get tons of cases where the master interrupt handler apparently set
a bit, with the SDEIIR disagreeing. No idea what's going on there, but
it's consistent on gen8+, no one seems to care about it and it's
making CI results flaky.

Shut it up.

No idea what's going on here, but we've had fun with PCH interrupts
before:

commit 44498aea293b37af1d463acd9658cdce1ecdf427
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date:   Fri Feb 22 17:05:28 2013 -0300

    drm/i915: also disable south interrupts when handling them

Note that there's a regression report in Bugzilla, and other
regression reports on the mailing lists keep croping up. But no ill
effects have ever been reported. But for paranoia still keep the
message at a debug level as a breadcrumb, just in case.

This message was introduced in

commit 38cc46d73ed99dd7002f1406002e52d7975d16cc
Author: Oscar Mateo <oscar.mateo@intel.com>
Date:   Mon Jun 16 16:10:59 2014 +0100

    drm/i915/bdw: Ack interrupts before handling them (GEN8)

v2: Improve commit message a bit.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1445590572-23631-2-git-send-email-daniel.vetter@ffwll.ch
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92084
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80896
Acked-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Grab execlist spinlock to avoid post-reset concurrency issues.
Tomas Elf [Mon, 19 Oct 2015 15:32:32 +0000 (16:32 +0100)]
drm/i915: Grab execlist spinlock to avoid post-reset concurrency issues.

Grab execlist lock when cleaning up execlist queues after GPU reset to avoid
concurrency problems between the context event interrupt handler and the reset
path immediately following a GPU reset.

* v2 (Chris Wilson):
Do execlist check and use simpler form of spinlock functions.

Signed-off-by: Tomas Elf <tomas.elf@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Add soft-pinning API for execbuffer
Chris Wilson [Tue, 6 Oct 2015 10:53:11 +0000 (11:53 +0100)]
drm/i915: Add soft-pinning API for execbuffer

Userspace can pass in an offset that it presumes the object is located
at. The kernel will then do its utmost to fit the object into that
location. The assumption is that userspace is handling its own object
locations (for example along with full-ppgtt) and that the kernel will
rarely have to make space for the user's requests.

v2: Fix i915_gem_evict_range() (now evict_for_vma) to handle ordinary
and fixed objects within the same batch

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: "Daniel, Thomas" <thomas.daniel@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Calculate watermark configuration during atomic check (v2)
Matt Roper [Thu, 24 Sep 2015 22:53:18 +0000 (15:53 -0700)]
drm/i915: Calculate watermark configuration during atomic check (v2)

v2: Don't forget to actually check the cstate->active value when
    tallying up the number of active CRTC's.  (Ander)

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Smoke-tested-by: Paulo Zanoni <przanoni@gmail.com>
Link: http://patchwork.freedesktop.org/patch/59561/