Arnd Bergmann [Wed, 30 Nov 2016 15:51:07 +0000 (16:51 +0100)]
Merge tag 'renesas-arm64-dt2-for-v4.10' of git://git./linux/kernel/git/horms/renesas into next/dt64
Pull "Second Round of Renesas ARM64 Based SoC DT Updates for v4.10" from Simon Horman:
Enhancements:
* Add device nodes for PRR
* Add m3ulcb board
* Enable I2C on r8a7796/salvator-x board
* Enable SDHI0 on h3ulcb board
* tag 'renesas-arm64-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7796: Add device node for PRR
arm64: dts: r8a7795: Add device node for PRR
arm64: dts: h3ulcb: rename SDHI0 pins
arm64: dts: h3ulcb: enable SDHI2
arm64: dts: m3ulcb: enable SDHI2
arm64: dts: m3ulcb: enable SDHI0
arm64: dts: m3ulcb: enable WDT
arm64: dts: m3ulcb: enable EXTALR clk
arm64: dts: m3ulcb: enable GPIO keys
arm64: dts: m3ulcb: enable GPIO leds
arm64: dts: m3ulcb: enable SCIF clk and pins
arm64: dts: m3ulcb: initial device tree
arm64: dts: m3ulcb: add M3ULCB board DT bindings
arm64: dts: h3ulcb: update header
arm64: dts: h3ulcb: update documentation with official board name
arm64: dts: r8a7796: salvator-x: enable I2C
arm64: dts: r8a7796: Enable I2C DMA
arm64: dts: r8a7796: add I2C support
Arnd Bergmann [Wed, 30 Nov 2016 14:08:55 +0000 (15:08 +0100)]
arm64: dts: fix build errors from missing dependencies
Two branches were incorrectly sent without having the necessary
header file changes. Rather than back those out now, I'm replacing
the symbolic names for the clks and resets with the numeric
values to get 'make allmodconfig dtbs' back to work.
After the header file changes are merged, we can revert this
patch.
Fixes:
6bc37fa ("arm64: dts: add Allwinner A64 SoC .dtsi")
Fixes:
50784e6 ("dts: arm64: db820c: add pmic pins specific dts file")
Acked-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 25 Nov 2016 23:49:49 +0000 (00:49 +0100)]
Merge tag 'mvebu-dt64-4.10-2' of git://git.infradead.org/linux-mvebu into next/dt64
Pull "mvebu dt64 for 4.10 (part 2)" from Gregory CLEMENT:
Fix DTC warning on Armada 37xx and 7K/8K
* tag 'mvebu-dt64-4.10-2' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: Fixup memory DT warning for Armada 37xx
arm64: dts: marvell: Fixup config-space DT warning For Armada 7K/8K
arm64: dts: marvell: Fixup internal-regs DT warning for Armada 37xx
Niklas Cassel [Fri, 14 Oct 2016 13:09:13 +0000 (15:09 +0200)]
ARM: dts: artpec: add pcie support
Add PCIe support to the ARTPEC-6 SoC. This uses the existing
pcie-artpec6 driver.
So, all that is needed is device tree entries in the DTS.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Jesper Nilsson <jespern@axis.com>
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:17 +0000 (19:37 +0100)]
arm64: dts: r8a7796: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:16 +0000 (19:37 +0100)]
arm64: dts: r8a7795: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Tue, 8 Nov 2016 14:16:29 +0000 (17:16 +0300)]
arm64: dts: h3ulcb: rename SDHI0 pins
This changes SDHI0 pin names for H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Tue, 8 Nov 2016 14:16:19 +0000 (17:16 +0300)]
arm64: dts: h3ulcb: enable SDHI2
This supports SDHI2 for H3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Tue, 8 Nov 2016 14:14:42 +0000 (17:14 +0300)]
arm64: dts: m3ulcb: enable SDHI2
This supports SDHI2 for M3ULCB onboard eMMC
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Tue, 8 Nov 2016 14:14:21 +0000 (17:14 +0300)]
arm64: dts: m3ulcb: enable SDHI0
This supports SDHI0 on M3ULCB board SD card slot
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:08:12 +0000 (21:08 +0300)]
arm64: dts: m3ulcb: enable WDT
This supports watchdog timer for M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:08:02 +0000 (21:08 +0300)]
arm64: dts: m3ulcb: enable EXTALR clk
This enables EXTALR clock that can be used for the watchdog.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:07:43 +0000 (21:07 +0300)]
arm64: dts: m3ulcb: enable GPIO keys
This supports GPIO keys on M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:07:31 +0000 (21:07 +0300)]
arm64: dts: m3ulcb: enable GPIO leds
This supports GPIO leds on M3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:07:20 +0000 (21:07 +0300)]
arm64: dts: m3ulcb: enable SCIF clk and pins
This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:07:09 +0000 (21:07 +0300)]
arm64: dts: m3ulcb: initial device tree
Add the initial device tree for the R8A7796 SoC based M3ULCB low cost
board (R-Car Starter Kit Pro)
This commit supports the following peripherals:
- SCIF (console)
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:06:57 +0000 (21:06 +0300)]
arm64: dts: m3ulcb: add M3ULCB board DT bindings
Add M3ULCB Device tree bindings Documentation, listing it as a supported
board.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:04:54 +0000 (21:04 +0300)]
arm64: dts: h3ulcb: update header
This updates H3ULCB device tree header with official board name
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Thu, 3 Nov 2016 18:04:44 +0000 (21:04 +0300)]
arm64: dts: h3ulcb: update documentation with official board name
This updates H3ULCB Device tree bindings Documentation with
official board name
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ulrich Hecht [Wed, 26 Oct 2016 14:14:09 +0000 (16:14 +0200)]
arm64: dts: r8a7796: salvator-x: enable I2C
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ulrich Hecht [Wed, 26 Oct 2016 14:14:08 +0000 (16:14 +0200)]
arm64: dts: r8a7796: Enable I2C DMA
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Ulrich Hecht [Wed, 26 Oct 2016 14:14:07 +0000 (16:14 +0200)]
arm64: dts: r8a7796: add I2C support
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Gregory CLEMENT [Mon, 7 Nov 2016 14:03:51 +0000 (15:03 +0100)]
ARM64: dts: marvell: Fixup memory DT warning for Armada 37xx
memory has a reg property so the unit name should contain an address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Gregory CLEMENT [Mon, 7 Nov 2016 14:02:06 +0000 (15:02 +0100)]
arm64: dts: marvell: Fixup config-space DT warning For Armada 7K/8K
config-space has a ranges property so the unit name should contain an
address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Gregory CLEMENT [Mon, 7 Nov 2016 14:00:15 +0000 (15:00 +0100)]
arm64: dts: marvell: Fixup internal-regs DT warning for Armada 37xx
internal-regs has a ranges property so the unit name should contain an
address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Olof Johansson [Sat, 19 Nov 2016 02:00:11 +0000 (18:00 -0800)]
Merge tag 'samsung-dt64-gic-flags-4.10' of git://git./linux/kernel/git/krzk/linux into next/dt64
Topic branch with DT arm64 changes for v4.10.
Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC
interrupts. Although this was working but with error messages like:
genirq: Setting trigger mode 0 for irq 16 failed
Use level high interrupt instead of type none. The choice of level high was
rather an arbitrary decision hoping it will work on each platform. Tests shown
no issues so far.
* tag 'samsung-dt64-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Use human-friendly symbols for interrupt properties in exynos7
arm64: dts: exynos: Fix invalid GIC interrupt flags in exynos7
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 19 Nov 2016 01:58:58 +0000 (17:58 -0800)]
Merge tag 'mvebu-dt64-4.10-1' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu dt64 for 4.10 (part 1)
Adding the new "community" board for Armada 3700
* tag 'mvebu-dt64-4.10-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: Add definition for the Globalscale Marvell ESPRESSOBin Board
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 19 Nov 2016 00:50:59 +0000 (16:50 -0800)]
Merge tag 'amlogic-dt64' of git://git./linux/kernel/git/khilman/linux-amlogic into next/dt64
Amlogic DT changes for 64-bit platforms for v4.10
Support for new drivers:
- USB
- i2c
- SPI
- mailbox/MHU
- PWM
- ethernet MAC, PHY
- secure monitor
- IR
- watchdog
* tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (27 commits)
ARM64: dts: meson-gxbb-vega-s95: Add SD/SDIO/MMC and PWM nodes
ARM64: dts: meson-gxl-s905x: Enable internal ethernet PHY
ARM64: dts: meson-gxl-p23x: Enable ethernet
ARM64: dts: meson-gxl: Add ethernet nodes with internal PHY
ARM64: dts: amlogic: Reorder copyrights for meson-gx
ARM64: dts: meson-gxl-p23x: Enable IR receiver
ARM64: dts: meson-gxl-p23x: Add SD/SDIO/MMC and PWM nodes
ARM64: dts: meson-gxl-p23x: Add uart pinctrl
ARM64: dts: meson-gxl: Add MMC/SD/SDIO nodes
ARM64: dts: meson-gxl: Add i2c nodes
ARM64: dts: meson-gxl: Add clock nodes
ARM64: dts: meson-gxl: Add pinctrl nodes
ARM64: dts: meson-gxbb: Move common nodes to meson-gx
ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes
ARM64: dts: meson-gxbb: Add SRAM node
ARM64: dts: meson-gxbb: Add MMC nodes to Nexbox A95x
ARM64: dts: meson-gxbb: Add P20x Wifi SDIO support
ARM64: dts: meson-gxbb: Add Wifi 32K clock for p20x boards
ARM64: dts: meson-gxbb: add MMC support
ARM64: dts: meson-gxbb-odroidc2: Enable USB Nodes
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sat, 19 Nov 2016 00:40:48 +0000 (16:40 -0800)]
Merge tag 'sunxi-dt64-for-4.10' of https://git./linux/kernel/git/mripard/linux into next/dt64
Allwinner arm64 DT changes for 4.10
Support for the Allwinner A64, their first armv8 SoC.
* tag 'sunxi-dt64-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
arm64: dts: add Pine64 support
Documentation: devicetree: add vendor prefix for Pine64
arm64: dts: add Allwinner A64 SoC .dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 18:38:12 +0000 (10:38 -0800)]
Merge tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi into next/dt64
ARM64: DT: Hisilicon SoC DT updates for 4.10
- Correct the hardware pin number of the usb node on the Hip06
- Add the Hisilicon Hip07 D05 board dts binding
- Add the initial dts for the Hip07 D05 board
- Fix the warning for the node without reg propery on the Hip06
- Fix the sas am max transmissions quirk property on the Hip06
- Disable the sas0 and sas2 on D03 board
- Add refclk node for SAS on the Hip06
* tag 'hisi-arm64-dt-4.10' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisi: add refclk node to hip06 dts files for SAS
arm64: dts: hisi: disable sas0 and sas2 for d03
arm64: dts: hisi: fix hip06 sas am-max-trans quirk
arm64: dts: hip06: Fix no reg property warning
arm64: dts: hisilicon: Add initial dts for Hip07 D05 board
Documentation: arm64: Add Hisilicon Hip07 D05 dts binding
arm64: dts: hip06: Correct hardware pin number of usb node
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 18:32:14 +0000 (10:32 -0800)]
Merge tag 'imx-dt64-4.10' of git://git./linux/kernel/git/shawnguo/linux into next/dt64
Freescale arm64 device tree updates for 4.10:
- Enable Thermal Monitoring Unit (TMU) for thermal management on
LS1043A and LS2080A.
- Add support for LS1046A SoC, which has similar peripherals as
LS1043A but integrates 4 A72 cores.
- Add two LS1046A based board support: LS1046A-QDS and LS1046A-RDB.
* tag 'imx-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: Add TMU device tree support for LS2080A
arm64: dts: ls1043a: Add TMU device tree support for LS1043A
arm64: dts: add LS1046A-QDS board support
Documentation: DT: Add entry for QorIQ LS1046A-QDS board
arm64: dts: add LS1046A-RDB board support
Documentation: DT: Add entry for QorIQ LS1046A-RDB board
arm64: dts: add QorIQ LS1046A SoC support
dt-bindings: ahci-fsl-qoriq: updated for SoC ls1046a
dt-bindings: qoriq-clock: add LS1043A/LS1046A/LS2080A compatible for clockgen
dt-bindings: i2c: adds two more nxp devices
dt-bindings: fsl: add LS1043A/LS1046A/LS2080A compatible for SCFG and DCFG
dt-bindings: fsl: Add LS1043A/LS1046A/LS2080A SoC compatible strings
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 17:42:26 +0000 (09:42 -0800)]
Merge tag 'qcom-arm64-for-4.10' of git://git./linux/kernel/git/agross/linux into next/dt64
Qualcomm ARM64 Updates for v4.10
* Add Hexagon SMD/PIL nodes
* Add DB820c PMIC pins
* Fixup APQ8016 voltage ranges
* Add various MSM8996 nodes to support SMD/SMEM/SMP2P
* Add support for Huawei Nexus 6P (Angler)
* Add support for LG Nexus 5x (Bullhead)
* tag 'qcom-arm64-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: msm8994 SoC and Huawei Angler (Nexus 6P) support
dt-bindings: qcom: Add msm899(2/4) bindings
arm64: dts: msm8992 SoC and LG Bullhead (Nexus 5X) support
arm64: dts: msm8996: Add SMP2P and APCS nodes
arm64: dts: msm8996: Add SMEM DT nodes
arm64: dts: msm8996: Add reserve-memory nodes
arm64: dts: msm8996: Add SMEM reserve-memory node
arm64: dts: apq8016-sbc: add analog audio support with multicodec
arm64: dts: qcom: Add missing interrupt entry for pm8994 gpios
arm64: dts: apq8016-sbc: Set up LDO2, LDO6 and LDO17 regulator voltage ranges
dts: arm64: db820c: add pmic pins specific dts file
arm64: dts: qcom: msm8916: Add Hexagon PIL node
arm64: dts: qcom: msm8916: Add Hexagon SMD edge
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 17:42:08 +0000 (09:42 -0800)]
Merge branch 'clk-qcom-8994' of git://git./linux/kernel/git/clk/linux into next/dt64
* 'clk-qcom-8994' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: qcom: Add support for msm8994 global clock controller
dt-bindings: qcom: clocks: Add msm8994 clock bindings
Olof Johansson [Fri, 18 Nov 2016 07:32:45 +0000 (23:32 -0800)]
Merge tag 'v4.10-rockchip-dts64-1' of git://git./linux/kernel/git/mmind/linux-rockchip into next/dt64
64bit devicetree changes including the px5 evaluation board
a fix for wrong i2c registers on rk3368 a new nvmem cell and
power-domain on rk3399 as well as moving mmc frequency
properties to the more generic max-frequency one.
* tag 'v4.10-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
arm64: dts: rockchip: add cpu-id nvmem cell node for rk3399
arm64: dts: rockchip: add sdmmc support for px5-evb
arm64: dts: rockchip: Add more properties for emmc on px5-evb
arm64: dts: rockchip: Add PX5 Evaluation board
arm64: dts: rockchip: add powerdomain for typec on rk3399
arm64: dts: rockchip: fix i2c resource error of rk3368
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 01:53:42 +0000 (17:53 -0800)]
Merge tag 'samsung-dt64-4.10' of git://git./linux/kernel/git/krzk/linux into next/dt64
Finally, I am really pleased to announce adding support for Exynos5433 ARMv8
SoC along with two boards. A lot of Samsung people contributed into this
but the final work and commits were done by Chanwoo Choi.
This means that for v4.10 we got:
1. Exynos5433 DTSI.
2. Two boards: TM2 and TM2E. These are (almost fully) working mobile phones.
* tag 'samsung-dt64-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board
arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board
arm64: dts: exynos: Add dtsi files for Samsung Exynos5433 64bit SoC
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 01:46:58 +0000 (17:46 -0800)]
Merge tag 'uniphier-dt64-v4.10' of git://git./linux/kernel/git/masahiroy/linux-uniphier into next/dt64
UniPhier ARM64 SoC DT updates for v4.10
- Switch CPU enable-method from spin-table to PSCI
- Add OPP tables to support generic cpufreq driver
- Misc fixes
* tag 'uniphier-dt64-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
arm64: dts: uniphier: make compatible of syscon nodes SoC-specific
arm64: dts: uniphier: add CPU clocks and OPP tables for LD20 SoC
arm64: dts: uniphier: add CPU clock and OPP table for LD11 SoC
arm64: dts: uniphier: increase register region size of sysctrl node
arm64: dts: uniphier: switch over to PSCI enable method
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Fri, 18 Nov 2016 01:46:45 +0000 (17:46 -0800)]
Merge tag 'v4.9-rc3' into next/dt64
Linux 4.9-rc3
* tag 'v4.9-rc3': (292 commits)
Linux 4.9-rc3
x86/smpboot: Init apic mapping before usage
ACPICA: Dispatcher: Fix interpreter locking around acpi_ev_initialize_region()
ACPICA: Dispatcher: Fix an unbalanced lock exit path in acpi_ds_auto_serialize_method()
ACPICA: Dispatcher: Fix order issue of method termination
ARC: module: print pretty section names
ARC: module: elide loop to save reference to .eh_frame
ARC: mm: retire ARC_DBG_TLB_MISS_COUNT...
ARC: build: retire old toggles
ARC: boot log: refactor cpu name/release printing
ARC: boot log: remove awkward space comma from MMU line
ARC: boot log: don't assume SWAPE instruction support
ARC: boot log: refactor printing abt features not captured in BCRs
ARCv2: boot log: print IOC exists as well as enabled status
ubifs: Fix regression in ubifs_readdir()
ubi: fastmap: Fix add_vol() return value test in ubi_attach_fastmap()
MAINTAINERS: Add entry for genwqe driver
VMCI: Doorbell create and destroy fixes
GenWQE: Fix bad page access during abort of resource allocation
vme: vme_get_size potentially returning incorrect value on failure
...
Olof Johansson [Fri, 18 Nov 2016 01:39:56 +0000 (17:39 -0800)]
Merge tag 'renesas-arm64-dt-for-v4.10' of git://git./linux/kernel/git/horms/renesas into next/dt64
Renesas ARM64 Based SoC DT Updates for v4.10
Enablement:
* Enable On-board eMMC
* Enable SDHI 0 & 3 with UHS
* Add SYS-DMAC controller nodes to r8a7796 SoC
* Populate EXTALR on r8a7796/salvator-x board; used by watchdog
* Add DU LVDS output endpoint on r8a7795/salvator-x board
* Add bias setting for USB1 pins on r8a7795/salvator-x board
Clean-Up:
* Remove FCP SoC-specific compatible strings
* tag 'renesas-arm64-dt-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: renesas: r8a7796: add SYS-DMAC controller nodes
arm64: dts: r8a7795: salvator-x: add bias setting for usb1_pins
arm64: dts: r8a7796: salvator: enable on board eMMC
arm64: dts: r8a7795: salvator: enable on-board eMMC
arm64: dts: r8a7796: salvator-x: enable UHS for SDHI 0 & 3
arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3
arm64: dts: r8a7796: add SDHI nodes
arm64: dts: r8a7795: Remove FCP SoC-specific compatible strings
dt-bindings: media: renesas-fcp: Remove SoC-specific compatible strings
arm64: dts: r8a7795: salvator-x: Add DU LVDS output endpoint
arm64: dts: r8a7796: salvator-x: Populate EXTALR
arm64: dts: r8a7795: salvator-x: enable UHS for SDHI 0 & 3
Signed-off-by: Olof Johansson <olof@lixom.net>
Martin Blumenstingl [Sat, 12 Nov 2016 13:07:19 +0000 (14:07 +0100)]
ARM64: dts: meson-gxbb-vega-s95: Add SD/SDIO/MMC and PWM nodes
All boards from the Tronsmart Vega S95 series are sharing similar MMC
based hardware.
sd_emmc_a is used to connect a Broadcom based SDIO wifi card (supported
by the brcmfmac driver). The 32.768KHz LPO clock for the wifi chip is
generated by PWM_E.
sd_emmc_b is routed to the SD-card. Unlike p20x there is no GPIO
regulator, meaning it only supports 3.3V (which seems to be hard-wired).
The eMMC chip is connected to sd_emmc_c and is implemented similar to
the meson-gxbb-p20x boards (meaning that hard-wired fixed regulators
are used).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 7 Nov 2016 10:43:57 +0000 (11:43 +0100)]
ARM64: dts: meson-gxl-s905x: Enable internal ethernet PHY
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 7 Nov 2016 10:43:56 +0000 (11:43 +0100)]
ARM64: dts: meson-gxl-p23x: Enable ethernet
Enable Ethernet on the p23x board, pinctrl attribute is only added for
the p230 board since the p231 only uses the Internal PHY.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 7 Nov 2016 10:43:55 +0000 (11:43 +0100)]
ARM64: dts: meson-gxl: Add ethernet nodes with internal PHY
Add Ethernet node with Internal PHY selection for the Amlogic GXL SoCs
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Andreas Färber [Sun, 6 Nov 2016 19:25:34 +0000 (20:25 +0100)]
ARM64: dts: amlogic: Reorder copyrights for meson-gx
meson-gx.dtsi was directly derived from meson-gxbb.dtsi, so keep the
copyrights in chronological order to not give a wrong impression.
Fixes:
c328666d58aa ("ARM64: dts: amlogic: Add Meson GX dtsi from GXBB")
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:46 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl-p23x: Enable IR receiver
Enable the Infraread Receiver on the p23x board.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:45 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl-p23x: Add SD/SDIO/MMC and PWM nodes
Add SD/SDIO/MMC nodes and PWM 32768Hz clock configuration to provide
storage and WiFi functionality on the p23x boards.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:44 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl-p23x: Add uart pinctrl
Add pinctrl attribute to p23x uart node.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:43 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl: Add MMC/SD/SDIO nodes
Add MMC/SD/SDIO nodes clock attributes for Amlogic Meson GXL.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:42 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl: Add i2c nodes
Add i2c nodes clock attributes for Amlogic Meson GXL.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:41 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl: Add clock nodes
Add clock node for Amlogic Meson GXL.
The GXBB compatible is retained since the GXBB clock tree is used for now.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:40 +0000 (17:44 +0100)]
ARM64: dts: meson-gxl: Add pinctrl nodes
Add pinctrl nodes and pin definitions for Amlogic Meson GXL.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[khilman: use GXBB include until GXL pinctrl support merged]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Mon, 31 Oct 2016 16:44:39 +0000 (17:44 +0100)]
ARM64: dts: meson-gxbb: Move common nodes to meson-gx
Move common nodes between GXBB and GXL in to the common GX dtsi.
Leave the clock attributes in the GXBB dtsi for now.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Neil Armstrong [Wed, 19 Oct 2016 12:51:12 +0000 (14:51 +0200)]
ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
John Garry [Mon, 7 Nov 2016 16:44:25 +0000 (00:44 +0800)]
arm64: dts: hisi: add refclk node to hip06 dts files for SAS
We will only maintain 1 dts for D03 and there are 50MHz
and 66MHz versions of D03: so we expect UEFI to update
refclk rate in the fdt at boot time.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
John Garry [Mon, 7 Nov 2016 16:44:24 +0000 (00:44 +0800)]
arm64: dts: hisi: disable sas0 and sas2 for d03
The SAS nodes sas0 and sas2 are not available on d03, so
disable them.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
John Garry [Mon, 7 Nov 2016 16:44:23 +0000 (00:44 +0800)]
arm64: dts: hisi: fix hip06 sas am-max-trans quirk
The string for the am max transmissions quirk property
is not correct -> fix it.
Signed-off-by: John Garry <john.garry@huawei.com>
Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Mon, 24 Oct 2016 03:40:28 +0000 (11:40 +0800)]
arm64: dts: hip06: Fix no reg property warning
Warning (unit_address_vs_reg): Node /soc/ethernet@4 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@5 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@0 has a unit name, but no reg property
Warning (unit_address_vs_reg): Node /soc/ethernet@1 has a unit name, but no reg property
Fix warning when build with W=1.
Cc: Kejian Yan <yankejian@huawei.com>
Cc: Yisen Zhuang <yisen.zhuang@huawei.com>
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Sat, 24 Sep 2016 09:14:23 +0000 (17:14 +0800)]
arm64: dts: hisilicon: Add initial dts for Hip07 D05 board
Adding initial dt file for Hip07 D05 board, it is with dual socket
and each socket has two SCCLs(supper cpu cluster), one SCCL contains
four clusters and each cluster has quard Cortex-A72.
Since each SCCL has their own DDR controller, it could be treated as
a separate numa node. Thus, there are four numa nodes(one node with
sixteen core) on Hip07 SoC.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Sat, 24 Sep 2016 09:14:22 +0000 (17:14 +0800)]
Documentation: arm64: Add Hisilicon Hip07 D05 dts binding
This patch adds documentation for the devicetree bindings used by
the DT files of Hisilicon Hip07 D05 board.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Kefeng Wang [Sat, 24 Sep 2016 09:14:21 +0000 (17:14 +0800)]
arm64: dts: hip06: Correct hardware pin number of usb node
The ohci/ehci hardware pin number should be 640/641, correct them.
Fixes: commit
aa8d3e74f54d ("arm64: dts: Add initial dts for Hisilicon Hip06 D03 board")
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Hongtao Jia [Sun, 9 Oct 2016 06:47:06 +0000 (14:47 +0800)]
arm64: dts: ls2080a: Add TMU device tree support for LS2080A
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Hongtao Jia [Sun, 9 Oct 2016 06:47:05 +0000 (14:47 +0800)]
arm64: dts: ls1043a: Add TMU device tree support for LS1043A
Also add nodes and properties for thermal management support.
Signed-off-by: Jia Hongtao <hongtao.jia@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Bastian Köcher [Fri, 4 Nov 2016 20:56:36 +0000 (13:56 -0700)]
arm64: dts: msm8994 SoC and Huawei Angler (Nexus 6P) support
Initial device tree support for Qualcomm MSM8994 SoC and
Huawei Angler / Google Nexus 6P support.
The device tree is based on the Google 3.10 kernel tree.
The device can be booted into the initrd with only one CPU running.
Signed-off-by: Bastian Köcher <mail@kchr.de>
[jeremymc@redhat.com: removed Kconfig, defconfig, move from Huawei to qcom dir]
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Tested-by: Michael Scott <michael.scott@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Jeremy McNicoll [Fri, 4 Nov 2016 20:56:33 +0000 (13:56 -0700)]
dt-bindings: qcom: Add msm899(2/4) bindings
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Jeremy McNicoll [Fri, 4 Nov 2016 20:56:31 +0000 (13:56 -0700)]
arm64: dts: msm8992 SoC and LG Bullhead (Nexus 5X) support
Initial device tree support for Qualcomm MSM8992 SoC and
LG Bullhead / Google Nexus 5X support.
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
spjoshi@codeaurora.org [Fri, 21 Oct 2016 23:19:19 +0000 (16:19 -0700)]
arm64: dts: msm8996: Add SMP2P and APCS nodes
Add SMP2P and APCS DT nodes required for Qualcomm ADSP
Peripheral Image Loader.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bjorn Andersson [Fri, 21 Oct 2016 23:19:18 +0000 (16:19 -0700)]
arm64: dts: msm8996: Add SMEM DT nodes
Add SMEM and TCSR DT nodes on MSM8996.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
spjoshi@codeaurora.org [Fri, 21 Oct 2016 23:19:17 +0000 (16:19 -0700)]
arm64: dts: msm8996: Add reserve-memory nodes
Add reserve-memory nodes required for Qualcomm
Peripheral Image Loaders
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
spjoshi@codeaurora.org [Fri, 21 Oct 2016 23:19:16 +0000 (16:19 -0700)]
arm64: dts: msm8996: Add SMEM reserve-memory node
Add DT node to carveout memory for shared memory region.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Srinivas Kandagatla [Thu, 20 Oct 2016 14:20:49 +0000 (15:20 +0100)]
arm64: dts: apq8016-sbc: add analog audio support with multicodec
This patch add support to Analog audio both Playback and Capture via
msm8916 WCD muti codec.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bastian Köcher [Fri, 4 Nov 2016 20:56:35 +0000 (13:56 -0700)]
clk: qcom: Add support for msm8994 global clock controller
The clock definition was ported from the Google 3.10 kernel tree to
work with the latest kernel.
Signed-off-by: Bastian Köcher <mail@kchr.de>
[jeremymc@redhat.com: created new commit of just dt-bindings]
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
[sboyd@codeaurora.org: Tidy up commit text and Kconfig help]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Rajendra Nayak [Wed, 5 Oct 2016 09:11:23 +0000 (14:41 +0530)]
arm64: dts: qcom: Add missing interrupt entry for pm8994 gpios
pm8994 has 22 gpios, so add the missing interrupts entry for one
of the gpios
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Archit Taneja [Fri, 23 Sep 2016 09:20:30 +0000 (14:50 +0530)]
arm64: dts: apq8016-sbc: Set up LDO2, LDO6 and LDO17 regulator voltage ranges
On the APQ8016 SBC, the LDO2 PM8916 regulator feeds 1.2V to the following:
- VDDA_1P2_MIPI_DSI and VDDA_MIPI_CSI pins on APQ8016.
- VCCCAD pins on the LPDDR3 chip.
- VDDPX_1 pins on APQ8016.
The LDO6 regulator feeds 1.8V to:
- VDAA_MIPI_DSI0_PLL pin on APQ8016.
- QFPROM_BLOW_VDD pin on PM8916.
- The AVDD, A2VDD and DVDD pins on ADV7533 bridge.
The LDO17 regulator feeds 3.3V to:
- The V3P3 pin on ADV7533 bridge.
Currently, the regulator min/max voltages for all the LDOs are set to the
range of what the PMIC supports. Set the ranges for L2, L6 and L17 to what
we need, i.e. 1.2V, 1.8V and 3.3V respectively.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Jeremy McNicoll [Fri, 4 Nov 2016 20:56:32 +0000 (13:56 -0700)]
dt-bindings: qcom: clocks: Add msm8994 clock bindings
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
[sboyd@codeaurora.org: Dropped unused and incorrect GDSC defines]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Jaehoon Chung [Thu, 3 Nov 2016 06:21:34 +0000 (15:21 +0900)]
arm64: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
In drivers/mmc/core/host.c, there is "max-freqeuncy" property.
It should be same behavior, So Use the "max-frequency" instead of
"clock-freq-min-max".
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Masahiro Yamada [Sat, 5 Nov 2016 14:30:11 +0000 (23:30 +0900)]
arm64: dts: uniphier: make compatible of syscon nodes SoC-specific
These hardware blocks are SoC-specific, so their compatible strings
should be SoC-specific as well. This change has no impact on the
actual behavior since it is controlled by the generic "simple-mfd",
"syscon" compatible strings.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 20 Oct 2016 04:44:07 +0000 (13:44 +0900)]
arm64: dts: uniphier: add CPU clocks and OPP tables for LD20 SoC
Add a CPU clock to every CPU node and CPU OPP tables to use the
generic cpufreq driver. All the CPUs in each cluster share the
same OPP table.
Note:
clock-latency-ns (300ns) was calculated based on the CPU-gear switch
sequencer spec; it takes 12 clock cycles on the sequencer running
at 50 MHz, plus a bit additional latency.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Masahiro Yamada [Thu, 20 Oct 2016 04:44:06 +0000 (13:44 +0900)]
arm64: dts: uniphier: add CPU clock and OPP table for LD11 SoC
Add a CPU clock to every CPU node and a CPU OPP table to use the
generic cpufreq driver.
Note:
clock-latency-ns (300ns) was calculated based on the CPU-gear switch
sequencer spec; it takes 12 clock cycles on the sequencer running
at 50 MHz, plus a bit additional latency.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Masahiro Yamada [Sun, 16 Oct 2016 15:42:42 +0000 (00:42 +0900)]
arm64: dts: uniphier: increase register region size of sysctrl node
The System Control node has 0x10000 byte of registers. The current
reg size must be expanded to use the cpufreq driver because the
registers controlling CPU frequency are located at offset 0x8000.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 16 Oct 2016 14:59:16 +0000 (23:59 +0900)]
arm64: dts: uniphier: switch over to PSCI enable method
At the first system bring-up, I chose to use spin-table because ARM
Trusted Firmware was not ready for this platform at that moment.
Actually, these SoCs are equipped with EL3 and able to provide PSCI.
Now I finished porting the ATF BL31 for the UniPhier platform, so it
is ready to migrate to PSCI enable method.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Ulrich Hecht [Wed, 14 Sep 2016 16:45:48 +0000 (18:45 +0200)]
arm64: renesas: r8a7796: add SYS-DMAC controller nodes
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Yoshihiro Shimoda [Thu, 27 Oct 2016 10:29:27 +0000 (19:29 +0900)]
arm64: dts: r8a7795: salvator-x: add bias setting for usb1_pins
Since this board doesn't mount pull-up/down registers for
USB1_{OVC,PWEN} pins, we should enable bias setting to pull these
pins up/down.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Wolfram Sang [Tue, 6 Sep 2016 08:52:25 +0000 (10:52 +0200)]
arm64: dts: r8a7796: salvator: enable on board eMMC
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Wolfram Sang [Sun, 16 Oct 2016 08:27:47 +0000 (10:27 +0200)]
arm64: dts: r8a7795: salvator: enable on-board eMMC
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 13 Sep 2016 10:57:07 +0000 (12:57 +0200)]
arm64: dts: r8a7796: salvator-x: enable UHS for SDHI 0 & 3
Based on work for the r8a7796 by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Simon Horman [Tue, 16 Aug 2016 08:55:04 +0000 (10:55 +0200)]
arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3
Enable the exposed SD card slots in the DT of the r8a7796/salvator-x.
Based on work for the r8a7795/salvator-x by Ai Kyuse.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Krzysztof Kozlowski [Fri, 16 Sep 2016 21:41:56 +0000 (23:41 +0200)]
arm64: dts: exynos: Use human-friendly symbols for interrupt properties in exynos7
Replace hard-coded values of type of GIC interrupt and its flags with
respective macros from header to increase code readability
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Krzysztof Kozlowski [Fri, 16 Sep 2016 20:01:13 +0000 (22:01 +0200)]
arm64: dts: exynos: Fix invalid GIC interrupt flags in exynos7
Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and
generates an error:
genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68)
The GIC requires shared interrupts to be edge rising or level high.
Platform declares support for both. Arbitrarily choose level high
everywhere hoping it will work on each platform.
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reported-by: Alban Browaeys <alban.browaeys@gmail.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Chanwoo Choi [Thu, 3 Nov 2016 06:39:09 +0000 (15:39 +0900)]
arm64: dts: exynos: Add dts file for Exynos5433-based TM2E board
This patch adds the Device Tree source for Exynos5433-based Samsung TM2E
board. TM2E board is very similar to the TM2 board so the
exynos5433-tm2e.dts includes the TM2 DTS and overrides the differences.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Ingi kim <ingi2.kim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Chanwoo Choi [Thu, 3 Nov 2016 06:39:08 +0000 (15:39 +0900)]
arm64: dts: exynos: Add dts file for Exynos5433-based TM2 board
This patch adds the Device Tree source for Exynos5433-based Samsung TM2
board.
This patch adds support for following devices:
1. basic SoC
- Initial booting for Samsung Exynos5433 SoC
- DRAM LPDDR3 (3GB)
- eMMC (32GB)
- ARM architecture timer
2. power management devices
- Sasmung S2MPS13 PMIC for the power supply
- CPUFREQ for big.LITTLE cores
- TMU for big.LITTLE cores and GPU
- ADC with thermistor to measure the temperature of AP/Battery/Charger
- Maxim MAX77843 Interface PMIC (MUIC/Haptic/Regulator)
3. sound devices
- I2S for sound bus
- LPASS for sound power control
- Wolfson WM5110 for sound codec
- Maxim MAX98504 for speaker amplifier
- TM2 ASoC Machine device driver node
3. display devices
- DECON, DSI and MIC for the panel output
4. USB devices
- USB 3.0 DRD (Dual Role Device)
- USB 3.0 Host controller
5. storage devices
- MSHC (Mobile Storage Host Controller) for eMMC device
6. misc devices
- gpio-keys (power, volume up/down, home key)
- PWM (Pulse Width Modulation Timer)
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Ingi kim <ingi2.kim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Chanwoo Choi [Thu, 3 Nov 2016 06:39:07 +0000 (15:39 +0900)]
arm64: dts: exynos: Add dtsi files for Samsung Exynos5433 64bit SoC
This patch adds new Exynos5433 dtsi to support 64-bit Exynos5433 SoC
based on Octa-core CPUs (quad Cortex-A57 and quad Cortex-A53).
Exynos5433 supports PSCI (Power State Coordination Interface) v0.1.
This patch includes following Device Tree nodes to support Exynos5433 SoC:
1. Octa cores for big.LITTLE architecture
- Cortex-A53 LITTLE Quad-core
- Cortex-A57 big Quad-core
- Supporting PSCI v0.1
2. Clock controller nodes
- CMU_TOP : clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
- CMU_CPIF : clocks for LLI (Low Latency Interface)
- CMU_MIF : clocks for DRAM Memory Controller
- CMU_PERIC : clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS
- CMU_PERIS : clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC
- CMU_FSYS : clocks for USB/UFS/SDMMC/TSI/PDMA
- CMU_G2D : clocks for G2D/MDMA
- CMU_DISP : clocks for DECON/HDMI/DSIM/MIXER
- CMU_AUD : clocks for Cortex-A5/BUS/AUDIO
- CMU_BUS{0|1|2} : clocks for global data buses and global peripheral buses
- CMU_G3D : clocks for 3D Graphics Engine
- CMU_GSCL : clocks for GSCALER
- CMU_APOLLO: clocks for Cortex-A53 Quad-core processor.
- CMU_ATLAS : clocks for Cortex-A57 Quad-core processor,
CoreSight and L2 cache controller.
- CMU_MSCL : clocks for M2M (Memory to Memory) scaler and JPEG IPs.
- CMU_MFC : clocks for MFC (Multi-Format Codec) IP.
- CMU_HEVC : clocks for HEVC(High Efficiency Video Codec) decoder IP.
- CMU_ISP : clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
- CMU_CAM0 : clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} IPs.
- CMU_CAM1 : clocks for COrtex-A5/MIPI_CSIS2/FIMC_LITE_C/FIMC-FD IPs.
3. Pinctrl nodes for GPIO
- alive/aud/cpif/ese/finger/fsys/imem/nfc/peric/touch pad
4. Timers
- ARM architecture timer (armv8-timer)
- MCT (Multi Core Timer) timer
5. Interrupt controller (GIC-400)
6. BUS devices
- HS-I2C (High-Speed I2C) device
- SPI (Serial Peripheral Interface) device
7. Sound devices
- I2S bus
- LPASS (Low Power Audio Subsystem)
8. Power management devices
- CPUFREQ for for Cortex-A53/A57
- TMU (Thermal Management Unit) for Cortex-A53/A57, G3D, ISP
9. Display controller devices
- DECON (Display and enhancement controller) for panel output
- DSI (Display Serial Interface)
- MIC (Mobile Image Compressor)
10. USB
- USB 3.0 DRD (Dual Role Device) controller
- USB 3.0 Host controller
11. Storage devices
- MSHC (Mobile Storage Host Controller)
12. Misc devices
- UART devices
- ADC (Analog Digital Converter)
- PWM (Pulse Width Modulation)
- ADMA (Advanced DMA) and PDMA (Peripheral DMA)
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Ingi kim <ingi2.kim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Tested-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Andre Przywara [Tue, 19 Jan 2016 10:36:39 +0000 (10:36 +0000)]
arm64: dts: add Pine64 support
The Pine64 is a cost-efficient development board based on the
Allwinner A64 SoC.
There are three models: the basic version with Fast Ethernet and
512 MB of DRAM (Pine64) and two Pine64+ versions, which both
feature Gigabit Ethernet and additional connectors for touchscreens
and a camera. Or as my son put it: "Those are smaller and these are
missing." ;-)
The two Pine64+ models just differ in the amount of DRAM
(1GB vs. 2GB). Since U-Boot will figure out the right size for us and
patches the DT accordingly we just need to provide one DT for the
Pine64+.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[Maxime: Removed the common DTSI and include directly the pine64 DTS]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Andre Przywara [Wed, 17 Feb 2016 01:03:46 +0000 (01:03 +0000)]
Documentation: devicetree: add vendor prefix for Pine64
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
[Maxime: Change title prefix to match the usual style]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Andre Przywara [Mon, 18 Jan 2016 10:24:31 +0000 (10:24 +0000)]
arm64: dts: add Allwinner A64 SoC .dtsi
The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores
and the typical tablet / TV box peripherals.
The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of
the peripherals and the memory map.
Although the cores are proper 64-bit ones, the whole SoC is actually
limited to 4GB (including all the supported DRAM), so we use 32-bit
address and size cells. This has the nice feature of us being able to
reuse the DT for 32-bit kernels as well.
This .dtsi lists the hardware that we support so far.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
[Maxime: Convert to CCU binding, drop the MMC support for now]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Ziyuan Xu [Sun, 30 Oct 2016 02:57:25 +0000 (10:57 +0800)]
arm64: dts: rockchip: add cpu-id nvmem cell node for rk3399
There is a 'cpu-id' field in efuse, export it for other drivers
reference.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Linus Torvalds [Sat, 29 Oct 2016 20:52:02 +0000 (13:52 -0700)]
Linux 4.9-rc3
Linus Torvalds [Sat, 29 Oct 2016 20:42:44 +0000 (13:42 -0700)]
Merge branch 'x86-urgent-for-linus' of git://git./linux/kernel/git/tip/tip
Pull x86 bugfix from Thomas Gleixner:
"A single bugfix for the recent changes related to registering the boot
cpu when this has not happened before prefill_possible_map().
The main problem with this change got fixed already, but we missed the
case where the local APIC is not yet mapped, when prefill_possible_map()
is invoked, so the registration of the boot cpu which has the APIC bit
set in CPUID will explode.
I should have seen that issue earlier, but all I can do now is feeling
embarassed"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/smpboot: Init apic mapping before usage
Linus Torvalds [Sat, 29 Oct 2016 20:15:24 +0000 (13:15 -0700)]
Merge tag 'upstream-4.9-rc3' of git://git.infradead.org/linux-ubifs
Pull ubi/ubifs fixes from Richard Weinberger:
"This contains fixes for issues in both UBI and UBIFS:
- A regression wrt overlayfs, introduced in -rc2.
- An UBI issue, found by Dan Carpenter's static checker"
* tag 'upstream-4.9-rc3' of git://git.infradead.org/linux-ubifs:
ubifs: Fix regression in ubifs_readdir()
ubi: fastmap: Fix add_vol() return value test in ubi_attach_fastmap()
Linus Torvalds [Sat, 29 Oct 2016 19:07:29 +0000 (12:07 -0700)]
Merge tag 'armsoc-fixes' of git://git./linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"We haven't seen a whole lot of fixes for the first two weeks since the
merge window, but here is the batch that we have at the moment.
Nothing sticks out as particularly bad or scary, it's mostly a handful
of smaller fixes to several platforms. The Uniphier reset controller
changes could probably have been delayed to 4.10, but they're not
scary and just plumbing up driver changes that went in during the
merge window.
We're also adding another maintainer to Marvell Berlin platforms, to
help out when Sebastian is too busy. Yay teamwork!"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: imx: mach-imx6q: Fix the PHY ID mask for AR8031
ARM: dts: vf610: fix IRQ flag of global timer
ARM: imx: gpc: Fix the imx_gpc_genpd_init() error path
ARM: imx: gpc: Initialize all power domains
arm64: dts: Updated NAND DT properties for NS2 SVK
arm64: dts: uniphier: change MIO node to SD control node
ARM: dts: uniphier: change MIO node to SD control node
reset: uniphier: rename MIO reset to SD reset for Pro5, PXs2, LD20 SoCs
arm64: uniphier: select ARCH_HAS_RESET_CONTROLLER
ARM: uniphier: select ARCH_HAS_RESET_CONTROLLER
arm64: dts: Add timer erratum property for LS2080A and LS1043A
arm64: dts: rockchip: remove the abuse of keep-power-in-suspend
ARM: multi_v7_defconfig: Enable Intel e1000e driver
MAINTAINERS: add myself as Marvell berlin SoC maintainer
bus: qcom-ebi2: depend on ARCH_QCOM or COMPILE_TEST
ARM: dts: fix the SD card on the Snowball
arm64: dts: rockchip: remove always-on and boot-on from vcc_sd
arm64: dts: marvell: fix clocksource for CP110 master SPI0
ARM: mvebu: Select corediv clk for all mvebu v7 SoC
Olof Johansson [Sat, 29 Oct 2016 18:43:57 +0000 (11:43 -0700)]
Merge tag 'juno-dt-4.10' of git://git./linux/kernel/git/sudeep.holla/linux into next/dt64
ARMv8 Vexpress/Juno DT updates for v4.10
1. Addition of SMMU(MMU-401) device nodes mainly to assist other
developments and testing
2. Addition of CPU dmips/capacity information on all the Juno boards
* tag 'juno-dt-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: add cpu capacity-dmips-mhz information to R2 boards
arm64: dts: juno: add cpu capacity-dmips-mhz information to R1 boards
arm64: dts: juno: add cpu capacity-dmips-mhz information to R0 boards
arm64: dts: juno: Add SMMUs device nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Linus Torvalds [Sat, 29 Oct 2016 18:19:02 +0000 (11:19 -0700)]
Merge tag 'char-misc-4.9-rc3' of git://git./linux/kernel/git/gregkh/char-misc
Pull char/misc driver fixes from Greg KH:
"Here are a few small char/misc driver fixes for reported issues.
The "biggest" are two binder fixes for reported issues that have been
shipping in Android phones for a while now, the others are various
fixes for reported problems.
And there's a MAINTAINERS update for good measure.
All have been in linux-next with no reported issues"
* tag 'char-misc-4.9-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc:
MAINTAINERS: Add entry for genwqe driver
VMCI: Doorbell create and destroy fixes
GenWQE: Fix bad page access during abort of resource allocation
vme: vme_get_size potentially returning incorrect value on failure
extcon: qcom-spmi-misc: Sync the extcon state on interrupt
hv: do not lose pending heartbeat vmbus packets
mei: txe: don't clean an unprocessed interrupt cause.
ANDROID: binder: Clear binder and cookie when setting handle in flat binder struct
ANDROID: binder: Add strong ref checks
projects / GitHub / moto-9609 / android_kernel_motorola_exynos9610.git / log