Dan Carpenter [Mon, 20 Dec 2010 09:26:26 +0000 (12:26 +0300)]
drm/nouveau: sizeof() vs ARRAY_SIZE()
ARRAY_SIZE() was intended here, sizeof() is too large.
Signed-off-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alex Deucher [Fri, 3 Dec 2010 20:34:16 +0000 (15:34 -0500)]
drm/radeon/kms: properly print ontario chip id
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Alex Deucher [Wed, 15 Dec 2010 16:04:10 +0000 (11:04 -0500)]
drm/radeon/kms: fix vram start calculation on ontario (v2)
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 16 Dec 2010 04:49:02 +0000 (14:49 +1000)]
Merge remote branch 'nouveau/drm-nouveau-next' of ../drm-nouveau-next into drm-core-next
* 'nouveau/drm-nouveau-next' of ../drm-nouveau-next: (93 commits)
drm/nv50: fix a couple of vm init issues
drm/nv04-nv40: Fix up PCI(E) GART DMA object bus address calculation.
drm/nouveau: kick vram functions out into an "engine"
drm/nouveau: allow gpuobj vinst to be a virtual address when necessary
drm/nv50: tidy up PCIEGART implementation
drm/nv50: enable non-contig vram allocations where requested
drm/nv50: enable 4KiB pages for small vram allocations
drm/nv50: implement global channel address space on new VM code
drm/nv50: implement BAR1/BAR3 management on top of new VM code
drm/nv50: import new vm code
drm/nv50: implement custom vram mm
drm/nouveau: Avoid potential race between nouveau_fence_update() and context takedown.
drm/nouveau: fix use of drm_mm_node in semaphore object
drm/nouveau: wrap calls to ttm_bo_validate()
drm/nouveau: no need to zero dma objects, we fill them completely anyway
drm/nouveau: introduce a util function to wait on reg != val
drm/nouveau: implicitly insert non-DMA objects into RAMHT
drm/nouveau: make fifo.create_context() responsible for mapping control regs
drm/nouveau: Spin for a bit in nouveau_fence_wait() before yielding the CPU.
drm/nouveau: Use WC memory on the AGP GART.
...
Ben Skeggs [Thu, 16 Dec 2010 04:47:46 +0000 (14:47 +1000)]
drm/ttm: delay freeing of old node during move_memcpy until after iounmap
Drivers using their own implementation of io_mem_reserve/io_mem_free are
likely to store the tracking information for the map in mem.mm_node, so
it can't be freed while still mapped.
Signed-off-by: Ben Skeggs<bskeggs@redhat.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 23 Nov 2010 01:47:49 +0000 (11:47 +1000)]
drm/radeon: add initial tracepoint support.
this adds a bo create, and fence seq tracking tracepoints.
This is just an initial set to play around with, we should investigate
what others we need would be useful.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Francisco Jerez [Thu, 16 Dec 2010 00:30:35 +0000 (10:30 +1000)]
drm/nv50: fix a couple of vm init issues
Fixes overwriting the first page table entry when testing that the PRAMIN
BAR can be correctly read/written, and adds an additional bar flush after
poking the BAR3 control regs.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Wed, 8 Dec 2010 01:37:12 +0000 (02:37 +0100)]
drm/nv04-nv40: Fix up PCI(E) GART DMA object bus address calculation.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 6 Dec 2010 05:28:54 +0000 (15:28 +1000)]
drm/nouveau: kick vram functions out into an "engine"
NVC0 will be able to share some of nv50's paths this way. This also makes
it the card-specific vram code responsible for deciding if a given set
of tile_flags is valid, rather than duplicating the allowed types in
nv50_vram.c and nouveau_gem.c
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 22 Nov 2010 00:48:51 +0000 (10:48 +1000)]
drm/nouveau: allow gpuobj vinst to be a virtual address when necessary
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 16 Nov 2010 00:13:05 +0000 (10:13 +1000)]
drm/nv50: tidy up PCIEGART implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 12 Nov 2010 05:13:59 +0000 (15:13 +1000)]
drm/nv50: enable non-contig vram allocations where requested
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 12 Nov 2010 05:12:51 +0000 (15:12 +1000)]
drm/nv50: enable 4KiB pages for small vram allocations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 15 Nov 2010 01:54:21 +0000 (11:54 +1000)]
drm/nv50: implement global channel address space on new VM code
As of this commit, it's guaranteed that if an object is in VRAM that its
GPU virtual address will be constant.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 15 Nov 2010 01:53:16 +0000 (11:53 +1000)]
drm/nv50: implement BAR1/BAR3 management on top of new VM code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 27 Aug 2010 00:00:25 +0000 (10:00 +1000)]
drm/nv50: import new vm code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 25 Aug 2010 05:26:04 +0000 (15:26 +1000)]
drm/nv50: implement custom vram mm
This is required on nv50 as we need to be able to have more precise control
over physical VRAM allocations to avoid buffer corruption when using
buffers of mixed memory types.
This removes some nasty overallocation/alignment that we were previously
using to "control" this problem.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Wed, 8 Dec 2010 01:35:45 +0000 (02:35 +0100)]
drm/nouveau: Avoid potential race between nouveau_fence_update() and context takedown.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 2 Dec 2010 23:05:20 +0000 (09:05 +1000)]
drm/nouveau: fix use of drm_mm_node in semaphore object
At some point in the future, this bo won't necessarily be backed by
a drm_mm_node, so use the start/size fields of the ttm_mem_reg instead.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 21 Nov 2010 22:50:27 +0000 (08:50 +1000)]
drm/nouveau: wrap calls to ttm_bo_validate()
This will be used later to fixup bo.offset with a buffer's fixed GPU
virtual address.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 26 Nov 2010 00:32:22 +0000 (10:32 +1000)]
drm/nouveau: no need to zero dma objects, we fill them completely anyway
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Fri, 19 Nov 2010 04:32:56 +0000 (14:32 +1000)]
drm/nouveau: introduce a util function to wait on reg != val
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 23 Nov 2010 00:10:24 +0000 (10:10 +1000)]
drm/nouveau: implicitly insert non-DMA objects into RAMHT
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 22 Nov 2010 06:05:54 +0000 (16:05 +1000)]
drm/nouveau: make fifo.create_context() responsible for mapping control regs
The regs belong to PFIFO, they're different for pretty much the same
generations we need different PFIFO control for, and NVC0 is going
to be even more different than the rest.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Thu, 25 Nov 2010 15:37:17 +0000 (16:37 +0100)]
drm/nouveau: Spin for a bit in nouveau_fence_wait() before yielding the CPU.
Sleeping doesn't pay off for very short delays in comparison with the
minimum granularity of schedule_timeout().
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Sat, 20 Nov 2010 21:11:22 +0000 (22:11 +0100)]
drm/nouveau: Use WC memory on the AGP GART.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Thu, 18 Nov 2010 22:57:46 +0000 (23:57 +0100)]
drm/nouveau: Synchronize with the user channel before GPU object destruction.
There have been reports of PFIFO cache errors during context take down
(fdo bug 31637). They are caused by some GPU objects being taken out
while the channel is still potentially processing commands. Make sure
that all the previous rendering has landed before releasing a GPU
object.
Reported-by: Grzesiek Sójka <pld@pfu.pl>
Reported-by: Patrice Mandin <patmandin@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Acked-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Sat, 20 Nov 2010 13:43:51 +0000 (14:43 +0100)]
drm/nv04-nv10: Don't re-enable FIFO access multiple times after IRQ dispatch.
nvxx_graph_isr is already taking care of it. In some cases this
could've made you miss PGRAPH interrupts (e.g. when you were supposed
to get several IRQs of the same kind in a row).
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Sat, 20 Nov 2010 13:42:57 +0000 (14:42 +0100)]
drm/nv04-nv40: Give "gpuobj->cinst" the same meaning as on nv50.
No functional changes, just simplify some code paths a bit.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Fri, 19 Nov 2010 08:08:47 +0000 (18:08 +1000)]
drm/nouveau: fabricate DCB encoder table for iMac G4
In typical Apple fashion there's no standard information about what
encoders are present on this machine, this patch adds a quirk to
provide it.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 16 Nov 2010 01:50:09 +0000 (11:50 +1000)]
drm/nouveau: tidy up and extend dma object creation interfaces
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 16 Nov 2010 00:17:53 +0000 (10:17 +1000)]
drm/nouveau: remove some useless GETPARAMs
These have been unused since UMS support was ripped out, so lets remove
them completely.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 15 Nov 2010 06:28:19 +0000 (16:28 +1000)]
drm/nv84: fix minor issues in PCRYPT implementation
Fix running of destroy_context() when create_context() has never been
called for the channel, and fill in engine's tlb_flush() function pointer.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 15 Nov 2010 02:54:57 +0000 (12:54 +1000)]
drm/nouveau: remove dummy page use from PCI(E)GART, use PTE present instead
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 15 Nov 2010 02:52:23 +0000 (12:52 +1000)]
drm/nv50: fix 0x100c90 init for NVAF
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 15 Nov 2010 02:50:50 +0000 (12:50 +1000)]
drm/nv50: allocate page for unknown PFB object in nv50_fb.c
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 1 Nov 2010 01:45:02 +0000 (11:45 +1000)]
drm/nouveau: rework gpu-specific instmem interfaces
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 25 Oct 2010 05:23:59 +0000 (15:23 +1000)]
drm/nouveau: simplify gpuobj suspend/resume
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 11 Nov 2010 06:14:56 +0000 (16:14 +1000)]
drm/nv50: rework PGPIO IRQ handling and hotplug detection
Allows callers to install their own handlers for when a GPIO line
changes state (such as for hotplug detect).
This also fixes a bug where we weren't acknowledging the GPIO IRQ
until after the bottom half had run, causing a severe IRQ storm
in some cases.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 11 Nov 2010 03:59:05 +0000 (13:59 +1000)]
drm/nv04-nv40: unregister irq handler on destroy
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 3 Nov 2010 03:16:18 +0000 (13:16 +1000)]
drm/nouveau: tidy+move PGRAPH ISRs to their respective *_graph.c files
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 3 Nov 2010 00:56:05 +0000 (10:56 +1000)]
drm/nouveau: move PFIFO ISR into nv04_fifo.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 3 Nov 2010 01:36:09 +0000 (11:36 +1000)]
drm/nv04-nv40: register vblank isr
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 3 Nov 2010 00:45:48 +0000 (10:45 +1000)]
drm/nouveau: move bitfield/enum helpers to nouveau_util.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 3 Nov 2010 00:27:27 +0000 (10:27 +1000)]
drm/nv50: use register/unregister functionality for PDISPLAY ISR
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 3 Nov 2010 00:18:04 +0000 (10:18 +1000)]
drm/nv50: move GPIO ISR to nv50_gpio.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 3 Nov 2010 00:06:43 +0000 (10:06 +1000)]
drm/nv84: move PCRYPT ISR out of nouveau_irq.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 2 Nov 2010 23:57:28 +0000 (09:57 +1000)]
drm/nouveau: allow irq handlers to be installed by engine-specific code
Lets start to clean up this mess!
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 4 Nov 2010 23:40:00 +0000 (09:40 +1000)]
drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow it
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 4 Nov 2010 03:40:15 +0000 (13:40 +1000)]
drm/nv50: fix compute object class
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Thu, 28 Oct 2010 21:10:29 +0000 (23:10 +0200)]
drm/nouveau: Fix sleep while atomic in nouveau_bo_fence().
Reported-by: Pekka Paalanen <pq@iki.fi>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Sun, 24 Oct 2010 14:36:12 +0000 (16:36 +0200)]
drm/nv20: Add Z compression support.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Xavier Chantry <chantry.xavier@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Sun, 24 Oct 2010 14:14:41 +0000 (16:14 +0200)]
drm/nouveau: Rework tile region handling.
The point is to share more code between the PFB/PGRAPH tile region
hooks, and give the hardware specific functions a chance to allocate
per-region resources.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 25 Oct 2010 21:38:59 +0000 (23:38 +0200)]
drm/nouveau: Add a separate class for the kernel channel mutex.
nouveau_bo_move_m2mf() needs to lock the kernel channel, and it may be
called from the pushbuf IOCTL with an user channel already locked. Use
a separate subclass for the kernel channel mutex because this is
legitimate mutex nesting.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Sun, 24 Oct 2010 12:15:58 +0000 (14:15 +0200)]
drm/nv50: Keep track of the head a channel is vsync'ing to.
In a multihead setup vblank interrupts may end up enabled in both
heads. In that case we want to ignore the vblank interrupts coming
from the wrong CRTC to avoid tearing and unbalanced calls to
drm_vblank_get/put (fdo bug 31074).
Reported-by: Felix Leimbach <felix.leimbach@gmx.net>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 25 Oct 2010 01:30:34 +0000 (03:30 +0200)]
drm/nouveau: Call drm_vblank_pre/post_modeset() around mode setting.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Wed, 20 Oct 2010 21:35:40 +0000 (23:35 +0200)]
drm/nouveau: Implement the pageflip ioctl.
nv0x-nv4x should be mostly fine, nv50 doesn't work yet.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Thu, 21 Oct 2010 16:19:29 +0000 (18:19 +0200)]
drm/nouveau: Implement the vblank DRM hooks.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Fri, 22 Oct 2010 02:31:02 +0000 (04:31 +0200)]
drm/nv04: Make CRTC base changes effective in the next hsync.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Marcin Slusarz [Wed, 20 Oct 2010 19:50:24 +0000 (21:50 +0200)]
drm/nouveau: fix annoying nouveau_fence type issue
nouveau_fence_* functions are not type safe, which could lead to bugs.
Additionally every use of nouveau_fence_unref had to cast struct
nouveau_fence to void **.
Fix it by renaming old functions and creating static inline functions with
new prototypes. We still need old functions, because we pass function
pointers to ttm.
As we are wrapping functions, drop unused "void *arg" parameter where possible.
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 21 Oct 2010 22:44:09 +0000 (08:44 +1000)]
drm/nv50: regression fix, point NVAA/NVAC at correct PM functions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 21 Oct 2010 04:07:03 +0000 (14:07 +1000)]
drm/nouveau: add support for MSI
Only supported on NV50+ so far, and disabled by default currently. The
module parameter "msi=1" will enable it.
There's a kernel bug which will cause this to fail if the module (or the
NVIDIA binary driver) has ever been loaded before loading nouveau with
MSI enabled. As such, this is only safe to enable if you have nouveau
load on boot, and don't wish to ever reload it.
The workaround is to "echo 0 > /sys/bus/pci/devices/<device>/enable"
until the enable count reads 0. Then you should be able to load nouveau
with MSI enabled.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 21 Oct 2010 01:37:21 +0000 (11:37 +1000)]
drm/nv10: fix thinko and let nv17 do 3d again :)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 20 Oct 2010 05:35:28 +0000 (15:35 +1000)]
drm/nv50: fix evo instmem alignment
Not an issue right now, we're forced to 64k size/alignment by the BO
allocator anyway. This won't be the case soon.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 20 Oct 2010 04:23:29 +0000 (14:23 +1000)]
drm/nv50: improve evo error handler when more than just channel 0 active
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 19 Oct 2010 08:01:41 +0000 (18:01 +1000)]
drm/nv50: rework evo init to match nvidia more closely
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 19 Oct 2010 04:18:06 +0000 (14:18 +1000)]
drm/nv50: initial work to allow multiple evo channels
This doesn't work yet for unknown reasons.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 19 Oct 2010 03:05:51 +0000 (13:05 +1000)]
drm/nv50: move evo handling to nv50_evo.c
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 19 Oct 2010 01:14:17 +0000 (11:14 +1000)]
drm/nv50: clearer separation of the stages of evo init
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 20 Oct 2010 01:47:09 +0000 (11:47 +1000)]
drm/nv50: create graph and crypt contexts on demand
This really needs cleaning up somehow, and probably investigate what's
needed to do this on earlier generations. NVIDIA do something similar
there too.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 20 Oct 2010 01:46:38 +0000 (11:46 +1000)]
drm/nv50: remove excessive alignment of graph/crypt contexts
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 19 Oct 2010 10:06:01 +0000 (20:06 +1000)]
drm/nv84: add support for the PCRYPT engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 20 Oct 2010 00:39:35 +0000 (10:39 +1000)]
drm/nouveau: only expose the object classes that are supported by the chipset
We previously added all the available classes for the entire generation,
even though the objects wouldn't work on the hardware.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 19 Oct 2010 09:57:34 +0000 (19:57 +1000)]
drm/nouveau: use object class structs more extensively
The structs themselves, as well as the non-sw object creation function are
probably very misnamed now. That's a problem for later :)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 19 Oct 2010 09:47:06 +0000 (19:47 +1000)]
drm/nouveau: store engine type in gpuobj class structs
We will eventually want to address hw engines other than PGRAPH.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 14 Oct 2010 23:15:26 +0000 (09:15 +1000)]
drm/nouveau: pass gpuobj alignment request down into backing allocator
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 18 Oct 2010 14:15:15 +0000 (16:15 +0200)]
drm/nv40: Ignore sync-to-vblank active when waiting for idle.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 18 Oct 2010 01:57:19 +0000 (03:57 +0200)]
drm/nouveau: Take fence spinlock in nouveau_fence_channel_fini().
Without it there's a potential race with nouveau_fence_update().
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 18 Oct 2010 01:56:40 +0000 (03:56 +0200)]
drm/nouveau: Avoid race in the interchannel sync code.
It needs a "strong" channel reference because it actually writes to
the channel pushbuf, otherwise the corresponding FIFO context could
get kicked off in the middle of nouveau_fence_sync().
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 18 Oct 2010 01:56:14 +0000 (03:56 +0200)]
drm/nouveau: Make fences take a weak channel reference.
Fences didn't increment the channel reference count, and the fenced
channel could go away at any time. Fixes a potential race in
nouveau_fence_update().
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 18 Oct 2010 01:55:48 +0000 (03:55 +0200)]
drm/nouveau: Implement weak channel references.
nouveau_channel_ref() takes a "weak" channel reference that doesn't
prevent the hardware channel resources from being released, it just
keeps the channel data structure alive.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 18 Oct 2010 01:01:34 +0000 (03:01 +0200)]
drm/nouveau: Fix lock unbalance on card take down.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 18 Oct 2010 00:58:04 +0000 (02:58 +0200)]
drm/nouveau: Add unlocked variants of nouveau_channel_get/put.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 18 Oct 2010 01:54:33 +0000 (03:54 +0200)]
drm/nouveau: Fix race condition in channel refcount handling.
nouveau_channel_put() can be executed after the 'refcount == 0' check
in nouveau_channel_get() and before the channel reference count is
incremented. In that case CPU0 will take the context down while CPU1
thinks it owns the channel and 'refcount == 1'.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Mon, 18 Oct 2010 01:53:39 +0000 (03:53 +0200)]
drm/nouveau: Refactor context destruction to avoid a lock ordering issue.
The destroy_context() engine hooks call gpuobj management functions to
release the channel resources, these functions use HARDIRQ-unsafe locks
whereas destroy_context() is called with the HARDIRQ-safe
context_switch_lock held, that's a lock ordering violation.
Push the engine-specific channel destruction logic into destroy_context()
and let the hardware-specific code lock and unlock when it's actually
needed. Change the engine destruction order to avoid a race in the small
gap between pgraph and pfifo context uninitialization.
Reported-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Thu, 14 Oct 2010 19:55:23 +0000 (21:55 +0200)]
drm/nouveau: Use lazy fence waits when doing software interchannel sync.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Francisco Jerez [Thu, 14 Oct 2010 18:37:56 +0000 (20:37 +0200)]
drm/nouveau: Leave BO eviction synchronization for later.
The pushbuf ioctl syncs after validation, no need for this anymore.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 18 Oct 2010 02:34:04 +0000 (12:34 +1000)]
drm/nv50: remove some unnecessary PDISPLAY init
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 14 Oct 2010 04:55:23 +0000 (14:55 +1000)]
drm/nouveau: fallback to sw fbcon if we can't get mutex immediately
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Oct 2010 02:31:32 +0000 (12:31 +1000)]
drm/nouveau: hook up acpi power supply change tracking
Not used at all yet, but lets hook it up now anyway.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Oct 2010 00:11:00 +0000 (10:11 +1000)]
drm/nouveau: return error from nouveau_ramht_remove() if not found
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 11 Oct 2010 23:54:54 +0000 (09:54 +1000)]
drm/nouveau: use interruptible waits during pushbuf validation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 11 Oct 2010 22:01:59 +0000 (08:01 +1000)]
drm/nouveau: fix thinko in channel locking in semaphore path
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 11 Oct 2010 01:48:45 +0000 (11:48 +1000)]
drm/nouveau: remove cpu_writers lock
No other driver uses this, and userspace should be responsible for handling
locking between them if they share BOs.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 6 Oct 2010 06:20:17 +0000 (16:20 +1000)]
drm/nouveau: switch to unlocked ioctls
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 6 Oct 2010 06:16:59 +0000 (16:16 +1000)]
drm/nouveau: add more fine-grained locking to channel list + structures
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 5 Oct 2010 06:53:48 +0000 (16:53 +1000)]
drm/nouveau: add per-channel mutex, use to lock access to drm's channel
This fixes a race condition between fbcon acceleration and TTM buffer
moves. To reproduce:
- start X
- switch to vt and "while (true); do dmesg; done"
- switch to another vt and "sleep 2 && cat /path/to/debugfs/dri/0/evict_vram"
- switch back to vt running dmesg
We don't make use of this on any other channel yet, they're currently
protected by drm_global_mutex. This will change in the near future.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 5 Oct 2010 06:41:29 +0000 (16:41 +1000)]
drm/nouveau: disallow fbcon accel if running in interrupt context
A future commit will add locking to the DRM's channel, and there's numerous
problems that come up if we allow printk from an interrupt context to be
accelerated. It seems saner to just disallow it completely.
As a nice side-effect, all the "to accel or not to accel" logic gets moved
out of the chipset-specific code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Thu, 23 Sep 2010 01:03:01 +0000 (11:03 +1000)]
drm/nouveau: tidy fifo swmthd handler a little
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Dave Airlie [Fri, 3 Dec 2010 04:01:08 +0000 (14:01 +1000)]
Merge branch 'drm-radeon-fusion' of ../drm-radeon-next into drm-core-next
* 'drm-radeon-fusion' of ../drm-radeon-next:
drm/radeon/kms: add Ontario APU ucode loading support
drm/radeon/kms: add Ontario Fusion APU pci ids
drm/radeon/kms: enable MSIs on fusion APUs
drm/radeon/kms: add power table parsing support for Ontario fusion APUs
drm/radeon/kms: refactor atombios power state fetching
drm/radeon/kms: add bo blit support for Ontario fusion APUs
drm/radeon/kms: add thermal sensor support for fusion APUs
drm/radeon/kms: fill in GPU init for AMD Ontario Fusion APUs
drm/radeon/kms: add radeon_asic struct for AMD Ontario fusion APUs
drm/radeon/kms: evergreen.c updates for fusion
drm/radeon/kms: MC setup changes for fusion APUs
drm/radeon/kms: move r7xx/evergreen to its own vram_gtt setup function
drm/radeon/kms: add support for ss overrides on Fusion APUs
drm/radeon/kms: Add support for external encoders on fusion APUs
drm/radeon/kms: atom changes for DCE4.1 devices
drm/radeon/kms: add new family id for AMD Ontario APUs
drm/radeon/kms: upstream power table updates
drm/radeon/kms: upstream atombios.h updates
drm/radeon/kms: upstream ObjectID.h updates
drm/radeon/kms: setup mc chremap properly on r7xx/evergreen
projects / GitHub / exynos8895 / android_kernel_samsung_universal8895.git / log