GitHub/exynos8895/android_kernel_samsung_universal8895.git
11 years agodrm/ttm: Remove set_need_resched from the ttm fault handler
Thomas Hellstrom [Thu, 14 Nov 2013 18:49:05 +0000 (10:49 -0800)]
drm/ttm: Remove set_need_resched from the ttm fault handler

Addresses
"[BUG] completely bonkers use of set_need_resched + VM_FAULT_NOPAGE".

In the first occurence it was used to try to be nice while releasing the
mmap_sem and retrying the fault to work around a locking inversion.
The second occurence was never used.

There has been some discussion whether we should change the locking order to
mmap_sem -> bo_reserve. This patch doesn't address that issue, and leaves
that locking order undefined. The solution that we release the mmap_sem if
tryreserve fails and wait for the buffer to become unreserved is something
we want in any case, and follows how the core vm system waits for pages
to be come unlocked while releasing the mmap_sem.

The code also outlines what needs to be changed if we want to establish the
locking order as mmap_sem -> bo::reserve.

One slight issue that remains with this code is that the fault handler might
be prone to starvation if another thread countinously reserves the buffer.
IMO that usage pattern is highly unlikely.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
11 years agodrm/ttm: Don't move non-existing data
Thomas Hellstrom [Mon, 18 Nov 2013 07:30:38 +0000 (23:30 -0800)]
drm/ttm: Don't move non-existing data

If ttm_bo_move_memcpy was instructed to move a non-populated ttm to
io memory, it would first populate the ttm, then move the data and then
destroy the ttm. That's stupid. However, some drivers might have relied on
this to clear io memory from old stuff. So instead of a NOP, which would
be the most efficient, just clear the destination.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
11 years agodrm: check for !kdev in drm_unplug_minor()
David Herrmann [Wed, 13 Nov 2013 10:42:26 +0000 (11:42 +0100)]
drm: check for !kdev in drm_unplug_minor()

We moved minor deallocation to drm_dev_free() in:
  commit 8f6599da8e772fa8de54cdf98e9e03cbaf3946da
  Author: David Herrmann <dh.herrmann@gmail.com>
  Date:   Sun Oct 20 18:55:45 2013 +0200

      drm: delay minor destruction to drm_dev_free()

However, this causes a call to drm_unplug_minor(), which should just do
nothing as drm_dev_unregister() already called this.

But a separate patch caused kdev lifetime changes:
  commit 5bdebb183c9702a8c57a01dff09337be3de337a6
  Author: Dave Airlie <airlied@redhat.com>
  Date:   Fri Oct 11 14:07:25 2013 +1000

      drm/sysfs: sort out minor and connector device object lifetimes.

Thus making our dev_is_registered() call useles (and even segfault if it
is NULL). Replace it with a simple !kdev test and we're fine.

Reported-by: Huax Lu <huax.lu@intel.com>
Reported-by: Daniel Vetter <daniel@ffwll.ch>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71208
Tested-by: lu hua <huax.lu@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Dave Airlie <airlied@gmail.com>
11 years agoMerge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux...
Dave Airlie [Fri, 15 Nov 2013 02:24:40 +0000 (12:24 +1000)]
Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next

- Page flipping fixes, with support for syncing them to vblank (finally...).
- Misc other general fixes

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
  drm/nouveau: do not map evicted vram buffers in nouveau_bo_vma_add
  drm/nvc0-/gr: shift wrapping bug in nvc0_grctx_generate_r406800
  drm/nouveau/pwr: fix missing mutex unlock in a failure path
  drm/nv40/therm: fix slowing down fan when pstate undefined
  drm/nv11-: synchronise flips to vblank, unless async flip requested
  drm/nvc0-: remove nasty fifo swmthd hack for flip completion method
  drm/nv10-: we no longer need to create nvsw object on user channels
  drm/nouveau: always queue flips relative to kernel channel activity
  drm/nouveau: there is no need to reserve/fence the new fb when flipping
  drm/nouveau: when bailing out of a pushbuf ioctl, do not remove previous fence
  drm/nouveau: allow nouveau_fence_ref() to be a noop
  drm/nvc8/mc: msi rearm is via the nvc0 method

11 years agodrm/nouveau: do not map evicted vram buffers in nouveau_bo_vma_add
Maarten Lankhorst [Tue, 12 Nov 2013 12:34:12 +0000 (13:34 +0100)]
drm/nouveau: do not map evicted vram buffers in nouveau_bo_vma_add

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc0-/gr: shift wrapping bug in nvc0_grctx_generate_r406800
Dan Carpenter [Tue, 12 Nov 2013 12:34:11 +0000 (13:34 +0100)]
drm/nvc0-/gr: shift wrapping bug in nvc0_grctx_generate_r406800

We care about the upper 32 bits here so we have to use 1ULL instead of 1
to avoid a shift wrapping bug.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/pwr: fix missing mutex unlock in a failure path
Ben Skeggs [Wed, 13 Nov 2013 22:31:26 +0000 (08:31 +1000)]
drm/nouveau/pwr: fix missing mutex unlock in a failure path

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nv40/therm: fix slowing down fan when pstate undefined
Ben Skeggs [Wed, 13 Nov 2013 05:52:03 +0000 (15:52 +1000)]
drm/nv40/therm: fix slowing down fan when pstate undefined

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nv11-: synchronise flips to vblank, unless async flip requested
Ben Skeggs [Mon, 11 Nov 2013 03:59:40 +0000 (13:59 +1000)]
drm/nv11-: synchronise flips to vblank, unless async flip requested

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc0-: remove nasty fifo swmthd hack for flip completion method
Ben Skeggs [Wed, 13 Nov 2013 00:49:46 +0000 (10:49 +1000)]
drm/nvc0-: remove nasty fifo swmthd hack for flip completion method

Not required anymore as flips are always done on the kernel's channel,
which means we can use a proper software object class instead.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nv10-: we no longer need to create nvsw object on user channels
Ben Skeggs [Wed, 13 Nov 2013 00:58:51 +0000 (10:58 +1000)]
drm/nv10-: we no longer need to create nvsw object on user channels

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau: always queue flips relative to kernel channel activity
Ben Skeggs [Wed, 13 Nov 2013 00:17:17 +0000 (10:17 +1000)]
drm/nouveau: always queue flips relative to kernel channel activity

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau: there is no need to reserve/fence the new fb when flipping
Ben Skeggs [Wed, 13 Nov 2013 00:00:32 +0000 (10:00 +1000)]
drm/nouveau: there is no need to reserve/fence the new fb when flipping

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau: when bailing out of a pushbuf ioctl, do not remove previous fence
Ben Skeggs [Wed, 13 Nov 2013 05:18:32 +0000 (15:18 +1000)]
drm/nouveau: when bailing out of a pushbuf ioctl, do not remove previous fence

Cc: stable@vger.kernel.org
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau: allow nouveau_fence_ref() to be a noop
Ben Skeggs [Wed, 13 Nov 2013 00:23:46 +0000 (10:23 +1000)]
drm/nouveau: allow nouveau_fence_ref() to be a noop

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc8/mc: msi rearm is via the nvc0 method
Ben Skeggs [Mon, 11 Nov 2013 02:40:27 +0000 (12:40 +1000)]
drm/nvc8/mc: msi rearm is via the nvc0 method

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agoMerge branch 'drm-next-3.13' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Wed, 13 Nov 2013 23:53:15 +0000 (09:53 +1000)]
Merge branch 'drm-next-3.13' of git://people.freedesktop.org/~agd5f/linux into drm-next

One last patch I keep forgetting to include.  Fix for EDID quirk
handling.  Been on the list and reviewed for several months now,
I just keep forgetting about it.

* 'drm-next-3.13' of git://people.freedesktop.org/~agd5f/linux:
  drm/edid: compare actual vrefresh for all modes for quirks

11 years agoMerge tag 'drm-intel-fixes-2013-11-12' of git://people.freedesktop.org/~danvet/drm...
Dave Airlie [Wed, 13 Nov 2013 23:52:44 +0000 (09:52 +1000)]
Merge tag 'drm-intel-fixes-2013-11-12' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

Just one patch to fix compile fail for CONFIG_ACPI=n. Figured I better
send this out quickly to minimize the broken build span. Otherwise no
bugfixes (besides some bdw stuff) anywhere in sight.

* tag 'drm-intel-fixes-2013-11-12' of git://people.freedesktop.org/~danvet/drm-intel:
  drm/i915/opregion: fix build error on CONFIG_ACPI=n

11 years agoMerge branch 'ttm-next-3.13' of git://people.freedesktop.org/~thomash/linux into...
Dave Airlie [Wed, 13 Nov 2013 23:52:10 +0000 (09:52 +1000)]
Merge branch 'ttm-next-3.13' of git://people.freedesktop.org/~thomash/linux into drm-next

The page-prot bit fix.

* 'ttm-next-3.13' of git://people.freedesktop.org/~thomash/linux:
  drm/ttm: Fix vma page_prot bit manipulation

11 years agoMerge branch 'vmwgfx-next-3.13' of git://people.freedesktop.org/~thomash/linux into...
Dave Airlie [Wed, 13 Nov 2013 23:51:43 +0000 (09:51 +1000)]
Merge branch 'vmwgfx-next-3.13' of git://people.freedesktop.org/~thomash/linux into drm-next

A resource eviction fix, and a fix for compilation / sparse problems
from the previous pull.

* 'vmwgfx-next-3.13' of git://people.freedesktop.org/~thomash/linux:
  drm/vmwgfx: Fix a couple of compile / sparse warnings and errors
  drm/vmwgfx: Resource evict fixes

11 years agodrm/ttm: Fix vma page_prot bit manipulation
Thomas Hellstrom [Wed, 6 Nov 2013 17:32:59 +0000 (09:32 -0800)]
drm/ttm: Fix vma page_prot bit manipulation

Fix a long-standing TTM issue where we manipulated the vma page_prot
bits while mmap_sem was taken in read mode only. We now make a local
copy of the vma structure which we pass when we set the ptes.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
11 years agodrm/vmwgfx: Fix a couple of compile / sparse warnings and errors
Thomas Hellstrom [Tue, 12 Nov 2013 07:49:26 +0000 (23:49 -0800)]
drm/vmwgfx: Fix a couple of compile / sparse warnings and errors

Fixes
 *) an implicit function declaration on mips,
 *) a defined but not used label on !CONFIG_INTEL_IOMMU
 *) Hopefully a couple of sparse warnings where we implicitly typecast
    integer to __le32 and vice versa.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
11 years agodrm/vmwgfx: Resource evict fixes
Thomas Hellstrom [Tue, 12 Nov 2013 08:09:54 +0000 (00:09 -0800)]
drm/vmwgfx: Resource evict fixes

Fix an error message that was incorrectly blaming device resource id
shortage.

Also make sure we correctly catch resource eviction errors, that
could otherwise lead to evictable resources temporarily not being on the
LRU list.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Cc: stable@vger.kernel.org
11 years agodrm/edid: compare actual vrefresh for all modes for quirks
Alex Deucher [Thu, 15 Aug 2013 15:42:14 +0000 (11:42 -0400)]
drm/edid: compare actual vrefresh for all modes for quirks

The vrefresh field of the mode is 0 for most modes
fetched from the EDID (e.g., established timings).
When dealing with monitors that have a bogus preferred
mode, we may not always select the mode we want because
we compare the target refresh to the mode's vrefresh which
is 0 in a lot of cases.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
11 years agoMerge branch 'gma500-next' of git://github.com/patjak/drm-gma500 into drm-next
Dave Airlie [Sun, 10 Nov 2013 21:25:33 +0000 (07:25 +1000)]
Merge branch 'gma500-next' of git://github.com/patjak/drm-gma500 into drm-next

SDVO support for minnowboard

* 'gma500-next' of git://github.com/patjak/drm-gma500:
  drm/gma500/mrst: Add SDVO to output init
  drm/gma500/mrst: Don't blindly guess a mode for LVDS
  drm/gma500/mrst: Setup GMBUS for oaktrail/mrst
  drm/gma500/mrst: Replace WMs and chickenbits with values from EMGD
  drm/gma500/mrst: Add aux register writes to SDVO
  drm/gma500/mrst: Properly route oaktrail hdmi hooks
  drm/gma500/mrst: Add aux register writes when programming pipe
  drm/gma500/mrst: Add SDVO clock calculation
  drm/gma500: Add aux device support for gmbus
  drm/gma500: Add support for aux pci vdc device
  drm/gma500: Add chip specific sdvo masks
  drm/gma500: Add Minnowboard to the IS_MRST() macro

11 years agodrm: shmob_drm: Convert to clk_prepare/unprepare
Laurent Pinchart [Mon, 28 Oct 2013 22:49:22 +0000 (23:49 +0100)]
drm: shmob_drm: Convert to clk_prepare/unprepare

Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and
clk_disable_unprepare() to get ready for the migration to the common
clock framework.

Cc: David Airlie <airlied@linux.ie>
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agoMerge tag 'bdw-stage1-2013-11-08-v2' of git://people.freedesktop.org/~danvet/drm...
Dave Airlie [Sun, 10 Nov 2013 08:35:33 +0000 (18:35 +1000)]
Merge tag 'bdw-stage1-2013-11-08-v2' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

So here's the Broadwell pull request. From a kernel driver pov there's
two areas with big changes in Broadwell:
- Completely new enumerated interrupt bits. On the plus side it now looks
  fairly unform and sane.
- Completely new pagetable layout.

To ensure minimal impact on existing platforms we've refactored both the
irq and low-level gtt handling code a lot in anticipation of the bdw push.
So now bdw enabling in these areas just plugs in a bunch of vfuncs.

Otherwise it's all fairly harmless adjusting of switch cases and
if-ladders to shovel bdw into the right blocks. So minimized impact on
existing platforms. I've also merged the bdw-stage1 branch into our
-nightly integration branch for the past week to make sure we don't break
anything.

Note that there's still quite a flurry or patches floating around, but
I've figured I'll push this out. I plan to keep the bdw fixes separate
from my usual -fixes stream so that you can reject them easily in case it
still looks like too much churn. Also, bdw is for now hidden behind the
preliminary hw enabling module option. So there's no real pressure to get
follow-up patches all into 3.13.

* tag 'bdw-stage1-2013-11-08-v2' of git://people.freedesktop.org/~danvet/drm-intel: (75 commits)
  drm/i915: Mask the vblank interrupt on bdw by default
  drm/i915: Wire up cpu fifo underrun reporting support for bdw
  drm/i915: Optimize gen8_enable|disable_vblank functions
  drm/i915: Wire up pipe CRC support for bdw
  drm/i915: Wire up PCH interrupts for bdw
  drm/i915: Wire up port A aux channel
  drm/i915: Fix up the bdw pipe interrupt enable lists
  drm/i915: Optimize pipe irq handling on bdw
  drm/i915/bdw: Take render error interrupt out of the mask
  drm/i915/bdw: Add BDW PCH check first
  drm/i915: Use hsw_crt_get_config on BDW
  drm/i915/bdw: Change dp aux timeout to 600us on DDIA
  drm/i915/bdw: Enable trickle feed on Broadwell
  drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints
  drm/i915/bdw: conservative SBE VUE cache mode
  drm/i915/bdw: Limit SDE poly depth FIFO to 2
  drm/i915/bdw: Sampler power bypass disable
  ddrm/i915/bdw: Disable centroid pixel perf optimization
  drm/i915/bdw: BWGTLB clock gate disable
  drm/i915/bdw: Implement edp PSR workarounds
  ...

11 years agoMerge branch 'drm-next-3.13' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Sun, 10 Nov 2013 08:33:17 +0000 (18:33 +1000)]
Merge branch 'drm-next-3.13' of git://people.freedesktop.org/~agd5f/linux into drm-next

A few more patches for 3.13.  The big one here is Hawaii support.
I wanted to get that out sooner, but was sick earlier this week.  That
said, it's mostly self contained, so it shouldn't impact other asics.
The rest are just bug fixes and a merge fix.

* 'drm-next-3.13' of git://people.freedesktop.org/~agd5f/linux: (23 commits)
  Revert "drm/radeon/audio: don't set speaker allocation on DCE4+"
  drm/radeon/audio: improve ACR calculation
  drm/radeon/audio: correct ACR table
  drm/radeon: fix mismerge of drm-next with 3.12
  drm/radeon: add pci ids for hawaii
  drm/radeon: fill in radeon_asic_init for hawaii
  drm/radeon: modesetting updates for hawaii
  drm/radeon: atombios.h updates for hawaii
  drm/radeon: update cik_get_csb_buffer for hawaii
  drm/radeon: add hawaii dpm support
  drm/radeon/cik: add hawaii UVD support
  drm/radeon: update firmware loading for hawaii
  drm/radeon: update rb setup for hawaii
  drm/radeon: add golden register settings for hawaii
  drm/radeon: update cik_tiling_mode_table_init() for hawaii
  drm/radeon: minor updates to cik.c for hawaii
  drm/radeon: update cik_gpu_init() for hawaii
  drm/radeon: add Hawaii chip family
  drm/radeon: fix-up some float to fixed conversion thinkos
  drm/radeon: use HDP_MEM_COHERENCY_FLUSH_CNTL for sdma as well
  ...

11 years agoMerge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm...
Dave Airlie [Sun, 10 Nov 2013 08:27:31 +0000 (18:27 +1000)]
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next

prime support, inactive rework, render nodes
* 'msm-next' of git://people.freedesktop.org/~robclark/linux:
  drm/msm/mdp4: page_flip cleanups/fixes
  drm/msm: EBUSY status handling in msm_gem_fault()
  drm/msm: rework inactive-work
  drm/msm: add plane support
  drm/msm: resync generated headers
  drm/msm: support render nodes
  drm/msm: prime support

11 years agodrm/nouveau: fix 32-bit build
Dave Airlie [Sat, 9 Nov 2013 23:24:24 +0000 (09:24 +1000)]
drm/nouveau: fix 32-bit build

This uses the proper div macro.

Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm/i915/opregion: fix build error on CONFIG_ACPI=n
Jani Nikula [Fri, 8 Nov 2013 08:10:31 +0000 (10:10 +0200)]
drm/i915/opregion: fix build error on CONFIG_ACPI=n

Fix CONFIG_ACPI=n build fail

  CC      drivers/gpu/drm/i915/intel_opregion.o
drivers/gpu/drm/i915/intel_opregion.c: In function ‘intel_opregion_setup’:
drivers/gpu/drm/i915/intel_opregion.c:879:2: error: ‘asle_work’ undeclared (first use in this function)
drivers/gpu/drm/i915/intel_opregion.c:879:2: note: each undeclared identifier is reported only once for each function it appears in
make[4]: *** [drivers/gpu/drm/i915/intel_opregion.o] Error 1

introduced in
commit 91a60f20712179e56b7a6c3d332a5f6f9a54aa11
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Thu Oct 31 18:55:48 2013 +0200

    drm/i915: move opregion asle request handling to a work queue

Reported-by: Jim Davis <jim.epost@gmail.com>
Reference: http://lkml.kernel.org/r/CA+r1ZhjcFpr5KKVX0pLCOP8cAyZoiYO=UyqYMJtNSV-Kt_p7xQ@mail.gmail.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agoRevert "drm/radeon/audio: don't set speaker allocation on DCE4+"
Alex Deucher [Fri, 8 Nov 2013 18:07:51 +0000 (13:07 -0500)]
Revert "drm/radeon/audio: don't set speaker allocation on DCE4+"

This reverts commit 555b1b651acf44bf27ebbb04235d38a8fd2d58dc.

Let's try this again for 3.13.  It's required for proper
interaction with alsa.  Was disabled previously in 3.12
to be on the safe side since it caused problems on older
asics.

11 years agodrm/radeon/audio: improve ACR calculation
Pierre Ossman [Wed, 6 Nov 2013 19:09:08 +0000 (20:09 +0100)]
drm/radeon/audio: improve ACR calculation

In order to have any realistic chance of calculating proper
ACR values, we need to be able to calculate both N and CTS,
not just CTS. We still aim for the ideal N as specified in
the HDMI spec though.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69675

Signed-off-by: Pierre Ossman <pierre@ossman.eu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/audio: correct ACR table
Pierre Ossman [Wed, 6 Nov 2013 19:00:32 +0000 (20:00 +0100)]
drm/radeon/audio: correct ACR table

The values were taken from the HDMI spec, but they assumed
exact x/1.001 clocks. Since we round the clocks, we also need
to calculate different N and CTS values.

Note that the N for 25.2/1.001 MHz at 44.1 kHz audio is out of
spec. Hopefully this mode is rarely used and/or HDMI sinks
tolerate overly large values of N.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69675

Signed-off-by: Pierre Ossman <pierre@ossman.eu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: fix mismerge of drm-next with 3.12
Alex Deucher [Fri, 8 Nov 2013 18:03:47 +0000 (13:03 -0500)]
drm/radeon: fix mismerge of drm-next with 3.12

Audio is enabled by default now.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add pci ids for hawaii
Alex Deucher [Fri, 9 Aug 2013 21:28:54 +0000 (17:28 -0400)]
drm/radeon: add pci ids for hawaii

This adds the pci ids for hawaii.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: fill in radeon_asic_init for hawaii
Alex Deucher [Mon, 19 Aug 2013 22:02:26 +0000 (18:02 -0400)]
drm/radeon: fill in radeon_asic_init for hawaii

Fill in gpu details for hawaii.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: modesetting updates for hawaii
Alex Deucher [Mon, 19 Aug 2013 14:22:26 +0000 (10:22 -0400)]
drm/radeon: modesetting updates for hawaii

Uses the same code as bonaire.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: atombios.h updates for hawaii
Alex Deucher [Mon, 19 Aug 2013 23:45:47 +0000 (19:45 -0400)]
drm/radeon: atombios.h updates for hawaii

This updates atombios.h with the latest changes
required for hawaii.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update cik_get_csb_buffer for hawaii
Alex Deucher [Wed, 14 Aug 2013 02:59:41 +0000 (22:59 -0400)]
drm/radeon: update cik_get_csb_buffer for hawaii

Set the PA_SC_RASTER_CONFIG[_1] registers for hawaii.
The rest is the same as the other asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add hawaii dpm support
Alex Deucher [Fri, 9 Aug 2013 22:27:47 +0000 (18:27 -0400)]
drm/radeon: add hawaii dpm support

This updates the CI dpm (dynamic power management)
support for hawaii.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/cik: add hawaii UVD support
Alex Deucher [Tue, 24 Sep 2013 15:08:17 +0000 (11:08 -0400)]
drm/radeon/cik: add hawaii UVD support

Has same version of UVD as other CIK parts.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update firmware loading for hawaii
Alex Deucher [Thu, 8 Aug 2013 20:06:35 +0000 (16:06 -0400)]
drm/radeon: update firmware loading for hawaii

This just updates the firmware loading functions
to look for the appropriate firmware files for
hawaii.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update rb setup for hawaii
Alex Deucher [Thu, 8 Aug 2013 00:14:08 +0000 (20:14 -0400)]
drm/radeon: update rb setup for hawaii

The formula needs to be adjusted since there are 4 RBs
per SH rather than 2 as on previous asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add golden register settings for hawaii
Alex Deucher [Wed, 7 Aug 2013 23:20:14 +0000 (19:20 -0400)]
drm/radeon: add golden register settings for hawaii

The golden register settings are optimal settings for
certain registers from the hardware team.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update cik_tiling_mode_table_init() for hawaii
Alex Deucher [Tue, 6 Aug 2013 20:58:53 +0000 (16:58 -0400)]
drm/radeon: update cik_tiling_mode_table_init() for hawaii

Hawaii uses a different tiling configuration.  Add support
for it.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: minor updates to cik.c for hawaii
Alex Deucher [Mon, 30 Sep 2013 22:03:06 +0000 (18:03 -0400)]
drm/radeon: minor updates to cik.c for hawaii

Skip programming a register that was removed and
adjust the mask of the VM client status.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: update cik_gpu_init() for hawaii
Alex Deucher [Tue, 6 Aug 2013 19:42:49 +0000 (15:42 -0400)]
drm/radeon: update cik_gpu_init() for hawaii

This adds the hawaii asic specific configuration
details.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: add Hawaii chip family
Alex Deucher [Tue, 6 Aug 2013 19:13:36 +0000 (15:13 -0400)]
drm/radeon: add Hawaii chip family

Hawaii is a new CI-based dGPU.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: fix-up some float to fixed conversion thinkos
Alex Deucher [Thu, 7 Nov 2013 23:16:23 +0000 (18:16 -0500)]
drm/radeon: fix-up some float to fixed conversion thinkos

Spotted by Brad Smith when porting to OpenBSD.

Noticed-by: Brad Smith <brad@comstyle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: use HDP_MEM_COHERENCY_FLUSH_CNTL for sdma as well
Alex Deucher [Thu, 7 Nov 2013 18:43:37 +0000 (13:43 -0500)]
drm/radeon: use HDP_MEM_COHERENCY_FLUSH_CNTL for sdma as well

The new HDP flush method doesn't seem to work reliably on
sDMA either, so use the old method here too.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: add crtc_disable function for legacy crtc
Ilija Hadzic [Sun, 3 Nov 2013 03:00:20 +0000 (23:00 -0400)]
drm/radeon/kms: add crtc_disable function for legacy crtc

To plug the VRAM memory leak (see previous patch for
details) we must unpin the frame buffer when disabling the
CRTC. This warrants the addition of disable function for legacy
CRTC, which puts the CRTC in DPMS-OFF state and unpins the
frame buffer if there is one associated with the CRTC.

Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/kms: unpin fb in atombios crtc disable
Ilija Hadzic [Sun, 3 Nov 2013 03:00:19 +0000 (23:00 -0400)]
drm/radeon/kms: unpin fb in atombios crtc disable

When drm_helper_disable_unused_functions calls disable
function of the CRTC, it also sets the crtc->fb pointer
to NULL. This can later (when the mode on that CRTC is setup
again from user space) cause ***_do_set_base functions to
"think" that there is no old buffer and skip the unpinning
code. Consequently, the buffer that has been NULL-ified in
drm_helper_disable_unused_functions will never be unpinned
causing a leak in VRAM.

This patch plugs the leak by unpinning the frame buffer
in crtc_disable function.

Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/audio: fix missing multichannel PCM SAD in some cases
Anssi Hannula [Mon, 28 Oct 2013 23:19:16 +0000 (01:19 +0200)]
drm/radeon/audio: fix missing multichannel PCM SAD in some cases

The current code writing SADs to the audio registers seems to assume
that there is at most a single SAD per audio format.

However, that is not the case. Especially for PCM it is somewhat common
for sinks to have two SADs, one for 8-channel and one for 2-channel
audio, which may have different supported sample rates (i.e. the sink
supports stereo audio at higher sample rates than multichannel audio).

Because of this, only the 2-channel SAD may be used if it appears before
the 8-channel SAD. Unless other SADs require otherwise, this may cause
the ALSA HDA driver to allow stereo playback only.

Fix the code to pick the PCM SAD with the highest number of channels,
while merging the rate masks of PCM SADs with lower amount of channels
into the additional stereo rate mask byte.

Technically there are even more cases to handle (multiple non-PCM SADs
of the same type, more than two PCM SADs with varying channel counts,
etc), but those have not actually been encountered in the field and
handling them would be non-trivial.

Example affected EDID from Onkyo TX-SR674 specifying 192kHz stereo
support and 96kHz 8-channel support (and other 8-channel compressed
formats):
00ffffffffffff003dcb010000000001
ffff0103800000780a0dc9a057479827
12484c00000001010101010101010101
010101010101011d8018711c1620582c
2500c48e2100009e011d007251d01e20
6e285500c48e2100001e000000fc0054
582d53523637342020202020000000fd
00313d0f2e08000a202020202020019b
02032f724f8504030f0e07069413121e
1d1615012f097f070f1f071707503707
503f07c0834f000066030c00ffff808c
0ad08a20e02d10103e9600c48e210000
18011d80d0721c1620102c2580c48e21
00009e011d00bc52d01e20b8285540c4
8e2100001e8c0ad090204031200c4055
00c48e210000180000000000000000a8

Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Tested-by: Andre Heider <a.heider@gmail.com>
Cc: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/i915: Mask the vblank interrupt on bdw by default
Daniel Vetter [Thu, 7 Nov 2013 14:31:52 +0000 (15:31 +0100)]
drm/i915: Mask the vblank interrupt on bdw by default

Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Wire up cpu fifo underrun reporting support for bdw
Daniel Vetter [Thu, 7 Nov 2013 10:05:46 +0000 (11:05 +0100)]
drm/i915: Wire up cpu fifo underrun reporting support for bdw

HW engineers have listened and given us again a real interrupt with
masking and status regs. Yay!

For consistency with other platforms call the #define FIFO_UNDERRUN.
Eventually we also might need to have some enable/disable functions
for bdw display interrupts, but for now open-coding seems to be good
enough.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Optimize gen8_enable|disable_vblank functions
Daniel Vetter [Thu, 7 Nov 2013 10:05:45 +0000 (11:05 +0100)]
drm/i915: Optimize gen8_enable|disable_vblank functions

Let's cache the IMR value like on other platforms. This is needed to
implement the underrun reporting since then we'll have two places that
change the same register at runtime.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Wire up pipe CRC support for bdw
Daniel Vetter [Thu, 7 Nov 2013 10:05:44 +0000 (11:05 +0100)]
drm/i915: Wire up pipe CRC support for bdw

The layout of the CRC registers is the same as on hsw, only the
interrupt handling has changed a bit. So trivial to wire up, yay!

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Wire up PCH interrupts for bdw
Daniel Vetter [Thu, 7 Nov 2013 10:05:43 +0000 (11:05 +0100)]
drm/i915: Wire up PCH interrupts for bdw

Gives us hotplug, gmbus, dp aux and south errors (underrun
reporting!).

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Wire up port A aux channel
Daniel Vetter [Thu, 7 Nov 2013 13:49:55 +0000 (14:49 +0100)]
drm/i915: Wire up port A aux channel

Useful for dp aux to work better. Also stop enabling the port A
hotplug event - eDP panels are expected to fire that interupt and
we're not really ready to deal with them. This is consistent with how
we handle port A on ilk-hsw.

The more important bit is that we must delay the enabling of hotplug
interrupts until all the encoders are fully set up. But we need irq
support earlier than that, hence hotplug interrupts can only be
enabled in the ->hpd_irq_setup callback.

v2: Drop the _HOTPLUG, it isn't (Ville).

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Fix up the bdw pipe interrupt enable lists
Daniel Vetter [Thu, 7 Nov 2013 13:49:24 +0000 (14:49 +0100)]
drm/i915: Fix up the bdw pipe interrupt enable lists

- Pipe underrun can't just be enabled, we need some support code like
  on ilk-hsw to make this happen. So drop it for now.
- CRC error is a special mode of the CRC hardware that we don't use,
  so again drop it. Real CRC support for bdw will be added later.
- All the other error bits are about faults, so rename the #define and
  adjust the output.

v2: Use pipe_name as pointed out by Ville. Ville's comment was on a
previous patch, but it was easier to squash in here.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Optimize pipe irq handling on bdw
Daniel Vetter [Thu, 7 Nov 2013 10:05:40 +0000 (11:05 +0100)]
drm/i915: Optimize pipe irq handling on bdw

We have a per-pipe bit in the master irq control register, so use it.
This allows us to drop the masks for aggregate interrupt bits and be a
bit more explicit in the code. It also removes one indentation level.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Take render error interrupt out of the mask
Daniel Vetter [Fri, 8 Nov 2013 05:40:39 +0000 (21:40 -0800)]
drm/i915/bdw: Take render error interrupt out of the mask

The handling of the error interrupts isn't wired up at all. And it
hasn't been ever since ilk happened, so don't bother.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Add BDW PCH check first
Ben Widawsky [Fri, 8 Nov 2013 05:40:41 +0000 (21:40 -0800)]
drm/i915/bdw: Add BDW PCH check first

Early platforms use the same PCH as HSW, and to avoid triggering the
!ULT, and !HSW warnings, simply put it first in the search.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Use hsw_crt_get_config on BDW
Ville Syrjälä [Thu, 7 Nov 2013 17:25:59 +0000 (19:25 +0200)]
drm/i915: Use hsw_crt_get_config on BDW

Broadwell should also use hsw_crt_get_config(). Just move the
function pointer assignment to the if HAS_DDI block we already
have there.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Change dp aux timeout to 600us on DDIA
Ben Widawsky [Tue, 5 Nov 2013 07:11:32 +0000 (23:11 -0800)]
drm/i915/bdw: Change dp aux timeout to 600us on DDIA

Cc: Art Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Enable trickle feed on Broadwell
Ville Syrjälä [Sun, 3 Nov 2013 11:47:27 +0000 (13:47 +0200)]
drm/i915/bdw: Enable trickle feed on Broadwell

Like on HSW, trickle feed should always be enabled on BDW.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints
Ben Widawsky [Sun, 3 Nov 2013 04:08:00 +0000 (21:08 -0700)]
drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints

Implement WaSingleSubspanDispatchOnAALinesAndPoints

BDW-A workaround.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: conservative SBE VUE cache mode
Ben Widawsky [Sun, 3 Nov 2013 04:07:59 +0000 (21:07 -0700)]
drm/i915/bdw: conservative SBE VUE cache mode

Hold vertex data in cache until last reference

BDW-A workaround

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Limit SDE poly depth FIFO to 2
Ben Widawsky [Sun, 3 Nov 2013 04:07:58 +0000 (21:07 -0700)]
drm/i915/bdw: Limit SDE poly depth FIFO to 2

BDW-A workaround

BDW Bug #1899155

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Sampler power bypass disable
Ben Widawsky [Sun, 3 Nov 2013 04:07:57 +0000 (21:07 -0700)]
drm/i915/bdw: Sampler power bypass disable

BDW-A workaround.

BDW Bug #1899812

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agoddrm/i915/bdw: Disable centroid pixel perf optimization
Ben Widawsky [Tue, 5 Nov 2013 06:52:39 +0000 (22:52 -0800)]
ddrm/i915/bdw: Disable centroid pixel perf optimization

BDW-A workaround

BDW Bug #1899532

v2: WARN on when not using preliminary HW support

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuosugeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: BWGTLB clock gate disable
Ben Widawsky [Sun, 3 Nov 2013 04:07:55 +0000 (21:07 -0700)]
drm/i915/bdw: BWGTLB clock gate disable

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuosugeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Implement edp PSR workarounds
Ben Widawsky [Sun, 3 Nov 2013 04:07:54 +0000 (21:07 -0700)]
drm/i915/bdw: Implement edp PSR workarounds

This implements a workaround for PSR dealing with some vblank issue.

WaPsrDPAMaskVBlankInSRD && WaPsrDPRSUnmaskVBlankInSRD

v2: forgot to git add bogus whitespace fix

v3: Update with workaround names.
Use for_each_pipe() and CHICKEN_PIPESL_1(pipe) macro (Ville)

Cc: Art Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuosugeek.org>
[danvet: Kill redundant IS_BDW check and remove the copious amount of
uneeded lines added.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Disable semaphores
Ben Widawsky [Tue, 5 Nov 2013 03:45:44 +0000 (19:45 -0800)]
drm/i915/bdw: Disable semaphores

We've done insufficient testing on them thus far, so keep them disabled
until we do test.

v2: Use WARN when not enabling preliminary HW support as this should
only be disabled for that case.

v3: Rip out the now useless (and really noisy) DRM_INFO output.

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuosugeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Create a separate BDW rps enable
Ben Widawsky [Sun, 3 Nov 2013 04:07:52 +0000 (21:07 -0700)]
drm/i915/bdw: Create a separate BDW rps enable

This is mostly what we have for HSW with the exceptions of:
no writes:
  GEN6_RC1_WAKE_RATE_LIMIT
  GEN6_RC6pp_WAKE_RATE_LIMIT
  GEN6_RC1e_THRESHOLD
  GEN6_RC6p_THRESHOLD
  GEN6_RC6pp_THRESHOLD

GEN6_RP_DOWN_TIMEOUT - use 1s instead of 1.28s

Don't try to overclock, or program ring/IA frequency tables since we
don't quite have sufficient docs yet.

NOTE: These values do not reflect the changes made recently by Chris.
Since we have no evidence yet what the proper way to tweak for this
platform is, I think it is good to go, and can be optimized by Chris, or
whomever, later.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Drop spurious hunk and drop TODO - having per-platform rps
register frobbing code is in my opinion preferred, now that all the
infrastructure functions are extracted.]
Reviewed-by: Jesse Barnes <jbarnes@virtuosugeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Broadwell has a max port clock of 300Mhz on HDMI
Damien Lespiau [Sun, 3 Nov 2013 04:07:51 +0000 (21:07 -0700)]
drm/i915/bdw: Broadwell has a max port clock of 300Mhz on HDMI

Just like HSW.

This means we can scan out a mode with a 300Mhz pixel clock with a depth
of 24 bits, but only a 200Mhz one with a 36bits depth.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Don't wait for c0 threads on forcewake
Ben Widawsky [Sun, 3 Nov 2013 04:07:50 +0000 (21:07 -0700)]
drm/i915/bdw: Don't wait for c0 threads on forcewake

It's no longer a required workaround on BDW.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Move compile fix from a later patch to this one.]
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Use HSW formula for ring freq scaling
Ben Widawsky [Sun, 3 Nov 2013 04:07:49 +0000 (21:07 -0700)]
drm/i915/bdw: Use HSW formula for ring freq scaling

The current formula we use for HSW is not what is in current docs.
However, changing to the HSW formula on my HSW does not improve power
usage, and decreases performance by about 5% in limited xonotic testing.

For gen8, until we know otherwise, or run experiments, let's use
the HSW formula - which should be the same used in the Windows driver
(and thus help make an apples-applies comparison) on gen8.

v2: Use >= 8 instead of > 7 to be consistent with all other gen
checks.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Support eDP PSR
Ben Widawsky [Tue, 5 Nov 2013 06:45:05 +0000 (22:45 -0800)]
drm/i915/bdw: Support eDP PSR

Broadwell PSR support is a superset of Haswell. With this simple
register base calculation, everything that worked on HSW for eDP PSR
should work on BDW.

Note that Broadwell provides additional PSR support. This is not
addressed at this time.

v2: Make the HAS_PSR include BDW

v3: Use the correct offset (I had incorrectly used one from my faulty
brain) (Art!)

v4: It helps if you git add

v5: Be explicit about not setting min link entry time for BDW. This
should be no functional change over v4 (Jani)

Reviewed-by: Art Runyan <arthur.j.runyan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Use The GT mailbox for IPS enable/disable
Ben Widawsky [Sun, 3 Nov 2013 04:07:47 +0000 (21:07 -0700)]
drm/i915/bdw: Use The GT mailbox for IPS enable/disable

v2: Squash in fixup from Ben to synchronize the GT mailbox commands.

CC: Art Runyan <arthur.j.runyan@intel.com>
Reviewed-by: Art Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Add Broadwell display FIFO limits
Ville Syrjälä [Sun, 3 Nov 2013 04:07:46 +0000 (21:07 -0700)]
drm/i915/bdw: Add Broadwell display FIFO limits

Broadwell has bigger display FIFOs than Haswell. Otherwise the
two are very similar.

v2: Fix FBC WM_LP shift for BDW

v3: Rebase on top of the big Haswell wm rework.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v2)
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: check DPD on port D when setting the DDI buffers
Paulo Zanoni [Sun, 3 Nov 2013 04:07:45 +0000 (21:07 -0700)]
drm/i915/bdw: check DPD on port D when setting the DDI buffers

Use the eDP values on platforms where port D is eDP. This doesn't
affect Haswell since it uses the same DDI buffer values for eDP and
DP.

Reviewed-by: Art Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: BDW also has only 2 FDI lanes
Paulo Zanoni [Sun, 3 Nov 2013 04:07:44 +0000 (21:07 -0700)]
drm/i915/bdw: BDW also has only 2 FDI lanes

So treat it like Haswell.

Reviewed-by: Art Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: add support for BDW DP voltage swings and pre-emphasis
Paulo Zanoni [Sun, 3 Nov 2013 04:07:43 +0000 (21:07 -0700)]
drm/i915/bdw: add support for BDW DP voltage swings and pre-emphasis

They're not the same as the Haswell ones.

Reviewed-by: Art Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Todd Previte <tprevite@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: add BDW DDI buf translations for eDP
Paulo Zanoni [Sun, 3 Nov 2013 04:07:42 +0000 (21:07 -0700)]
drm/i915/bdw: add BDW DDI buf translations for eDP

Broadwell has different DDI buffer translations for eDP and DP, so add
support for the missing eDP and keep Haswell the same.

A future patch addresses the suggestion from Art to check for eDP on
port D and use the eDP values there, too.

v2: Make checkpatch happy.

Reviewed-by: Art Runyan <arthur.j.runyan@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Add BDW DDI buffer translation values
Art Runyan [Sun, 3 Nov 2013 04:07:41 +0000 (21:07 -0700)]
drm/i915/bdw: Add BDW DDI buffer translation values

Many of the DDI buffer translation values have changed for BDW.
Add new translation tables and selection between HSW and BDW.

v2: s/BUG/WARN/ to avoid breaking future GENs.

v3: Rebase on top of the hdmi translation table changes.

v4: Fix up the multiline comment while at it.

Signed-off-by: Art Runyan <arthur.j.runyan@intel.com> (v2)
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Implement WaSwitchSolVfFArbitrationPriority
Ben Widawsky [Sun, 3 Nov 2013 04:07:40 +0000 (21:07 -0700)]
drm/i915/bdw: Implement WaSwitchSolVfFArbitrationPriority

GEN8 also needs this workaround.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Add a generic comment that we need to recheck all these w/a.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Use pipe CSC on Broadwell
Ville Syrjälä [Sun, 3 Nov 2013 04:07:39 +0000 (21:07 -0700)]
drm/i915/bdw: Use pipe CSC on Broadwell

Route cursor and sprite data through the pipe CSC unit on BDW.
Primary plane data is already sent through the pipe CSC.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: get the correct LCPLL frequency on Broadwell
Paulo Zanoni [Sun, 3 Nov 2013 04:07:36 +0000 (21:07 -0700)]
drm/i915/bdw: get the correct LCPLL frequency on Broadwell

v2: Rebased onto Paulo's MHz->kHz change.

v3: Rebased on top of the Haswell pc8+ adjustements.

v4: Use the exact 337.5MHz clock, should have been done as part of v2.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Broadwell has PIPEMISC
Paulo Zanoni [Sun, 3 Nov 2013 04:07:38 +0000 (21:07 -0700)]
drm/i915/bdw: Broadwell has PIPEMISC

And it inherits some bits from the previous TRANS_CONF (aka PIPE_CONF
on previous gens).

v2: Rebase on to of the pipe config bpp handling rework.

v3: Rebased on top of the pipe_config->dither refactoring.

v4: Drop the read-modify-write cycle for PIPEMISC, similarly to how we
now also build up PIPECONF completely ourselves - keeping around
random stuff set by the BIOS just isn't a good idea. I've checked BDW
BSpec and we already set all relevant bits.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: on Broadwell, the panel fitter is on the pipe
Paulo Zanoni [Sun, 3 Nov 2013 04:07:37 +0000 (21:07 -0700)]
drm/i915/bdw: on Broadwell, the panel fitter is on the pipe

So you can use the panel fitter while the power well is disabled and
you also don't need to set the "pipe" bit.

v2: Rebased on top of Jesse's pfit refactor, which moved pfit state
into the pipe_config.

v3: Rebase on top of the latest Haswell/panel fitter rework, which
neatly resolves a FIXME we have in this patch here:

v4: Rebase on top of the new power domain framework.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: pretend we have LPT LP on Broadwell
Paulo Zanoni [Sun, 3 Nov 2013 04:07:35 +0000 (21:07 -0700)]
drm/i915/bdw: pretend we have LPT LP on Broadwell

The platforms we currently have all have LPT LP on them. As such, we
have no way to identify the new WPT PCH that will ship with Broadwell.

NOTE: For all purposes relevant to the driver that this point, LPT and
WPT are equivalent. Therefore there should be no need to actually change
this for some time.

v2: Don't assign dev_priv->num_pch_pll any more.

v3: Rebase on top of the PCH detection changes for virtualized
enviroments.

v4: Wrote commit message

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v3)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Broadwell also has the "power down well"
Paulo Zanoni [Sun, 3 Nov 2013 04:07:34 +0000 (21:07 -0700)]
drm/i915/bdw: Broadwell also has the "power down well"

Just like Haswell, but with the small twist that the panel fitter for pipe A is
now also in the always-on power well.

v2: Use the new HAS_POWER_WELL macro.

v3: Rebase on top of intel_using_power_well patches.

v4: This time actually update the PFIT check correctly so that the
pipe A pfit is in the always-on domain.

v5: Rebase on top of the VGA power domain addition.

v6: Rebase on top of the new power domain infrastructure. Also pimp the commit
message a bit while at it.

v7: Use IS_BROADWELL instead of IS_GEN8 (Ville).

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: add Broadwell sprite/plane/cursor checks
Paulo Zanoni [Sun, 3 Nov 2013 04:07:33 +0000 (21:07 -0700)]
drm/i915/bdw: add Broadwell sprite/plane/cursor checks

Just make Broadwell follow the same code paths as Haswell here,
instead of running code for the even-older platforms.

v2: Shuffle around Ben's vma prep work.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Broadwell has 3 pipes
Damien Lespiau [Sun, 3 Nov 2013 04:07:32 +0000 (21:07 -0700)]
drm/i915/bdw: Broadwell has 3 pipes

v2: Rebase (Paulo Zanoni)

v3: Rebase on top of num_pipes having moved to intel_device_info.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v2)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: add IS_BROADWELL macro
Paulo Zanoni [Sun, 3 Nov 2013 04:07:31 +0000 (21:07 -0700)]
drm/i915/bdw: add IS_BROADWELL macro

For now it's just equivalent to IS_GEN8, but in the future we might
want to change that (e.g., on Gen 7 we have IS_VALLEYVIEW,
IS_IVYBRIDGE and IS_HASWELL).

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: BSD init for gen8 also
Ben Widawsky [Sun, 3 Nov 2013 04:07:28 +0000 (21:07 -0700)]
drm/i915/bdw: BSD init for gen8 also

This was an oversight and should have been in a previous series
somewhere.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: ppgtt info in debugfs
Ben Widawsky [Sun, 3 Nov 2013 04:07:30 +0000 (21:07 -0700)]
drm/i915/bdw: ppgtt info in debugfs

It's not so much that the information is terribly useful, but rather
that the gen6/7 information is completely useless.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915/bdw: Don't muck with gtt_size on Gen8 when PPGTT setup fails
Ville Syrjälä [Sun, 3 Nov 2013 04:07:29 +0000 (21:07 -0700)]
drm/i915/bdw: Don't muck with gtt_size on Gen8 when PPGTT setup fails

v2: Resolve rebase conflicts and switch to gen < 8 color for GenX
checking.

v3: Rebase on top of the address space refactoring.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>