Alex Deucher [Fri, 29 Apr 2016 15:20:32 +0000 (11:20 -0400)]
drm/amdgpu/fiji: set UVD CG state when enabling UVD DPM (v2)
Need to call the IP cg callbacks.
v2: fix gate logic
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 28 Apr 2016 21:19:41 +0000 (17:19 -0400)]
drm/powerplay: add missing clockgating callback for tonga
Without this clockgating is not enabled.
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Mon, 25 Apr 2016 19:31:34 +0000 (21:31 +0200)]
drm/amdgpu: Constify some tables
Some more tables with constant data were added with the polaris support
v2: missed a few
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Sun, 24 Apr 2016 11:21:27 +0000 (13:21 +0200)]
drm/amd/powerplay: Delete dead struct declaration
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Moritz Kühner [Sun, 17 Apr 2016 14:15:24 +0000 (16:15 +0200)]
drm/amd/powerplay/hwmgr: don't add invalid voltage
if atomctrl_get_voltage_evv_on_sclk returns non zero (fail) in the expansion
of the PP_ASSERT_WITH_CODE macro the continue will actually do nothing
(The macro uses a do ... while(0) as scope, which eats the continue).
Based on the code I don't think this was the intent.
Unfortunately fixing this requires rewriting the control flow and
removing the macros.
v2: added signed of by
fixed error message print
v3: agd: drop DRM_ERROR
Signed-off-by: Moritz Kühner <kuehner.moritz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Moritz Kühner [Sun, 17 Apr 2016 14:15:23 +0000 (16:15 +0200)]
drm/amd/powerplay/hwmgr: prevent VDDC from exceeding 2V
If the tonga gpu is controlled by SVID2 tonga_get_evv_voltage will only print
an error if the voltage exceeds 2V although a comment clearly states that it
needs be less than 2V.
v2: added signed of by
Signed-off-by: Moritz Kühner <kuehner.moritz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Thu, 21 Apr 2016 23:03:49 +0000 (00:03 +0100)]
MAINTAINERS: Remove unneded wildcard for the Radeon/AMDGPU drivers
There are no other files but the UAPI headers, thus we can drop the
wildcard.
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Fri, 22 Apr 2016 00:06:23 +0000 (10:06 +1000)]
drm/radeon: add cayman VM support for append packet.
This adds support for SET_APPEND_CNT packet3 to the VM paths.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 15 Apr 2016 17:08:44 +0000 (13:08 -0400)]
drm/amd/amdgpu: Add debugfs entries for smc/didt/pcie
This adds 3 new files that can be read/written to access
indirect GPU registers.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 28 Mar 2016 12:21:52 +0000 (08:21 -0400)]
drm/amd/amdgpu: Drop print_status callbacks.
First patch in series to move to user mode
debug tools we're removing the print_status callbacks.
These functions were unused at the moment anyway.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 15 Apr 2016 21:23:14 +0000 (17:23 -0400)]
drm/amd/powerplay: revise reading/writing pptable on Polaris10
Change the way we store pptables in the driver to better
facilitate eventual runtime updates for debugging.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 15 Apr 2016 21:14:53 +0000 (17:14 -0400)]
drm/amd/powerplay: revise reading/writing pptable on Tonga
Change the way we store pptables in the driver to better
facilitate eventual runtime updates for debugging.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 15 Apr 2016 20:33:20 +0000 (16:33 -0400)]
drm/amd/powerplay: revise reading/writing pptable on Fiji
Change the way we store pptables in the driver to better
facilitate eventual runtime updates for debugging.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 15 Apr 2016 19:02:54 +0000 (15:02 -0400)]
drm/amd/powerplay: revise caching the soft pptable and add it's size
This fixes a bug in the pptable access interface that could lead to
a crash. Check the pointer before using it.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 12 Apr 2016 18:57:23 +0000 (14:57 -0400)]
drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2)
Allows you to force multiple levels rather than just one via the new
sysfs interrface.
v2: squash in:
drm/amd/powerplay: ensure clock level set by user is valid.
From Rex.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 11 Apr 2016 18:26:12 +0000 (14:26 -0400)]
drm/amd/powerplay: fix fan speed percent setting error on Polaris10
The logic was reversed.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 4 Apr 2016 15:52:56 +0000 (11:52 -0400)]
drm/amd/powerplay: fix bug dpm can't work when resume back on Polaris
Need to initialize the values to 0 since they get or'ed with additional
values. If the initialization is missing, on resume, they may end up
with a combination of stale data and new data.
Fixes dpm on resume.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 1 Apr 2016 11:56:07 +0000 (19:56 +0800)]
drm/amd/powerplay: fix some initialize error on polaris10.
1. don't enable SclkThrottleLowNotification, it's not supported.
2. Set missing mclk_dpm0_activity_target
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 30 Mar 2016 03:35:50 +0000 (11:35 +0800)]
drm/amd/powerplay: return 0 when interface not implement on some asic.
Don't fail if certain optional interface callbacks are missing.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Mykola Lysenko [Wed, 30 Mar 2016 09:50:11 +0000 (05:50 -0400)]
drm/amdgpu: fix memory leak in CGS (FW info)
Previously requested FW pointer should not be
overwritten on a subsequent call.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 25 Mar 2016 05:08:46 +0000 (13:08 +0800)]
drm/amd/powerplay: update vce power gate state for baffin.
Forgot to save the current gate state so we don't know
what the current state is if we try and gate/ungate the
block.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Thu, 24 Mar 2016 20:44:18 +0000 (16:44 -0400)]
drm/amd/powerplay: Fix a bug for enabling ACDC gpio interrupt
Only enable it if it's supported rather than unconitionally.
Signed-off-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 23 Mar 2016 07:12:48 +0000 (15:12 +0800)]
drm/amd/powerplay: fix issue that get wrong reference clock value.
use wrong parameter to compute the reference clock.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 23 Mar 2016 07:04:23 +0000 (15:04 +0800)]
drm/amd/powerplay: parameter updates according to SMC.
Update to latest changes for SMC team.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 23 Mar 2016 10:47:29 +0000 (18:47 +0800)]
drm/amd/powerplay: add fan control mode interface for baffin
Add interface for manual fan control.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 23 Mar 2016 06:50:22 +0000 (14:50 +0800)]
drm/amd/powerplay: enable some feature for baffin/ellesmere. (v2)
Sync up with internal updates.
v2: squash in:
drm/amd/powerplay: set revert flag for enable thermal protect.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 23 Mar 2016 06:48:03 +0000 (14:48 +0800)]
drm/amdgpu: code style refine.
Whitespace fix.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 25 Mar 2016 16:23:49 +0000 (12:23 -0400)]
drm/amd/powerplay: fix copy paste error in error message
Noticed-by: Vasily Anonimov <vasily.anonimov@googlemail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Slava Grigorev [Wed, 23 Mar 2016 03:34:29 +0000 (23:34 -0400)]
drm/amd/amdgpu: fix 64-bit division
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 18 Mar 2016 11:07:55 +0000 (19:07 +0800)]
drm/amdgpu: add polaris10/11 smc fw declaration
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 22 Mar 2016 06:21:18 +0000 (14:21 +0800)]
drm/amd/powerplay: Disable Spread Spectrum on DPM 0 on baffin as SPLL Shut Down feature is enabled.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Flora Cui <Flora.Cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 15 Mar 2016 11:30:00 +0000 (19:30 +0800)]
drm/amd/powerplay: enable set lowest mclk clock on baffin.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 15 Mar 2016 09:42:47 +0000 (17:42 +0800)]
drm/amd/powrplay: fix issue that get wrong enable flag.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 15 Mar 2016 06:39:12 +0000 (14:39 +0800)]
drm/amd/powerplay: fix mclk in high clock for baffin
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 1 Mar 2016 09:01:30 +0000 (17:01 +0800)]
drm/amd/powerplay: print gpu loading and uvd/vce power gate enablement for polaris10/11.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Mon, 14 Mar 2016 22:33:29 +0000 (18:33 -0400)]
drm/amdgpu: change ELM/BAF to Polaris10/Polaris11
Adjust to preferred code names.
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Thu, 29 Oct 2015 09:32:11 +0000 (17:32 +0800)]
drm/amdgpu: add ELM/BAF pci ids
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Mon, 7 Dec 2015 10:33:10 +0000 (18:33 +0800)]
drm/amdgpu: update the core VI support for ELM/BAF
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 26 Feb 2016 02:45:25 +0000 (10:45 +0800)]
drm/amdgpu: ungate SMC clockgating first before suspend
46c34bcb6a15dd85329a39a5e72c62108626acdc put all block’s clockgating
support in SMC. The sequence in suspend routine should be adjusted
accordingly, otherwise it causes asic hang.
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 16 Feb 2016 22:33:14 +0000 (17:33 -0500)]
drm/amd/amdgpu: add power gating init for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Thu, 14 Apr 2016 21:26:07 +0000 (17:26 -0400)]
drm/amd/amdgpu: add power gating initialization support for GFX8.0
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Mon, 15 Feb 2016 07:45:59 +0000 (15:45 +0800)]
drm/amd/powerplay: add default clockgating handling
This is to workaround regression introduced in
46c34bcb6a15dd85329a39a5e72c62108626acdc. It should be reverted with a
final fix.
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 12 Feb 2016 15:58:51 +0000 (10:58 -0500)]
drm/amd/amdgpu: add medium grain powergating support for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 11 Mar 2016 19:53:39 +0000 (14:53 -0500)]
drm/amd/powerplay: add GFX per cu powergating for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Thu, 11 Feb 2016 20:54:45 +0000 (15:54 -0500)]
drm/amd/powerplay: add GFX per cu powergating support through SMU/powerplay
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Thu, 17 Mar 2016 22:29:08 +0000 (18:29 -0400)]
drm/amd/amdgpu: add query GFX cu info in CGS query system info
Needed for per CU powergating.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Thu, 11 Feb 2016 16:09:09 +0000 (11:09 -0500)]
drm/amd/powerplay: add GFX/SYS clockgating support for ELM/BAF
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 9 Feb 2016 21:26:00 +0000 (16:26 -0500)]
drm/amd/powerplay: add all blocks clockgating support through SMU/powerplay
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
yanyang1 [Sat, 6 Feb 2016 05:28:47 +0000 (13:28 +0800)]
drm/amd/powerplay: update baffin & ellesmere smc_sk firmware.
sync the code form catalyst CL:#
1230866.
Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
yanyang1 [Fri, 5 Feb 2016 09:43:17 +0000 (17:43 +0800)]
drm/amd/powerplay: Add smc_sk firmware to baffin & ellesmere.
update relational h files.
Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
yanyang1 [Fri, 5 Feb 2016 09:39:37 +0000 (17:39 +0800)]
drm/amd/amdgpu: Add smc_sk firmware in baffin & ellesmere.
add CGS_UCODE_ID_SMU_SK.
Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Fri, 5 Feb 2016 19:47:06 +0000 (14:47 -0500)]
drm/amd/powerplay: add UVD&VCE DPM and powergating support for elm/baf
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Tue, 2 Feb 2016 21:09:24 +0000 (16:09 -0500)]
drm/amd/powerplay: add thermal control for elm/baf
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 11 Mar 2016 19:43:13 +0000 (14:43 -0500)]
drm/amd/powerplay: enable powerplay for baffin.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 11 Mar 2016 19:39:31 +0000 (14:39 -0500)]
drm/amd/powerplay: init hwmgr for ELM/BAF
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 19 Nov 2015 10:23:32 +0000 (18:23 +0800)]
drm/amd/powerplay: enable dpm for baffin.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
rezhu [Tue, 10 Nov 2015 02:26:39 +0000 (10:26 +0800)]
drm/amd/powerplay: add smu support for ellesmere/baffin
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
rezhu [Mon, 16 Nov 2015 02:33:31 +0000 (10:33 +0800)]
drm/amd/powerplay: add header files for ellesmere smu manager.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sonny Jiang [Fri, 11 Mar 2016 19:33:40 +0000 (14:33 -0500)]
drm/amdgpu: add VCE support to ELM/BAF
Ellesmere and Baffin are VCE 3.4
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Sonny Jiang [Thu, 5 Nov 2015 20:17:18 +0000 (15:17 -0500)]
drm/amdgpu: add UVD support for ELM/BAF
Ellesmere and Baffin are UVD 6.3
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Thu, 29 Oct 2015 09:26:56 +0000 (17:26 +0800)]
drm/amdgpu: add GFX support for ELM/BAF
V2: use gfx_8_0_*.h instead of gfx_8_1_*.h
v3: agd: integrate support for gfx info table
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Thu, 5 Nov 2015 04:42:59 +0000 (12:42 +0800)]
drm/amdgpu: add mmRLC_CGCG_CGLS_CTRL_3D & mmRLC_CGCG_RAMP_CTRL_3D
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 14 Mar 2016 20:51:24 +0000 (16:51 -0400)]
drm/amdgpu: add an interface to get gfx constants from atombios
Fetch the values from atom rather than hardcoding them in the
driver.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Thu, 29 Oct 2015 09:26:22 +0000 (17:26 +0800)]
drm/amdgpu: add SDMA support for ELM/BAF
V2: seperate baffin & ellesmere settings instead of using fiji ones.
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Thu, 29 Oct 2015 09:25:48 +0000 (17:25 +0800)]
drm/amdgpu: add DCE golden setting for ELM/BAF
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Fri, 11 Mar 2016 19:28:53 +0000 (14:28 -0500)]
drm/amdgpu: add GMC support for ELM/BAF
V2: add golden_settings_baffin_a11 instead of reuse golden_settings_fiji_a10
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 15 Oct 2015 21:14:31 +0000 (17:14 -0400)]
drm/amdgpu/dce11: add dce clock setting for ELM/BAF
Setup the disp clock and dp reference clock. This is
now a separate command table on elm/baf compared to
older asics.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Thu, 15 Oct 2015 20:35:33 +0000 (16:35 -0400)]
drm/amdgpu/dce11: update pll programming for ELM/BAF
SetPixelClock table handles pll divider calculation and
spread spectrum setup, so no need to use calculate the
dividers and call the ss enable cmd table.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Thu, 15 Oct 2015 19:21:09 +0000 (15:21 -0400)]
drm/amdgpu: add ELM/BAF support to dce_v11_0_pick_pll (v2)
New PLL scheme on ELM/BAF.
v2: squash in pll fix. Plls are part of the phys.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Thu, 15 Oct 2015 19:08:30 +0000 (15:08 -0400)]
drm/amdgpu/atom: add support for new UNIPHYTransmitterContol cmd table
New uniphy transmitter setup table for elm/baf.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Thu, 15 Oct 2015 18:49:53 +0000 (14:49 -0400)]
drm/amdgpu/atom: add support for new DIGxEncoderControl cmd table
New digital encoder setup table for elm/baf.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Thu, 15 Oct 2015 06:05:31 +0000 (02:05 -0400)]
drm/amdgpu/atom: add support for new SetPixelClock table
New version of the SetPixelClock table for elm/baf. The
new table calculates the pll dividers and handles spread
spectrum calculations and setup.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Thu, 15 Oct 2015 05:24:49 +0000 (01:24 -0400)]
drm/amdgpu/atom: add SetDCEClock helper
New cmd table for ELM/BAF for setting the dispclock or
dprefclock.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Thu, 15 Oct 2015 04:43:41 +0000 (00:43 -0400)]
drm/amdgpu: update atombios.h (v2)
update to internal version 893
v2: Pull in gfx_info changes from 898
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Mon, 18 Apr 2016 22:25:34 +0000 (18:25 -0400)]
drm/amdgpu: bump the afmt limit for CZ, ST, Polaris
Fixes array overflow on these chips.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Alex Deucher [Mon, 18 Apr 2016 22:09:57 +0000 (18:09 -0400)]
drm/amdgpu: use defines for CRTCs and AMFT blocks
Prerequiste for the next patch which ups the limits.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Alex Deucher [Wed, 14 Oct 2015 21:17:15 +0000 (17:17 -0400)]
drm/amdgpu: add ELM/BAF DCE11 configs (v2)
Add support for the display configuration on elm/baf.
v2: add missing Stoney case
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Wed, 14 Oct 2015 21:14:16 +0000 (17:14 -0400)]
drm/amdgpu: add ELM/BAF asic types
New asic types for ellesmere and baffin.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Fri, 11 Mar 2016 19:46:46 +0000 (14:46 -0500)]
drm/amd: add DCE 11.2 register headers
Add register headers for DCE (Display and Composition Engine)
11.2.
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Bas Nieuwenhuizen [Fri, 15 Apr 2016 00:47:49 +0000 (02:47 +0200)]
drm/radeon: Allow setting shader registers using DMA/COPY packet3 on SI.
Mesa uses a COPY_DATA packet to copy the grid size for indirect dispatches
into COMPUTE_USER_DATA_*.
Setting those registers with a SET_SH_REG packet is allowed, not allowing
them with other packets seems like an oversight.
v2: Clarify commit message.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 15 Apr 2016 15:19:17 +0000 (17:19 +0200)]
drm/amdgpu: remove sorting of CS BOs
Not needed any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 15 Apr 2016 15:19:16 +0000 (17:19 +0200)]
drm/amdgpu: group BOs by log2 of the size on the LRU v2
This allows us to have small BOs on the LRU before big ones.
v2: fix of by one and list corruption bug
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Wed, 13 Apr 2016 23:49:16 +0000 (09:49 +1000)]
drm/amdgpu: drop apply quirks for now.
This isn't being used so drop it.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 14 Apr 2016 07:53:55 +0000 (15:53 +0800)]
drm/amdgpu: fix error checking when reuse vmid on same ring
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 14 Apr 2016 05:42:32 +0000 (13:42 +0800)]
drm/amdgpu: only update last_flush when vmid doesn't have other new owner
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 14 Apr 2016 02:27:28 +0000 (10:27 +0800)]
drm/amdgpu: double fence slot
we introduced vmid fence, so one hw submission could produce two fences.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:40:49 +0000 (00:40 -0400)]
drm/amdgpu: enable sdma clockgating on ST
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:39:54 +0000 (00:39 -0400)]
drm/amdgpu: enable sdma clockgating on CZ
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:19:39 +0000 (00:19 -0400)]
drm/amdgpu/sdma: rename fiji cg functions
They care common for all sdma 3.0 parts
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 13 Apr 2016 16:41:50 +0000 (12:41 -0400)]
drm/amdgpu: enable gmc clockgating for ST
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:26:46 +0000 (00:26 -0400)]
drm/amdgpu: enable gmc clockgating for CZ
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 05:37:44 +0000 (01:37 -0400)]
drm/amdgpu/vi: rename fiji cg functions
They can be used for other VI parts.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 03:17:15 +0000 (23:17 -0400)]
drm/amdgpu: enable gfx clockgating for ST (v2)
v2: just enable MGCG for now since CGCG causes hangs
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 03:01:48 +0000 (23:01 -0400)]
drm/amdgpu: enable gfx clockgating for CZ
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 02:57:39 +0000 (22:57 -0400)]
drm/amdgpu/gfx: rework fiji cg functions so they can be shared
They can be shared with other asics with minor modifications.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 19:45:13 +0000 (15:45 -0400)]
drm/amdgpu: add a new set of rlc function pointers
Different asics tend to have different ways to interact
with the RLC. This just covers enter/exit of safe mode
for updating CG and PG state, but could be extended to
cover other RLC operations in the future if necessary.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 03:16:00 +0000 (23:16 -0400)]
drm/amdgpu/gfx: adjust gfx_v8_0_send_serdes_cmd for ST
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 05:12:20 +0000 (01:12 -0400)]
drm/amdgpu/gfx8: rename send_serdes_cmd
So it can be shared with CZ/ST.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 05:01:18 +0000 (01:01 -0400)]
drm/amdgpu/gmc: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:52:58 +0000 (00:52 -0400)]
drm/amdgpu/common: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / GitHub / LineageOS / android_kernel_motorola_exynos9610.git / log