GitHub/LineageOS/android_kernel_motorola_exynos9610.git
7 years agopinctrl: mvebu: remove unused variable
Arnd Bergmann [Mon, 23 Jan 2017 12:17:25 +0000 (13:17 +0100)]
pinctrl: mvebu: remove unused variable

A cleanup caused a harmless warning:

drivers/pinctrl/mvebu/pinctrl-kirkwood.c: In function 'kirkwood_pinctrl_probe':
drivers/pinctrl/mvebu/pinctrl-kirkwood.c:460:19: error: unused variable 'res' [-Werror=unused-variable]

The obvious fix is to remove the declaration of the now unused
variable.

Fixes: ad9ec4ecee68 ("pinctrl: mvebu: switch drivers to generic simple mmio")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agogpio: aspeed: Add banks Y, Z, AA, AB and AC
Andrew Jeffery [Tue, 24 Jan 2017 06:16:46 +0000 (16:46 +1030)]
gpio: aspeed: Add banks Y, Z, AA, AB and AC

This is less straight-forward than one would hope, as some banks only
have 4 pins rather than 8, others are output only, yet more (W and
X, already supported) are input-only, and in the case of the g4 SoC bank
AC doesn't exist.

Add some structs to describe the varying properties of different banks
and integrate mechanisms to deny requests for unsupported
configurations.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]
Andrew Jeffery [Mon, 23 Jan 2017 05:27:17 +0000 (15:57 +1030)]
pinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]

Incorrect video output configuration bits were being tested on pins in
GPIO banks AA and AB for the ROM{8,16} mux functions. The ROM{8,16}
functions are the highest priority for the relevant pins and also the
default function, so we require the relevant video output configuration
be disabled to mux GPIO functionality. As the wrong bits were being
tested a GPIO export would succeed but leave the pin in an unresponsive
state (i.e. value updates were ignored).

This misbehaviour was discovered as part of extending the GPIO
controller's support to cover banks Y, Z, AA, AB and AC (AC in the case
of the g5 SoC).

Fixes: 6d329f14a75f ("pinctrl: aspeed-g4: Add mux configuration for all pins")
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agogpio: aspeed: Make bank names strings
Joel Stanley [Mon, 23 Jan 2017 05:26:06 +0000 (15:56 +1030)]
gpio: aspeed: Make bank names strings

The Aspeed SoCs have more GPIOs than can be represented with A-Z. The
documentation uses two letter names such as AA and AB, so make the names
a three-character array in the bank struct to accommodate this.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: qcom: Use raw spinlock variants
Julia Cartwright [Fri, 20 Jan 2017 16:13:47 +0000 (10:13 -0600)]
pinctrl: qcom: Use raw spinlock variants

The MSM pinctrl driver currently implements an irq_chip for handling
GPIO interrupts; due to how irq_chip handling is done, it's necessary
for the irq_chip methods to be invoked from hardirq context, even on a
a real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw
spinlock.

On real-time kernels, this fixes an OOPs which looks like the following,
as reported by Brian Wrenn:

    kernel BUG at kernel/locking/rtmutex.c:1014!
    Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
    Modules linked in: spidev_irq(O) smsc75xx wcn36xx [last unloaded: spidev]
    CPU: 0 PID: 1163 Comm: irq/144-mmc0 Tainted: G        W  O    4.4.9-linaro-lt-qcom #1
    PC is at rt_spin_lock_slowlock+0x80/0x2d8
    LR is at rt_spin_lock_slowlock+0x68/0x2d8
    [..]
  Call trace:
    rt_spin_lock_slowlock
    rt_spin_lock
    msm_gpio_irq_ack
    handle_edge_irq
    generic_handle_irq
    msm_gpio_irq_handler
    generic_handle_irq
    __handle_domain_irq
    gic_handle_irq

Reported-by: Brian Wrenn <dcbrianw@gmail.com>
Tested-by: Brian Wrenn <dcbrianw@gmail.com>
Signed-off-by: Julia Cartwright <julia@ni.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: samsung: Fix samsung_pinctrl_create_functions return value
Marek Szyprowski [Thu, 19 Jan 2017 13:48:46 +0000 (14:48 +0100)]
pinctrl: samsung: Fix samsung_pinctrl_create_functions return value

Return proper error code in case of memory allocation failure.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: samsung: Remove messages for failed memory allocation
Marek Szyprowski [Thu, 19 Jan 2017 13:48:45 +0000 (14:48 +0100)]
pinctrl: samsung: Remove messages for failed memory allocation

Memory subsystem already prints message about failed memory
allocation, there is no need to do it in the drivers.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: samsung: Document Exynos3250 SoC support
Marek Szyprowski [Thu, 19 Jan 2017 13:48:44 +0000 (14:48 +0100)]
pinctrl: samsung: Document Exynos3250 SoC support

Add missing compatible id for Exynos3250 SoC to device tree docs.
Exynos pin control driver supports it since commit d97f5b9804bfcdc1
("pinctrl: exynos: Add driver data for Exynos3250").

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl/amd: Drop pinctrl_unregister for devm_ registered device
Wei Yongjun [Tue, 17 Jan 2017 15:55:32 +0000 (15:55 +0000)]
pinctrl/amd: Drop pinctrl_unregister for devm_ registered device

It's not necessary to unregister pin controller device registered
with devm_pinctrl_register() and using pinctrl_unregister() leads
to a double free.

Fixes: 3bfd44306c65 ("pinctrl: amd: Add support for additional GPIO")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: meson: Add HDMI HPD/DDC pins functions
Neil Armstrong [Tue, 17 Jan 2017 12:05:37 +0000 (13:05 +0100)]
pinctrl: meson: Add HDMI HPD/DDC pins functions

Add pinctrl functions for HDMI HPD pin and DDC pins on Amlogic Meson
GXL and GXBB SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: samsung: Remove support for Exynos4415 (SoC not supported anymore)
Krzysztof Kozlowski [Sat, 14 Jan 2017 12:36:41 +0000 (14:36 +0200)]
pinctrl: samsung: Remove support for Exynos4415 (SoC not supported anymore)

Support for Exynos4415 is going away because there are no internal nor
external users.

Since commit 46dcf0ff0de3 ("ARM: dts: exynos: Remove exynos4415.dtsi"),
the platform cannot be instantiated so remove also the drivers.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: ti-iodelay: remove redundant pin < 0 check on unsigned int
Colin Ian King [Fri, 13 Jan 2017 13:20:39 +0000 (13:20 +0000)]
pinctrl: ti-iodelay: remove redundant pin < 0 check on unsigned int

pin is an unsigned int and therefore can never be < 0 so
this check is redundant. Remove the check and the associated
dev_err error message.

Fixes CoverityScan CID#1396438 ("Unsigned compared against 0")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: mvebu: add simple regmap based pinctrl implementation
Russell King [Fri, 13 Jan 2017 11:03:35 +0000 (11:03 +0000)]
pinctrl: mvebu: add simple regmap based pinctrl implementation

Add a simple regmap based pinctrl implementation for mvebu, for syscon
based regmap drivers.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: mvebu: switch drivers to generic simple mmio
Russell King [Fri, 13 Jan 2017 11:03:30 +0000 (11:03 +0000)]
pinctrl: mvebu: switch drivers to generic simple mmio

Move the mvebu pinctrl drivers over to the generic simple mmio
implementation, saving a substantial number of lines of code in
the process.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: mvebu: provide generic simple mmio-based implementation
Russell King [Fri, 13 Jan 2017 11:03:25 +0000 (11:03 +0000)]
pinctrl: mvebu: provide generic simple mmio-based implementation

Provide a generic simple mmio-based probe function and methods, which
pinctrl drivers can use to initialise the mvebu pinctrl subsystem.
Most mvebu pinctrl drivers can use this.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: mvebu: provide per-control private data
Russell King [Fri, 13 Jan 2017 11:03:20 +0000 (11:03 +0000)]
pinctrl: mvebu: provide per-control private data

Provide per-control private data into each mvebu pinctrl method, which
will allow us to provide some completely generic helpers without the
global variable and per-instance function definitions that would be
required when we have multiple pin controllers on a SoC.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: mvebu: constify mvebu_mpp_ctrl structures
Russell King [Fri, 13 Jan 2017 11:03:15 +0000 (11:03 +0000)]
pinctrl: mvebu: constify mvebu_mpp_ctrl structures

As the mvebu_mpp_ctrl structures contain function pointers, it is
preferable for these to be made read-only to prevent the function
pointers being modified.  So make these const.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: mvebu: Use seq_putc() in mvebu_pinconf_group_dbg_show()
Markus Elfring [Thu, 12 Jan 2017 16:12:30 +0000 (17:12 +0100)]
pinctrl: mvebu: Use seq_putc() in mvebu_pinconf_group_dbg_show()

Single characters should be put into a sequence.
Thus use the corresponding function "seq_putc".

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: mvebu: Use seq_puts() in mvebu_pinconf_group_dbg_show()
Markus Elfring [Thu, 12 Jan 2017 15:51:00 +0000 (16:51 +0100)]
pinctrl: mvebu: Use seq_puts() in mvebu_pinconf_group_dbg_show()

Strings which did not contain data format specifications should be put
into a sequence. Thus use the corresponding function "seq_puts".

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: mvebu: Delete an unnecessary return statement in mvebu_pinconf_group_dbg_show()
Markus Elfring [Thu, 12 Jan 2017 15:30:24 +0000 (16:30 +0100)]
pinctrl: mvebu: Delete an unnecessary return statement in mvebu_pinconf_group_dbg_show()

The script "checkpatch.pl" pointed information out like the following.

WARNING: void function return statements are not generally useful

Thus remove such a statement in the affected function.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: mvebu: Delete an error message for a failed memory allocation in three functions
Markus Elfring [Thu, 12 Jan 2017 15:15:34 +0000 (16:15 +0100)]
pinctrl: mvebu: Delete an error message for a failed memory allocation in three functions

The script "checkpatch.pl" pointed information out like the following.

WARNING: Possible unnecessary 'out of memory' message

Thus fix the affected source code places.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: mvebu: Use kmalloc_array() in mvebu_pinctrl_dt_node_to_map()
Markus Elfring [Thu, 12 Jan 2017 15:00:15 +0000 (16:00 +0100)]
pinctrl: mvebu: Use kmalloc_array() in mvebu_pinctrl_dt_node_to_map()

* A multiplication for the size determination of a memory allocation
  indicated that an array data structure should be processed.
  Thus use the corresponding function "kmalloc_array".

  This issue was detected by using the Coccinelle software.

* Replace the specification of a data structure by a pointer dereference
  to make the corresponding size determination a bit safer according to
  the Linux coding style convention.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agoMerge tag 'sh-pfc-for-v4.11-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Walleij [Fri, 13 Jan 2017 15:43:17 +0000 (16:43 +0100)]
Merge tag 'sh-pfc-for-v4.11-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.11

  - Add bias handling for non-GPIO pins for R-Car H3,
  - Add drive-strength and bias handling for R-Car M3-W,
  - Add CAN, CAN FD, MSIOF, and HSCIF pin groups for R-Car M3-W,
  - Add SDHI voltage switching for R-Car M2-N.

7 years agopinctrl: Initialize pinctrl_dev.node
Thierry Reding [Thu, 12 Jan 2017 16:03:34 +0000 (17:03 +0100)]
pinctrl: Initialize pinctrl_dev.node

The struct pinctrl_dev's node field is not properly set up, which means
the .prev and .next fields will be NULL. That's not something that the
linked list code can deal with, so extra care must be taken when using
these fields. An example of this is introduced in commit 3429fb3cda34
("pinctrl: Fix panic when pinctrl devices with hogs are unregistered")
where list_del() is made conditional on the pinctrl device being part
of the pinctrl device list. This is to ensure that list_del() won't
crash upon encountering a NULL pointer in .prev and/or .next.

After initializing the list head there's no need to jump through these
extra hoops and list_del() will work unconditionally. This is because
the initialized list head points to itself and therefore the .prev and
.next fields can be properly dereferenced.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: core: Fix regression caused by delayed work for hogs
Tony Lindgren [Wed, 11 Jan 2017 22:13:34 +0000 (14:13 -0800)]
pinctrl: core: Fix regression caused by delayed work for hogs

Commit df61b366af26 ("pinctrl: core: Use delayed work for hogs") caused a
regression at least with sh-pfc that is also a GPIO controller as
noted by Geert Uytterhoeven <geert@linux-m68k.org>.

As the original pinctrl_register() has issues calling pin controller
driver functions early before the controller has finished registering,
we can't just revert commit df61b366af26. That would break the drivers
using GENERIC_PINCTRL_GROUPS or GENERIC_PINMUX_FUNCTIONS.

So let's fix the issue with the following steps as a single patch:

1. Revert the late_init parts of commit df61b366af26.

   The late_init clearly won't work and we have to just give up
   on fixing pinctrl_register() for GENERIC_PINCTRL_GROUPS and
   GENERIC_PINMUX_FUNCTIONS.

2. Split pinctrl_register() into two parts

   By splitting pinctrl_register() into pinctrl_init_controller()
   and pinctrl_create_and_start() we have better control over when
   it's safe to call pinctrl_create().

3. Introduce a new pinctrl_register_and_init() function

   As suggested by Linus Walleij <linus.walleij@linaro.org>, we
   can just introduce a new function for the controllers that need
   pinctrl_create() called later.

4. Convert the four known problem cases to use new function

   Let's convert pinctrl-imx, pinctrl-single, sh-pfc and ti-iodelay
   to use the new function to fix the issues. The rest of the drivers
   can be converted later. Let's also update Documentation/pinctrl.txt
   accordingly because of the known issues with pinctrl_register().

Fixes: df61b366af26 ("pinctrl: core: Use delayed work for hogs")
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: sunxi: add driver for V3s SoC
Icenowy Zheng [Tue, 3 Jan 2017 15:16:27 +0000 (23:16 +0800)]
pinctrl: sunxi: add driver for V3s SoC

V3s SoC features only a pin controller (for the lack of CPUs part).

Add a driver for this controller.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl/amd: white space cleanups in amd_gpio_dbg_show()
Dan Carpenter [Sat, 7 Jan 2017 06:32:15 +0000 (09:32 +0300)]
pinctrl/amd: white space cleanups in amd_gpio_dbg_show()

We accidentally deleted two tabs from the first line, but even with that
fixed the conditions were not really kernel style.  Put the && at the
end of the line so we can align the condition clauses.  Also add spaces
around the "+" operator.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: imx7d-pinctrl: Fix a typo
Fabio Estevam [Fri, 6 Jan 2017 00:55:43 +0000 (22:55 -0200)]
pinctrl: imx7d-pinctrl: Fix a typo

Fix a typo in "Peripherals".

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: Drop error prints on kzalloc() failure
Bjorn Andersson [Thu, 5 Jan 2017 16:07:55 +0000 (08:07 -0800)]
pinctrl: Drop error prints on kzalloc() failure

Upon failing kzalloc() will print an error message in the log, so
there's no need for additional printouts. Also standardizes the "!ptr"
vs "ptr == NULL" while I'm touching those lines.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: da850-pupd: Add to module device table
David Lechner [Thu, 5 Jan 2017 23:43:41 +0000 (17:43 -0600)]
pinctrl: da850-pupd: Add to module device table

This adds the pintrol-da850-pupd driver to the module device table so that
udev will automatically bind the driver to the device.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: baytrail: Convert to use devm_*()
Andy Shevchenko [Tue, 10 Jan 2017 20:11:39 +0000 (22:11 +0200)]
pinctrl: baytrail: Convert to use devm_*()

This simplifies error handling and allows us to drop error path handlers
completely.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: intel: Convert to use devm_gpiochip_add_data()
Mika Westerberg [Tue, 10 Jan 2017 14:31:57 +0000 (17:31 +0300)]
pinctrl: intel: Convert to use devm_gpiochip_add_data()

This simplifies error handling and allows us to drop intel_pinctrl_remove()
completely.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: Introduce TI IOdelay configuration driver
Nishanth Menon [Thu, 5 Jan 2017 18:54:14 +0000 (10:54 -0800)]
pinctrl: Introduce TI IOdelay configuration driver

SoC family such as DRA7 family of processors have, in addition
to the regular muxing of pins (as done by pinctrl-single), a separate
hardware module called IODelay which is also expected to be configured.
The "IODelay" module has it's own register space that is independent
of the control module and the padconf register area.

With recent changes to the pinctrl framework, we can now support
this hardware with a reasonably minimal driver by using #pinctrl-cells,
GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS.

It is advocated strongly in TI's official documentation considering
the existing design of the DRA7 family of processors during mux or
IODelay reconfiguration, there is a potential for a significant glitch
which may cause functional impairment to certain hardware. It is
hence recommended to do as little of muxing as absolutely necessary
without I/O isolation (which can only be done in initial stages of
bootloader).

NOTE: with the system wide I/O isolation scheme present in DRA7 SoC
family, it is not reasonable to do stop all I/O operations for every
such pad configuration scheme. So, we will let it glitch when used in
this mode.

Even with the above limitation, certain functionality such as MMC has
mandatory need for IODelay reconfiguration requirements, depending on
speed of transfer. In these cases, with careful examination of usecase
involved, the expected glitch can be controlled such that it does not
impact functionality.

In short, IODelay module support as a padconf driver being introduced
here is not expected to do SoC wide I/O Isolation and is meant for
a limited subset of IODelay configuration requirements that need to
be dynamic and whose glitchy behavior will not cause functionality
failure for that interface.

IMPORTANT NOTE: we take the approach of keeping LOCK_BITs cleared
to 0x0 at all times, even when configuring Manual IO Timing Modes.
This is done by eliminating the LOCK_BIT=1 setting from Step
of the Manual IO timing Mode configuration procedure. This option
leaves the CFG_* registers unprotected from unintended writes to the
CTRL_CORE_PAD_* registers while Manual IO Timing Modes are configured.

This approach is taken to allow for a generic driver to exist in kernel
world that has to be used carefully in required usecases.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[tony@atomide.com: updated to use generic pinctrl functions, added
 binding documentation, updated comments]
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: core: Make dt_free_map optional
Tony Lindgren [Fri, 30 Dec 2016 18:37:31 +0000 (10:37 -0800)]
pinctrl: core: Make dt_free_map optional

If the pin controller driver is using devm_kzalloc, there may not be
anything to do for dt_free_map. Let's make it optional to avoid
unncessary boilerplate code.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: sunxi: Remove old sun5i pinctrl drivers
Maxime Ripard [Sun, 8 Jan 2017 21:31:17 +0000 (22:31 +0100)]
pinctrl: sunxi: Remove old sun5i pinctrl drivers

Now that we have a common pinctrl driver for all the sun5i SoCs, we can
remove the old, separate drivers.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: sunxi: Add common sun5i pinctrl driver
Maxime Ripard [Sun, 8 Jan 2017 21:31:16 +0000 (22:31 +0100)]
pinctrl: sunxi: Add common sun5i pinctrl driver

The sun5i SoCs (A10s, A13, GR8) are all based on the same die fit in
different packages. Hence, the pins and functions available are just the
based on the same set, each SoC having a different subset.

Introduce a common pinctrl driver that supports multiple variants to allow
to put as much as we can in common.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: sunxi: Add pinctrl variants
Maxime Ripard [Sun, 8 Jan 2017 21:31:15 +0000 (22:31 +0100)]
pinctrl: sunxi: Add pinctrl variants

Some SoCs are either supposed to be pin compatible (A10 and A20 for
example), or are just repackaged versions of the same die (A10s, A13, GR8).

In those case, having a full blown pinctrl driver just introduces
duplication in both data size and maintainance effort.

Add a variant option to both pins and functions to be able to limit the
pins and functions described only to a subset of the SoC we support with a
given driver.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: Fix panic when pinctrl devices with hogs are unregistered
Jon Hunter [Thu, 5 Jan 2017 15:52:55 +0000 (15:52 +0000)]
pinctrl: Fix panic when pinctrl devices with hogs are unregistered

Commit df61b366af26 ('pinctrl: core: Use delayed work for hogs')
deferred part of the registration for pinctrl devices if the pinctrl
device has hogs. This introduced a window where if the pinctrl device
with hogs was sucessfully registered, but then unregistered again
(which could be caused by parent device being probe deferred) before
the delayed work has chanced to run, then this will cause a kernel
panic to occur because:

1. The 'pctldev->p' has not yet been initialised and when unregistering
   the pinctrl device we only check to see if it is an error value, but
   now it could also be NULL.
2. The pinctrl device may not have been added to the 'pinctrldev_list'
   list and we don't check to see if it was added before removing.

Fix up the above by checking to see if the 'pctldev->p' pointer is an
error value or NULL before putting the pinctrl device and verifying
that the pinctrl device is present in 'pinctrldev_list' before removing.

Fixes: df61b366af26 ('pinctrl: core: Use delayed work for hogs')
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: amd: fix compilation warning
Linus Walleij [Tue, 3 Jan 2017 08:18:58 +0000 (09:18 +0100)]
pinctrl: amd: fix compilation warning

3bfd44306c65 ("pinctrl: amd: Add support for additional GPIO")
created the following warning:

drivers/pinctrl/pinctrl-amd.c: In function 'amd_gpio_dbg_show':
drivers/pinctrl/pinctrl-amd.c:210:3: warning: 'pin_num' may be used uninitialized in this function [-Wmaybe-uninitialized]
   for (; i < pin_num; i++) {
   ^
drivers/pinctrl/pinctrl-amd.c:172:21: warning: 'i' may be used uninitialized in this function [-Wmaybe-uninitialized]
  unsigned int bank, i, pin_num;
                     ^
Fix this by adding a guarding default case for illegal
bank numbers.

Cc: S-k Shyam-sundar <Shyam-sundar.S-k@amd.com>
Cc: Nehal Shah <Nehal-bakulchandra.Shah@amd.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: imx: use generic pinmux helpers for managing functions
Gary Bisson [Mon, 2 Jan 2017 18:20:22 +0000 (19:20 +0100)]
pinctrl: imx: use generic pinmux helpers for managing functions

Now using function_desc structure instead of imx_pmx_func.

Also leveraging generic functions to retrieve functions count/name/groups.

The imx_free_funcs function can be removed since it is now handled by
the core driver during unregister.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: imx: use generic pinctrl helpers for managing groups
Gary Bisson [Mon, 2 Jan 2017 18:20:21 +0000 (19:20 +0100)]
pinctrl: imx: use generic pinctrl helpers for managing groups

Now using group_desc structure instead of imx_pin_group.

Also leveraging generic functions to retrieve groups count/name/pins.

The imx_free_pingroups function can be removed since it is now handled by
the core driver during unregister.

Finally the device tree parsing is moved after the pinctrl driver registration
since this latter initializes the radix trees.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: qcom: msm8660: rename some SDC1->SDC4
Linus Walleij [Mon, 2 Jan 2017 08:42:28 +0000 (09:42 +0100)]
pinctrl: qcom: msm8660: rename some SDC1->SDC4

These four pins are for SDC4, not SDC1. They are grouped for
SDC4 later in the file so this must be a typo.

Reviewed-by: Björn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: single: Use generic pinmux helpers for managing functions
Tony Lindgren [Tue, 27 Dec 2016 17:20:03 +0000 (09:20 -0800)]
pinctrl: single: Use generic pinmux helpers for managing functions

We can now drop the driver specific code for managing functions.

Signed-off-by: Tony Lindgren <tony@atomide.com>
[Replaces GENERIC_PINMUX with GENERIC_PINMUX_FUNCTIONS]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: single: Use generic pinctrl helpers for managing groups
Tony Lindgren [Tue, 27 Dec 2016 17:20:02 +0000 (09:20 -0800)]
pinctrl: single: Use generic pinctrl helpers for managing groups

We can now drop the driver specific code for managing groups.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: core: Add generic pinctrl functions for managing groups
Tony Lindgren [Tue, 27 Dec 2016 17:20:01 +0000 (09:20 -0800)]
pinctrl: core: Add generic pinctrl functions for managing groups

We can add generic helpers for function handling for cases where the pin
controller driver does not need to use static arrays.

Signed-off-by: Tony Lindgren <tony@atomide.com>
[Renamed the Kconfig item and moved things around]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: stricten up generic group code
Linus Walleij [Fri, 30 Dec 2016 14:04:43 +0000 (15:04 +0100)]
pinctrl: stricten up generic group code

Rename the symbol PINCTRL_GENERIC to PINCTRL_GENERIC_GROUPS since
it all pertains to groups. Replace everywhere.

ifdef out the radix tree and the struct when not using the
generic groups.

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: core: Add generic pinctrl functions for managing groups
Tony Lindgren [Tue, 27 Dec 2016 17:20:00 +0000 (09:20 -0800)]
pinctrl: core: Add generic pinctrl functions for managing groups

We can add generic helpers for pin group handling for cases where the pin
controller driver does not need to use static arrays.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: add some comments to the hog/late init code
Linus Walleij [Fri, 30 Dec 2016 13:44:18 +0000 (14:44 +0100)]
pinctrl: add some comments to the hog/late init code

It confused me a bit so it may confuse others. Make it crystal
clear what is going on here for any future readers.

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
7 years agopinctrl: core: Use delayed work for hogs
Tony Lindgren [Tue, 27 Dec 2016 17:19:59 +0000 (09:19 -0800)]
pinctrl: core: Use delayed work for hogs

Having the pin control framework call pin controller functions
before it's probe has finished is not nice as the pin controller
device driver does not yet have struct pinctrl_dev handle.

Let's fix this issue by adding deferred work for late init. This is
needed to be able to add pinctrl generic helper functions that expect
to know struct pinctrl_dev handle. Note that we now need to call
create_pinctrl() directly as we don't want to add the pin controller
to the list of controllers until the hogs are claimed. We also need
to pass the pinctrl_dev to the device tree parser functions as they
otherwise won't find the right controller at this point.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: imx: use radix trees for groups and functions
Gary Bisson [Fri, 2 Dec 2016 16:35:19 +0000 (17:35 +0100)]
pinctrl: imx: use radix trees for groups and functions

This change is inspired from the pinctrl-single architecture.

The problem with current implementation is that it isn't possible
to add/remove functions and/or groups dynamically. The radix tree
offers an easy way to do so. The intent is to offer a follow-up
patch later that will enable the use of pinctrl nodes in dt-overlays.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: imx: remove const qualifier of imx_pinctrl_soc_info
Gary Bisson [Fri, 2 Dec 2016 16:35:18 +0000 (17:35 +0100)]
pinctrl: imx: remove const qualifier of imx_pinctrl_soc_info

Otherwise can't dynamically update fields such as ngroups which can
change over time (with a dt-overlay for instance).

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: single: fix spelling mistakes on "Ivalid"
Colin Ian King [Fri, 23 Dec 2016 00:47:14 +0000 (00:47 +0000)]
pinctrl: single: fix spelling mistakes on "Ivalid"

Trivial fixe to spelling mistake "Ivalid" to "Invalid" in
dev_err  error message.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: simplify check for pin request conflicts
Vladimir Zapolskiy [Sun, 25 Dec 2016 00:59:28 +0000 (02:59 +0200)]
pinctrl: simplify check for pin request conflicts

This is a non-functional change, which deletes code duplication in two
of four if-if branches by reordering the checks. Functional identity
of the code change can be shown by running through the whole truth table
of boolean arguments.

Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: update my email address
John Crispin [Tue, 20 Dec 2016 18:55:41 +0000 (19:55 +0100)]
pinctrl: update my email address

This patch updates my email address as I no longer have access to the old
one.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: sirf: atlas7: Improve code layout
Christophe JAILLET [Tue, 20 Dec 2016 05:41:22 +0000 (06:41 +0100)]
pinctrl: sirf: atlas7: Improve code layout

Add some tab in order to improve indentation.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: sirf: atlas7: Add missing 'of_node_put()'
Christophe JAILLET [Tue, 20 Dec 2016 05:40:43 +0000 (06:40 +0100)]
pinctrl: sirf: atlas7: Add missing 'of_node_put()'

Reference to 'sys2pci_np' should be dropped in all cases here, not only in
error handling path.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: stm32: activate strict mux mode
Gabriel Fernandez [Wed, 14 Dec 2016 14:24:16 +0000 (15:24 +0100)]
pinctrl: stm32: activate strict mux mode

This activates strict mode muxing for the STM32 pin controllers,
as these do not allow GPIO and functions to use the same pin
simultaneously.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: fix DT bindings for marvell,kirkwood-pinctrl
Andreas Klinger [Tue, 13 Dec 2016 23:08:27 +0000 (00:08 +0100)]
pinctrl: fix DT bindings for marvell,kirkwood-pinctrl

On Marvell mv88f6180 mpp pins range from 0 to 19 as well as from 35 to 44.
This is already fixed in commit: 9573e7923007961799beff38bc5c5a7635634eef

This is the documentation change for above commit.

Signed-off-by: Andreas Klinger <ak@it-klinger.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: amd: Add support for additional GPIO
Shah, Nehal-bakulchandra [Tue, 6 Dec 2016 06:47:48 +0000 (12:17 +0530)]
pinctrl: amd: Add support for additional GPIO

This patch adds support for new Bank and adds IRQCHIP_SKIP_SET_WAKE flag.

Reviewed-by: S-k, Shyam-sundar <Shyam-sundar.S-k@amd.com>
Signed-off-by: Nehal Shah <Nehal-bakulchandra.Shah@amd.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: aspeed: Fix kerneldoc return descriptions
Andrew Jeffery [Tue, 20 Dec 2016 07:35:51 +0000 (18:05 +1030)]
pinctrl: aspeed: Fix kerneldoc return descriptions

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: aspeed-g5: Add mux configuration for all pins
Andrew Jeffery [Tue, 20 Dec 2016 07:35:50 +0000 (18:05 +1030)]
pinctrl: aspeed-g5: Add mux configuration for all pins

The patch introducing the g5 pinctrl driver implemented a smattering of
pins to flesh out the implementation of the core and provide bare-bones
support for some OpenPOWER platforms and the AST2500 evaluation board.
Now, update the bindings document to reflect the complete functionality
and implement the necessary pin configuration tables in the driver.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: aspeed-g4: Add mux configuration for all pins
Andrew Jeffery [Tue, 20 Dec 2016 07:35:49 +0000 (18:05 +1030)]
pinctrl: aspeed-g4: Add mux configuration for all pins

The patch introducing the g4 pinctrl driver implemented a smattering of
pins to flesh out the implementation of the core and provide bare-bones
support for some OpenPOWER platforms. Now, update the bindings document
to reflect the complete functionality and implement the necessary pin
configuration tables in the driver.

Cc: Timothy Pearson <tpearson@raptorengineering.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: aspeed: Read and write bits in LPC and GFX controllers
Andrew Jeffery [Tue, 20 Dec 2016 07:35:48 +0000 (18:05 +1030)]
pinctrl: aspeed: Read and write bits in LPC and GFX controllers

The System Control Unit IP block in the Aspeed SoCs is typically where
the pinmux configuration is found, but not always. A number of pins
depend on state in one of LPC Host Control (LHC) or SoC Display
Controller (GFX) IP blocks, so the Aspeed pinmux drivers should have the
means to adjust these as necessary.

We use syscon to cast a regmap over the GFX and LPC blocks, which is
used as an arbitration layer between the relevant driver and the pinctrl
subsystem. The regmaps are then exposed to the SoC-specific pinctrl
drivers by phandles in the devicetree, and are selected during a mux
request by querying a new 'ip' member in struct aspeed_sig_desc.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: aspeed: dt: Fix compatibles for the System Control Unit
Andrew Jeffery [Tue, 20 Dec 2016 07:35:47 +0000 (18:05 +1030)]
pinctrl: aspeed: dt: Fix compatibles for the System Control Unit

Reference the SoC-specific compatible string in the examples as
required.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
8 years agopinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions
Ulrich Hecht [Wed, 7 Dec 2016 16:44:46 +0000 (17:44 +0100)]
pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
[geert: Fix hscif2_clk_[bc]_mux[] and hscif4_ctrl_mux[]]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
8 years agopinctrl: sh-pfc: r8a7793: Implement voltage switching for SDHI
Simon Horman [Thu, 1 Dec 2016 13:21:07 +0000 (14:21 +0100)]
pinctrl: sh-pfc: r8a7793: Implement voltage switching for SDHI

Voltage switching is the same as on the r8a7791.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
8 years agopinctrl: sh-pfc: r8a7796: Add MSIOF pins, groups and functions
Takeshi Kihara [Wed, 16 Mar 2016 03:22:06 +0000 (12:22 +0900)]
pinctrl: sh-pfc: r8a7796: Add MSIOF pins, groups and functions

This patch adds MSIOF{0,1,2,3} pins, groups and functions to R8A7796
SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Correct MSIOF3 SS1_E/SS2_E pins]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
8 years agopinctrl: sh-pfc: r8a7796: Add CAN FD support
Chris Paterson [Tue, 22 Nov 2016 13:49:03 +0000 (13:49 +0000)]
pinctrl: sh-pfc: r8a7796: Add CAN FD support

This patch adds CAN FD[0-1] pinmux support to r8a7796 SoC.

Based on a patch for r8a7795 by Ramesh Shanmugasundaram.

Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
8 years agopinctrl: sh-pfc: r8a7796: Add CAN support
Chris Paterson [Tue, 22 Nov 2016 13:49:02 +0000 (13:49 +0000)]
pinctrl: sh-pfc: r8a7796: Add CAN support

This patch adds CAN[0-1] pinmux support to r8a7796 SoC.

Based on a patch for r8a7795 by Ramesh Shanmugasundaram.

Signed-off-by: Chris Paterson <chris.paterson2@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
8 years agopinctrl: sh-pfc: r8a7795: Support none GPIO pins bias setting
Niklas Söderlund [Thu, 17 Nov 2016 15:26:31 +0000 (16:26 +0100)]
pinctrl: sh-pfc: r8a7795: Support none GPIO pins bias setting

There are pins on the r8a7795 which are not part of a GPIO bank nor
can be muxed between different functions. They do however allow for the
bias to be configured. Add those pins to the list of pins and
to the bias configuration array.

The pins can now be referred to in DT by function names and their bias
setting set.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
8 years agopinctrl: sh-pfc: r8a7796: Add bias pinconf support
Niklas Söderlund [Thu, 17 Nov 2016 15:09:20 +0000 (16:09 +0100)]
pinctrl: sh-pfc: r8a7796: Add bias pinconf support

Implements pull-up and pull-down. On this SoC there is no simple mapping
of GP pins to bias register bits, so we need a table.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
8 years agopinctrl: sh-pfc: r8a7796: Add drive strength support
Niklas Söderlund [Thu, 17 Nov 2016 15:09:19 +0000 (16:09 +0100)]
pinctrl: sh-pfc: r8a7796: Add drive strength support

Define the drive strength registers for the R8A7796. Add pins which are
not part of a GPIO bank nor can be muxed between different functions but
which still allow for their drive-strength to be configured.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
8 years agoLinux 4.10-rc1
Linus Torvalds [Mon, 26 Dec 2016 00:13:08 +0000 (16:13 -0800)]
Linux 4.10-rc1

8 years agopowerpc: Fix build warning on 32-bit PPC
Larry Finger [Fri, 23 Dec 2016 03:06:53 +0000 (21:06 -0600)]
powerpc: Fix build warning on 32-bit PPC

I am getting the following warning when I build kernel 4.9-git on my
PowerBook G4 with a 32-bit PPC processor:

    AS      arch/powerpc/kernel/misc_32.o
  arch/powerpc/kernel/misc_32.S:299:7: warning: "CONFIG_FSL_BOOKE" is not defined [-Wundef]

This problem is evident after commit 989cea5c14be ("kbuild: prevent
lib-ksyms.o rebuilds"); however, this change in kbuild only exposes an
error that has been in the code since 2005 when this source file was
created.  That was with commit 9994a33865f4 ("powerpc: Introduce
entry_{32,64}.S, misc_{32,64}.S, systbl.S").

The offending line does not make a lot of sense.  This error does not
seem to cause any errors in the executable, thus I am not recommending
that it be applied to any stable versions.

Thanks to Nicholas Piggin for suggesting this solution.

Fixes: 9994a33865f4 ("powerpc: Introduce entry_{32,64}.S, misc_{32,64}.S, systbl.S")
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
8 years agoavoid spurious "may be used uninitialized" warning
Linus Torvalds [Sun, 25 Dec 2016 22:56:58 +0000 (14:56 -0800)]
avoid spurious "may be used uninitialized" warning

The timer type simplifications caused a new gcc warning:

  drivers/base/power/domain.c: In function â€˜genpd_runtime_suspend’:
  drivers/base/power/domain.c:562:14: warning: â€˜time_start’ may be used uninitialized in this function [-Wmaybe-uninitialized]
     elapsed_ns = ktime_to_ns(ktime_sub(ktime_get(), time_start));

despite the actual use of "time_start" not having changed in any way.
It appears that simply changing the type of ktime_t from a union to a
plain scalar type made gcc check the use.

The variable wasn't actually used uninitialized, but gcc apparently
failed to notice that the conditional around the use was exactly the
same as the conditional around the initialization of that variable.

Add an unnecessary initialization just to shut up the compiler.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
8 years agoMerge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 25 Dec 2016 22:30:04 +0000 (14:30 -0800)]
Merge branch 'timers-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull timer type cleanups from Thomas Gleixner:
 "This series does a tree wide cleanup of types related to
  timers/timekeeping.

   - Get rid of cycles_t and use a plain u64. The type is not really
     helpful and caused more confusion than clarity

   - Get rid of the ktime union. The union has become useless as we use
     the scalar nanoseconds storage unconditionally now. The 32bit
     timespec alike storage got removed due to the Y2038 limitations
     some time ago.

     That leaves the odd union access around for no reason. Clean it up.

  Both changes have been done with coccinelle and a small amount of
  manual mopping up"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  ktime: Get rid of ktime_equal()
  ktime: Cleanup ktime_set() usage
  ktime: Get rid of the union
  clocksource: Use a plain u64 instead of cycle_t

8 years agoMerge branch 'smp-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 25 Dec 2016 22:05:56 +0000 (14:05 -0800)]
Merge branch 'smp-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull SMP hotplug notifier removal from Thomas Gleixner:
 "This is the final cleanup of the hotplug notifier infrastructure. The
  series has been reintgrated in the last two days because there came a
  new driver using the old infrastructure via the SCSI tree.

  Summary:

   - convert the last leftover drivers utilizing notifiers

   - fixup for a completely broken hotplug user

   - prevent setup of already used states

   - removal of the notifiers

   - treewide cleanup of hotplug state names

   - consolidation of state space

  There is a sphinx based documentation pending, but that needs review
  from the documentation folks"

* 'smp-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/armada-xp: Consolidate hotplug state space
  irqchip/gic: Consolidate hotplug state space
  coresight/etm3/4x: Consolidate hotplug state space
  cpu/hotplug: Cleanup state names
  cpu/hotplug: Remove obsolete cpu hotplug register/unregister functions
  staging/lustre/libcfs: Convert to hotplug state machine
  scsi/bnx2i: Convert to hotplug state machine
  scsi/bnx2fc: Convert to hotplug state machine
  cpu/hotplug: Prevent overwriting of callbacks
  x86/msr: Remove bogus cleanup from the error path
  bus: arm-ccn: Prevent hotplug callback leak
  perf/x86/intel/cstate: Prevent hotplug callback leak
  ARM/imx/mmcd: Fix broken cpu hotplug handling
  scsi: qedi: Convert to hotplug state machine

8 years agoMerge branch 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux
Linus Torvalds [Sun, 25 Dec 2016 22:01:28 +0000 (14:01 -0800)]
Merge branch 'turbostat' of git://git./linux/kernel/git/lenb/linux

Pull turbostat updates from Len Brown.

* 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux:
  tools/power turbostat: remove obsolete -M, -m, -C, -c options
  tools/power turbostat: Make extensible via the --add parameter
  tools/power turbostat: Denverton uses a 25 MHz crystal, not 19.2 MHz
  tools/power turbostat: line up headers when -M is used
  tools/power turbostat: fix SKX PKG_CSTATE_LIMIT decoding
  tools/power turbostat: Support Knights Mill (KNM)
  tools/power turbostat: Display HWP OOB status
  tools/power turbostat: fix Denverton BCLK
  tools/power turbostat: use intel-family.h model strings
  tools/power/turbostat: Add Denverton RAPL support
  tools/power/turbostat: Add Denverton support
  tools/power/turbostat: split core MSR support into status + limit
  tools/power turbostat: fix error case overflow read of slm_freq_table[]
  tools/power turbostat: Allocate correct amount of fd and irq entries
  tools/power turbostat: switch to tab delimited output
  tools/power turbostat: Gracefully handle ACPI S3
  tools/power turbostat: tidy up output on Joule counter overflow

8 years agomm: add PageWaiters indicating tasks are waiting for a page bit
Nicholas Piggin [Sun, 25 Dec 2016 03:00:30 +0000 (13:00 +1000)]
mm: add PageWaiters indicating tasks are waiting for a page bit

Add a new page flag, PageWaiters, to indicate the page waitqueue has
tasks waiting. This can be tested rather than testing waitqueue_active
which requires another cacheline load.

This bit is always set when the page has tasks on page_waitqueue(page),
and is set and cleared under the waitqueue lock. It may be set when
there are no tasks on the waitqueue, which will cause a harmless extra
wakeup check that will clears the bit.

The generic bit-waitqueue infrastructure is no longer used for pages.
Instead, waitqueues are used directly with a custom key type. The
generic code was not flexible enough to have PageWaiters manipulation
under the waitqueue lock (which simplifies concurrency).

This improves the performance of page lock intensive microbenchmarks by
2-3%.

Putting two bits in the same word opens the opportunity to remove the
memory barrier between clearing the lock bit and testing the waiters
bit, after some work on the arch primitives (e.g., ensuring memory
operand widths match and cover both bits).

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Bob Peterson <rpeterso@redhat.com>
Cc: Steven Whitehouse <swhiteho@redhat.com>
Cc: Andrew Lutomirski <luto@kernel.org>
Cc: Andreas Gruenbacher <agruenba@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Mel Gorman <mgorman@techsingularity.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
8 years agomm: Use owner_priv bit for PageSwapCache, valid when PageSwapBacked
Nicholas Piggin [Sun, 25 Dec 2016 03:00:29 +0000 (13:00 +1000)]
mm: Use owner_priv bit for PageSwapCache, valid when PageSwapBacked

A page is not added to the swap cache without being swap backed,
so PageSwapBacked mappings can use PG_owner_priv_1 for PageSwapCache.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Hugh Dickins <hughd@google.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Bob Peterson <rpeterso@redhat.com>
Cc: Steven Whitehouse <swhiteho@redhat.com>
Cc: Andrew Lutomirski <luto@kernel.org>
Cc: Andreas Gruenbacher <agruenba@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Mel Gorman <mgorman@techsingularity.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
8 years agoktime: Get rid of ktime_equal()
Thomas Gleixner [Sun, 25 Dec 2016 11:43:07 +0000 (12:43 +0100)]
ktime: Get rid of ktime_equal()

No point in going through loops and hoops instead of just comparing the
values.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
8 years agoktime: Cleanup ktime_set() usage
Thomas Gleixner [Sun, 25 Dec 2016 11:30:41 +0000 (12:30 +0100)]
ktime: Cleanup ktime_set() usage

ktime_set(S,N) was required for the timespec storage type and is still
useful for situations where a Seconds and Nanoseconds part of a time value
needs to be converted. For anything where the Seconds argument is 0, this
is pointless and can be replaced with a simple assignment.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
8 years agoktime: Get rid of the union
Thomas Gleixner [Sun, 25 Dec 2016 10:38:40 +0000 (11:38 +0100)]
ktime: Get rid of the union

ktime is a union because the initial implementation stored the time in
scalar nanoseconds on 64 bit machine and in a endianess optimized timespec
variant for 32bit machines. The Y2038 cleanup removed the timespec variant
and switched everything to scalar nanoseconds. The union remained, but
become completely pointless.

Get rid of the union and just keep ktime_t as simple typedef of type s64.

The conversion was done with coccinelle and some manual mopping up.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
8 years agoclocksource: Use a plain u64 instead of cycle_t
Thomas Gleixner [Wed, 21 Dec 2016 19:32:01 +0000 (20:32 +0100)]
clocksource: Use a plain u64 instead of cycle_t

There is no point in having an extra type for extra confusion. u64 is
unambiguous.

Conversion was done with the following coccinelle script:

@rem@
@@
-typedef u64 cycle_t;

@fix@
typedef cycle_t;
@@
-cycle_t
+u64

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: John Stultz <john.stultz@linaro.org>
8 years agoirqchip/armada-xp: Consolidate hotplug state space
Thomas Gleixner [Wed, 21 Dec 2016 19:19:57 +0000 (20:19 +0100)]
irqchip/armada-xp: Consolidate hotplug state space

The mpic is either the main interrupt controller or is cascaded behind a
GIC. The mpic is single instance and the modes are mutually exclusive, so
there is no reason to have seperate cpu hotplug states.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Link: http://lkml.kernel.org/r/20161221192112.333161745@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
8 years agoirqchip/gic: Consolidate hotplug state space
Thomas Gleixner [Wed, 21 Dec 2016 19:19:56 +0000 (20:19 +0100)]
irqchip/gic: Consolidate hotplug state space

Even if both drivers are compiled in only one instance can run on a given
system depending on the available GIC version.

So having seperate hotplug states for them is pointless.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Link: http://lkml.kernel.org/r/20161221192112.252416267@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
8 years agocoresight/etm3/4x: Consolidate hotplug state space
Thomas Gleixner [Wed, 21 Dec 2016 19:19:55 +0000 (20:19 +0100)]
coresight/etm3/4x: Consolidate hotplug state space

Even if both drivers are compiled in only one instance can run on a given
system depending on the available tracer cell.

So having seperate hotplug states for them is pointless.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: http://lkml.kernel.org/r/20161221192112.162765484@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
8 years agocpu/hotplug: Cleanup state names
Thomas Gleixner [Wed, 21 Dec 2016 19:19:54 +0000 (20:19 +0100)]
cpu/hotplug: Cleanup state names

When the state names got added a script was used to add the extra argument
to the calls. The script basically converted the state constant to a
string, but the cleanup to convert these strings into meaningful ones did
not happen.

Replace all the useless strings with 'subsys/xxx/yyy:state' strings which
are used in all the other places already.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Link: http://lkml.kernel.org/r/20161221192112.085444152@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
8 years agocpu/hotplug: Remove obsolete cpu hotplug register/unregister functions
Thomas Gleixner [Wed, 21 Dec 2016 19:19:53 +0000 (20:19 +0100)]
cpu/hotplug: Remove obsolete cpu hotplug register/unregister functions

hotcpu_notifier(), cpu_notifier(), __hotcpu_notifier(), __cpu_notifier(),
register_hotcpu_notifier(), register_cpu_notifier(),
__register_hotcpu_notifier(), __register_cpu_notifier(),
unregister_hotcpu_notifier(), unregister_cpu_notifier(),
__unregister_hotcpu_notifier(), __unregister_cpu_notifier()

are unused now. Remove them and all related code.

Remove also the now pointless cpu notifier error injection mechanism. The
states can be executed step by step and error rollback is the same as cpu
down, so any state transition can be tested w/o requiring the notifier
error injection.

Some CPU hotplug states are kept as they are (ab)used for hotplug state
tracking.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: rt@linutronix.de
Link: http://lkml.kernel.org/r/20161221192112.005642358@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
8 years agostaging/lustre/libcfs: Convert to hotplug state machine
Anna-Maria Gleixner [Wed, 21 Dec 2016 19:19:52 +0000 (20:19 +0100)]
staging/lustre/libcfs: Convert to hotplug state machine

Install the callbacks via the state machine. No functional change.

Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: devel@driverdev.osuosl.org
Cc: Andreas Dilger <andreas.dilger@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Oleg Drokin <oleg.drokin@intel.com>
Cc: rt@linutronix.de
Cc: lustre-devel@lists.lustre.org
Link: http://lkml.kernel.org/r/20161202110027.htzzeervzkoc4muv@linutronix.de
Link: http://lkml.kernel.org/r/20161221192111.922872524@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
8 years agoscsi/bnx2i: Convert to hotplug state machine
Sebastian Andrzej Siewior [Wed, 21 Dec 2016 19:19:51 +0000 (20:19 +0100)]
scsi/bnx2i: Convert to hotplug state machine

Install the callbacks via the state machine. No functional change.

This is the minimal fixup so we can remove the hotplug notifier mess
completely.

The real rework of this driver to use work queues is still stuck in
review/testing on the SCSI mailing list.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: "James E.J. Bottomley" <jejb@linux.vnet.ibm.com>
Cc: linux-scsi@vger.kernel.org
Cc: "Martin K. Petersen" <martin.petersen@oracle.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Chad Dupuis <chad.dupuis@qlogic.com>
Cc: QLogic-Storage-Upstream@qlogic.com
Cc: Johannes Thumshirn <jth@kernel.org>
Cc: Christoph Hellwig <hch@lst.de>
Link: http://lkml.kernel.org/r/20161221192111.836895753@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
8 years agoscsi/bnx2fc: Convert to hotplug state machine
Sebastian Andrzej Siewior [Wed, 21 Dec 2016 19:19:50 +0000 (20:19 +0100)]
scsi/bnx2fc: Convert to hotplug state machine

Install the callbacks via the state machine. No functional change.

This is the minimal fixup so we can remove the hotplug notifier mess
completely.

The real rework of this driver to use work queues is still stuck in
review/testing on the SCSI mailing list.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: "James E.J. Bottomley" <jejb@linux.vnet.ibm.com>
Cc: linux-scsi@vger.kernel.org
Cc: "Martin K. Petersen" <martin.petersen@oracle.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Chad Dupuis <chad.dupuis@qlogic.com>
Cc: QLogic-Storage-Upstream@qlogic.com
Cc: Johannes Thumshirn <jth@kernel.org>
Cc: Christoph Hellwig <hch@lst.de>
Link: http://lkml.kernel.org/r/20161221192111.757309869@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
8 years agocpu/hotplug: Prevent overwriting of callbacks
Thomas Gleixner [Wed, 21 Dec 2016 19:19:49 +0000 (20:19 +0100)]
cpu/hotplug: Prevent overwriting of callbacks

Developers manage to overwrite states blindly without thought. That's fatal
and hard to debug. Add sanity checks to make it fail.

This requries to restructure the code so that the dynamic state allocation
happens in the same lock protected section as the actual store. Otherwise
the previous assignment of 'Reserved' to the name field would trigger the
overwrite check.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Link: http://lkml.kernel.org/r/20161221192111.675234535@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
8 years agox86/msr: Remove bogus cleanup from the error path
Thomas Gleixner [Thu, 22 Dec 2016 09:32:38 +0000 (10:32 +0100)]
x86/msr: Remove bogus cleanup from the error path

The error cleanup which is invoked when the hotplug state setup failed
tries to remove the failed state, which is broken.

Fixes: 8fba38c937cd ("x86/msr: Convert to hotplug state machine")
Reported-by: kernel test robot <fengguang.wu@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
8 years agobus: arm-ccn: Prevent hotplug callback leak
Thomas Gleixner [Thu, 22 Dec 2016 10:14:06 +0000 (11:14 +0100)]
bus: arm-ccn: Prevent hotplug callback leak

In case the driver registration fails, the hotplug callback is leaked.

Not fatal, because it's never invoked as there are no instances registered,
but wrong nevertheless.

Fixes: fdc15a36d84e ("bus/arm-ccn: Convert to hotplug statemachine")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will.deacon@arm.com>
8 years agoperf/x86/intel/cstate: Prevent hotplug callback leak
Thomas Gleixner [Thu, 22 Dec 2016 10:02:08 +0000 (11:02 +0100)]
perf/x86/intel/cstate: Prevent hotplug callback leak

If the pmu registration fails the registered hotplug callbacks are not
removed. Wrong in any case, but fatal in case of a modular driver.

Replace the nonsensical state names with proper ones while at it.

Fixes: 77c34ef1c319 ("perf/x86/intel/cstate: Convert Intel CSTATE to hotplug state machine")
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: stable@vger.kernel.org
8 years agoARM/imx/mmcd: Fix broken cpu hotplug handling
Thomas Gleixner [Wed, 21 Dec 2016 19:19:48 +0000 (20:19 +0100)]
ARM/imx/mmcd: Fix broken cpu hotplug handling

The cpu hotplug support of this perf driver is broken in several ways:

1) It adds a instance before setting up the state.

2) The state for the instance is different from the state of the
   callback. It's just a randomly chosen state.

3) The instance registration is not error checked so nobody noticed that
   the call can never succeed.

4) The state for the multi install callbacks is chosen randomly and
   overwrites existing state. This is now prevented by the core code so the
   call is guaranteed to fail.

5) The error exit path in the init function leaves the instance registered
   and then frees the memory which contains the enqueued hlist node.

6) The remove function is removing the state and not the instance.

Fix it by:

- Setting up the state before adding instances. Use a dynamically allocated
  state for it.

- Installing instances after the state has been set up

- Removing the instance in the error path before freeing memory

- Removing the instance not the state in the driver remove callback

While at is use raw_cpu_processor_id(), because cpu_processor_id() cannot
be used in preemptible context, and set the driver data after successful
registration of the pmu.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Frank Li <frank.li@nxp.com>
Cc: Zhengyu Shen <zhengyu.shen@nxp.com>
Link: http://lkml.kernel.org/r/20161221192111.596204211@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
8 years agoscsi: qedi: Convert to hotplug state machine
Thomas Gleixner [Sat, 24 Dec 2016 11:34:02 +0000 (12:34 +0100)]
scsi: qedi: Convert to hotplug state machine

The CPU hotplug code is a trainwreck. It leaks a notifier in case of driver
registration error and the per cpu loop is racy against cpu hotplug. Aside
of that the driver should have been written and merged with the new state
machine interfaces in the first place.

Mop up the mess and Convert it to the hotplug state machine.

Signed-off-by: Thomas Grumpy Gleixner <tglx@linutronix.de>
Cc: Nilesh Javali <nilesh.javali@cavium.com>
Cc: Adheer Chandravanshi <adheer.chandravanshi@qlogic.com>
Cc: Chad Dupuis <chad.dupuis@cavium.com>
Cc: Saurav Kashyap <saurav.kashyap@cavium.com>
Cc: Arun Easi <arun.easi@cavium.com>
Cc: Manish Rangankar <manish.rangankar@cavium.com>
Cc: Johannes Thumshirn <jthumshirn@suse.de>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Martin K. Petersen <martin.petersen@oracle.com>
Cc: James Bottomley <James.Bottomley@HansenPartnership.com>
8 years agotools/power turbostat: remove obsolete -M, -m, -C, -c options
Len Brown [Sat, 24 Dec 2016 20:18:37 +0000 (15:18 -0500)]
tools/power turbostat: remove obsolete -M, -m, -C, -c options

The new --add option has replaced the -M, -m, -C, -c options
Eg.

-M 0x10 is now --add msr0x10,raw
-m 0x10 is now --add msr0x10,raw,u32
-C 0x10 is now --add msr0x10,delta
-c 0x10 is now --add msr0x10,delta,u32

The --add option can be repeated to add any number of counters,
while the previous options were limited to adding one of each type.

In addition, the --add option can accept a column label,
and can also display a counter as a percentage of elapsed cycles.

Eg. --add msr0x3fe,core,percent,MY_CC3

Signed-off-by: Len Brown <len.brown@intel.com>
8 years agotools/power turbostat: Make extensible via the --add parameter
Len Brown [Fri, 23 Dec 2016 04:57:55 +0000 (23:57 -0500)]
tools/power turbostat: Make extensible via the --add parameter

Create the "--add" parameter.  This can be used to teach an existing
turbostat binary about any number of any type of counter.

turbostat(8) details the syntax for --add.

Signed-off-by: Len Brown <len.brown@intel.com>