drm/msm: fixup wait_for_completion_timeout handling

wait_for_completion_timeout return >= 0 but never negative so the check
logic looks inconsistent. Further the return value of
wait_for_completion_timeout was being passed up the call chain but the
x call sites as drm_dp_i2c_do_msg()/drm_dp_dpcd_access() check for < 0
thus timeout was being treated as success case.

<snip> drivers/gpu/drm/drm_dp_helper.c:drm_dp_i2c_do_msg()
                mutex_lock(&aux->hw_mutex);
                ret = aux->transfer(aux, msg);
                mutex_unlock(&aux->hw_mutex);
                if (ret < 0) {
<snip>
logic in edp_aux_transfer() seems incorrect as it could return 0 (timeout)
but checks of <= 0 to indicate error so the return probably should be
-ETIMEDOUT in case wait_for_completion_timeout returns 0 (timeout
occurred).

Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

drm/msm/mdp5: fix for crash in disable path

Seems like disable can race with complete_flip() in process of disabling
a crtc, leading to:

[   49.065364] Call trace:
[   49.071441] [<ffffffc00041d5a0>] mdp5_ctl_blend+0x20/0x1c0
[   49.073788] [<ffffffc00041ebcc>] mdp5_crtc_disable+0x3c/0xa8
[   49.079348] [<ffffffc0003e7854>] disable_outputs.isra.4+0x11c/0x220
[   49.085164] [<ffffffc0003e7afc>] drm_atomic_helper_commit_modeset_disables+0x14/0x38
[   49.091155] [<ffffffc000425c80>] complete_commit+0x40/0xb8
[   49.099136] [<ffffffc0004260ac>] msm_atomic_commit+0x364/0x398
[   49.104430] [<ffffffc00040a614>] drm_atomic_commit+0x3c/0x70
[   49.110249] [<ffffffc0003e67b8>] drm_atomic_helper_set_config+0x1b0/0x3e0
[   49.116065] [<ffffffc0003f99bc>] drm_mode_set_config_internal+0x64/0xf8
[   49.122746] [<ffffffc0003fa624>] drm_framebuffer_remove+0xe4/0x128
[   49.129171] [<ffffffc0003feaf8>] drm_mode_rmfb+0xc0/0x100
[   49.135420] [<ffffffc0003efba8>] drm_ioctl+0x258/0x4d0
[   49.140889] [<ffffffc0001b0388>] do_vfs_ioctl+0x338/0x5d0
[   49.145921] [<ffffffc0001b06a8>] SyS_ioctl+0x88/0xa0

It makes no sense to free the ctl without disabling all stages, so lets
just move them together to avoid the crash.

Signed-off-by: Rob Clark <robdclark@gmail.com>

drm/msm: workaround for missing irq on a306/8x16

Signed-off-by: Rob Clark <robdclark@gmail.com>

drm/msm: adreno a306 support

As found in apq8016 (used in DragonBoard 410c) and msm8916.

Note that numerically a306 is actually 307 (since a305c already claimed
306).  Nice and confusing.

Signed-off-by: Rob Clark <robdclark@gmail.com>

drm/msm: clarify downstream bus scaling

A few spots in the driver have support for downstream android
CONFIG_MSM_BUS_SCALING.  This is mainly to simplify backporting the
driver for various devices which do not have sufficient upstream
kernel support.  But the intentionally dead code seems to cause
some confusion.  Rename the #define to make this more clear.

Signed-off-by: Rob Clark <robdclark@gmail.com>

drm/msm/mdp4: Support NV12MT format in mdp4

Using fb modifier flag, support NV12MT format in MDP4.

v2:
- rework the modifier's description [Daniel Vetter's comment]
- drop .set_mode_config() callback [Rob Clark's comment]
v3:
- change VENDOR's name and restrict usage to NV12 [pointed by Daniel]

Signed-off-by: Rob Clark <robdclark@gmail.com>

drm/msm: update generated headers

Signed-off-by: Rob Clark <robdclark@gmail.com>

drm/msm: add missing DRIVER_ATOMIC flag

Somehow this got lost when msm atomic support was first merged.

Signed-off-by: Rob Clark <robdclark@gmail.com>

drm/msm/adreno: dump scratch regs and other info on hang

Dump a bit more info when the GPU hangs, without having hang_debug
enabled (which dumps a *lot* of registers).  Also dump the scratch
registers, as they are useful for determining where in the cmdstream
the GPU hung (and they seem always safe to read when GPU has hung).

Note that the freedreno gallium driver emits increasing counter values
to SCRATCH6 (to identify tile #) and SCRATCH7 (to identify draw #), so
these two in particular can be used to "triangulate" where in the
cmdstream the GPU hung.

Signed-off-by: Rob Clark <robdclark@gmail.com>

drm/virtio: remove some dead code

The goto is correct, and we never reach the return statement so just
delete the dead code.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/virtio: checking for NULL instead of IS_ERR

virtio_gpu_alloc_object() returns an error pointer, it never returns
NULL.

Fixes: dc5698e80cf7 ('Add virtio gpu driver.')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

Merge branch 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux into drm-next

More fixes for amdgpu for 4.2.  We've integrated Jerome's comments
about the interface among other things.  I'll be on vacation next week
so Christian will be handling any updates next week.

* 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux: (23 commits)
  drm/amdgpu: fix a amdgpu_dpm=0 bug
  drm/amdgpu: don't enable/disable display twice on suspend/resume
  drm/amdgpu: fix UVD/VCE VM emulation
  drm/amdgpu: enable vce powergating
  drm/amdgpu/iceland: don't call smu_init on resume
  drm/amdgpu/tonga: don't call smu_init on resume
  drm/amdgpu/cz: don't call smu_init on resume
  drm/amdgpu: update to latest gfx8 golden register settings
  drm/amdgpu: whitespace cleanup in gmc8 golden regs
  drm/admgpu: move XDMA golden registers to dce code
  drm/amdgpu: fix the build on big endian
  drm/amdgpu: cleanup UAPI comments
  drm/amdgpu: remove AMDGPU_CTX_OP_STATE_RUNNING
  drm/amdgpu: remove the VI hardware semaphore in ring sync
  drm/amdgpu: set the gfx config properly for all CZ variants (v2)
  drm/amdgpu: also print the pci revision when printing the pci ids
  drm/amdgpu: cleanup VA IOCTL
  drm/amdgpu: fix saddr handling in amdgpu_vm_bo_unmap
  drm/amdgpu: fix amdgpu_vm_bo_map
  drm/amdgpu: remove unused AMDGPU_IB_FLAG_GDS
  ...

drm/amdgpu: fix a amdgpu_dpm=0 bug

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: don't enable/disable display twice on suspend/resume

We were doing it in the common code and in the IP specific code.
Remove the IP specific code.  The common code handles the
ordering properly.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: fix UVD/VCE VM emulation

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: enable vce powergating

Enable VCE dpm and powergating. VCE dpm dynamically scales the VCE clocks on
demand.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu/iceland: don't call smu_init on resume

smu_init allocates buffers and initializes them.  It does not
touch the hw.  There is no need to do it again on resume.  It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.

Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/tonga: don't call smu_init on resume

smu_init allocates buffers and initializes them.  It does not
touch the hw.  There is no need to do it again on resume.  It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.

Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/cz: don't call smu_init on resume

smu_init allocates buffers and initializes them.  It does not
touch the hw.  There is no need to do it again on resume.  It
should really be part of sw_init (and smu_fini should be part
of sw_fini), but we need the firmware sizes from the other IPs
for firmware loading so we have to wait until sw init is done
for all other IPs.

Reviewed-by: Sonny Jiang <Sonny.Jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: update to latest gfx8 golden register settings

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: whitespace cleanup in gmc8 golden regs

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/admgpu: move XDMA golden registers to dce code

Already moved other display registers.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: fix the build on big endian

Some leftover copy and pastes from radeon that never
got updated.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: cleanup UAPI comments

No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: remove AMDGPU_CTX_OP_STATE_RUNNING

Not used.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: remove the VI hardware semaphore in ring sync

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: set the gfx config properly for all CZ variants (v2)

Need to adjust the number of CUs and RBs.

v2: get proper values

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: also print the pci revision when printing the pci ids

The driver makes use of this information so print if to aid in
debugging.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Samuel Li <samuel.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: cleanup VA IOCTL

Remove the unnecessary returned status and make the IOCTL write only.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: fix saddr handling in amdgpu_vm_bo_unmap

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: fix amdgpu_vm_bo_map

We need to reset the bo_va address, otherwise new mappings
wouldn't be updated in the page table.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: remove unused AMDGPU_IB_FLAG_GDS

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: disable user fence interrupt (v2)

amdgpu submits both kernel and user fences, but just need one interrupt,
disable user fence interrupt and don't effect user fence.

v2: fix merge error

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: fix user ptr race condition

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: monk liu <monk.liu@amd.com>

drm/amdgpu: add zero timeout check in amdgpu_fence_wait_seq_timeout

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>

virtgpu: include linux/types.h to avoid warning.

Signed-off-by: Dave Airlie <airlied@redhat.com>

Merge branch 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux into drm-next

This is the big pull request for amdgpu, the new driver for VI+ AMD
asics.  I currently supports Tonga, Iceland, and Carrizo and also
contains a Kconfig option to build support for CI parts for testing.

All major functionality is supported (displays, gfx, compute, dma,
video decode/encode, etc.).  Power management is working on Carrizo,
but is still being worked on for Tonga and Iceland.

* 'drm-next-4.2-amdgpu' of git://people.freedesktop.org/~agd5f/linux: (106 commits)
  drm/amdgpu: only support IBs in the buffer list (v2)
  drm/amdgpu: add vram_type and vram_bit_width for interface query (v2)
  drm/amdgpu: add ib_size/start_alignment interface query
  drm/amdgpu: add me/ce/pfp_feature_version interface query
  drm/amdgpu add ce_ram_size for interface query
  drm/amdgpu add max_memory_clock for interface query (v2)
  drm/amdgpu: add hdp flush for gfx8 compute ring
  drm/amdgpu: fix no hdp flush for compute ring
  drm/amdgpu: add HEVC/H.265 UVD support
  drm/amdgpu: stop loading firmware with pm.mutex locked
  drm/amdgpu: remove mclk_lock
  drm/amdgpu: fix description of vm_size module parameter (v2)
  drm/amdgpu: remove all sh mem register modification in vm flush
  drm/amdgpu: rename GEM_OP_SET_INITIAL_DOMAIN -> GEM_OP_SET_PLACEMENT
  drm/amdgpu: fence should be added to shared slot
  drm/amdgpu: sync fence of clear_invalids (v2)
  drm/amdgpu: max_pde_used usage should be under protect
  drm/amdgpu: fix bug of vm_bo_map (v2)
  drm/amdgpu: implement the allocation range (v3)
  drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)
  ...

drm/qxl: Propagate correctly errors from qxlhw_handle_to_bo

This function could return a NULL pointer in case of handle not
present and in case of out of memory conditions however caller
function always returned EINVAL error hiding a possible ENOMEM.
This patch change the function to return the error instead to
be able to propagate the error instead of assuming EINVAL.

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/qxl: Simplify cleaning qxl processing command

In qxlhw_handle_to_bo we incremented counters twice, one time for release object
and one for reloc_info.
In the main function however reloc_info references was drop much earlier than
release so keeping the pointer only on release is safe and make cleaning
process easier.

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/qxl: Move main reference counter to GEM object instead of TTM ones

qxl_bo structure has two reference counters, one in the GEM object and
another in the TTM object. The GEM object keep a counter to the TTM object
so when GEM counter reached zero the TTM counter (using qxl_bo_unref) was
decremented. The qxl object is fully freed (both GEM and TTM part are cleaned)
when the TTM counter reach zero.
One issue was that surface idr structure has no owning on qxl_bo objects however
it contains a pointer to qxl_bo object. This caused some nasty race condition
for instance qxl_bo object was reaped even after counter was already zero.
This patch fix these races moving main counter (the one used by qxl_bo_(un)ref)
to GEM object which cleanup routine (qxl_gem_object_free) remove the idr pointer
(using qxl_surface_evict) when the counters are still valid.

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/qxl: Remove format string errors

Enable format string checks for qxl_io_log and remove resulting warnings
which could lead to memory errors on different platform or just printing
wrong information.

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/qxl: Handle correctly failures in qxl_alloc_relase_reserved

Free resources correctly if function fails

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/qxl: Fix return for qxl_release_alloc

This function return handle to allocated release object which is an int.

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/qxl: Handle all errors in qxl_surface_evict

Only EBUSY error was handled. This could cause code to believe
reserve was successful while it failed.

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/qxl: Avoid double free on error

Is we are not able to get source bo object from handle we free
destination bo object and call cleanup code however destination
object was already inserted in reloc_info array (num_relocs was
already incremented) so on cleanup we free destination again.

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/qxl: Fix print statement not using uninitialized variable

reloc_info[i] is not still initialized in the print statement.

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/qxl: Do not leak memory if qxl_release_list_add fails

If the function fails reference counter to the object is not decremented
causing leaks.
This is hard to spot as it happens only on very low memory situations.

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Cc: stable@vger.kernel.org
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/qxl: Do not cause spice-server to clean our objects

If objects are moved back from system memory to VRAM (and spice id
created again) memory is already initialized so we need to set flag
to not clear memory.
If you don't do it after a while using desktop many images turns to
black or transparents.

Signed-off-by: Frediano Ziglio <fziglio@redhat.com>
Cc: stable@vger.kernel.org
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/amdgpu: only support IBs in the buffer list (v2)

amdgpu_cs_find_mapping doesn't work without all buffers being validated,
so the TTM validation must be done first.

v2: only use amdgpu_cs_find_mapping for UVD/VCE VM emulation

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: add vram_type and vram_bit_width for interface query (v2)

Track the type of vram on the board and provide a query for it.
User mode drivers and tools want this information for determining
bandwidth information and form informational purposes.

v2: fix build when CI support is not enabled

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>

drm/amdgpu: add ib_size/start_alignment interface query

Query the IB alignment requirements from the kernel rather
than hardcoding them in the user mode drivers.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>

drm/amdgpu: add me/ce/pfp_feature_version interface query

Provide this information to usermode drivers.  We were previously
missing this info.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>

drm/amdgpu add ce_ram_size for interface query

Add a query for the CE ram size.  User mode drivers
will want to use this to determine how much size
of the cache on the CE.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>

drm/amdgpu add max_memory_clock for interface query (v2)

Add a query for the max memory clock.

v2: handle the dpm enabled case properly

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>

drm/amdgpu: add hdp flush for gfx8 compute ring

We had forgotten to register the callback.

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: jammy zhou <jammy.zhou@amd.com>

drm/amdgpu: fix no hdp flush for compute ring

No pfp on compute.

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: add HEVC/H.265 UVD support

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: stop loading firmware with pm.mutex locked

Loading firmware is a rather complicated process, in the end we add a
dependency between the pm mutex and the mm semaphore which results in
a harmless but annoying error message.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>

drm/amdgpu: remove mclk_lock

Not needed any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: fix description of vm_size module parameter (v2)

default is 8GB, not 4GB.

v2: fix fallback setting when the user provides an invalid input

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: remove all sh mem register modification in vm flush

Leave that at the values set during init.  No need to update
them repeatedly.

Signed-off-by: monk.liu <monk.liu@amd.com>
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>

drm/amdgpu: rename GEM_OP_SET_INITIAL_DOMAIN -> GEM_OP_SET_PLACEMENT

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: fence should be added to shared slot

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: jammy zhou <jammy.zhou@amd.com>

drm/amdgpu: sync fence of clear_invalids (v2)

bo_va may un-initialized, fix it.

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>

drm/amdgpu: max_pde_used usage should be under protect

Need to take the lock when accessing this.

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>

drm/amdgpu: fix bug of vm_bo_map (v2)

call reservation_object_reserve_shared before amdgpu_bo_fence

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>

drm/amdgpu: implement the allocation range (v3)

Pass a ttm_placement pointer to amdgpu_bo_create_restricted
add min_offset to amdgpu_bo_pin_restricted.  This makes it
easier to allocate memory with address restrictions.  With
this patch we can also enable 2-ended allocation again.

v2: fix rebase conflicts
v3: memset placements before using

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)

The structure is renamed and moved to amd_shared.h to make
the component independent.  This makes it easier to add
new components in the future.

v2: fix include path

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: drop allocation flag masks

Not needed any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>

drm/amdgpu: drop AMDGPU_FENCE_SIGNALED_SEQ

It's causing issues with VMID handling and comparing the
fence value two times actually doesn't make handling faster.

Port of radeon commit "d6d5c5b8364bcc4d52cddc68bcb0a330d2af20f3".

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>

drm/amdgpu: port fault_reserve_notify changes from radeon

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: enable uvd dpm and powergating

Enable UVD dpm (dynamic power management) and powergating.  UVD dpm dynamically scales the UVD
clocks on demand.  Powergating turns off the power to the block when it's not in use.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: implement VCE two instances support

VCE 3.0 has two indentical instances in the engine, they share
the same registers name in differrent memory block distinguished
by the grbm_gfx_index, we set to master instance after init, it
will dispatch task to slave instance. These two instances will
share the same firmware, but have their own stacks and heaps.

v2: add mutex for using grbm_gfx_index

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: recalculate VCE firmware BO size

Firmware required BO size changes in terms of ASIC family

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: remove unused TRACE_SYSTEM_STRING define

Port of 77cb2fea1e5fc4b083dd967f231bbf6edd96150e to
amdgpu.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: rework tiling flags

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: don't set unused tiling flags

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: actually use the VM map parameters

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: validate amdgpu_vm_bo_map parameters

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: enforce AMDGPU_GEM_CREATE_NO_CPU_ACCESS

Deny user and kernel mapping if we said we never want to do so.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: retry dcpd fetch

Retry the dpcd fetch several times.  Some eDP panels
fail several times before the fetch is successful.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=73530

Ported from radeon.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: simplify DPCD debug output

Use %*ph rather than walking the array.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: make some DP parameters const

Ported from similar radeon patch.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: take the mode_config mutex when handling hpds

Since we may modify display state.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: add and implement the GPU reset status query

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>

drm/amdgpu: add some new tonga pci ids

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: add new bonaire pci id

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: rewording some left radeons

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: switch to amdgpu folder for firmware files v2

v2: keep using radeon folder for CIK

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: do necessary NULL check

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: expose the max virtual address

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: fix context switch

Properly protect the state and also handle submission failures.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>

drm/amdgpu: fix dereference before check

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>

drm/amdgpu: cleanup HDP flush handling

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>

drm/amdgpu: always emit GDS switch

Otherwise a process can access the GDS data of another process.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>

drm/amdgpu: add CE preamble flag v3

The CE preamble IB can be dropped for the same context

v2: use the flags directly
v3: remove 'CE' for potential preamble usage by other rings

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: add flags for amdgpu_ib structure

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: check context id for context switching (v2)

check the filp is not robust, and sometimes different contexts may
have same filp value.

v2: check both filp and ctx_id

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

drm/amdgpu: add ctx_id to the WAIT_CS IOCTL (v4)

It is required to support fence per context.

v2: add amdgpu_ctx_get/put
v3: improve get/put
v4: squash hlock fix

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>