GitHub/moto-9609/android_kernel_motorola_exynos9610.git
10 years agodrm/cirrus: allow 32bpp framebuffers for cirrus drm
Zach Reizner [Wed, 29 Oct 2014 18:04:24 +0000 (11:04 -0700)]
drm/cirrus: allow 32bpp framebuffers for cirrus drm

This patch allows framebuffers for cirrus to be created with
32bpp pixel formats provided that they do not violate certain
restrictions of the cirrus hardware.

v2: Use pci resource length for vram size.

Signed-off-by: Zach Reizner <zachr@google.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/udl: add support to export a handle to a FD on UDL.
Haixia Shi [Thu, 13 Nov 2014 02:33:53 +0000 (18:33 -0800)]
drm/udl: add support to export a handle to a FD on UDL.

Only importing an FD to a handle is currently supported on UDL,
but the exporting functionality is equally useful.

Signed-off-by: Haixia Shi <hshi@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/udl: add cache flags definitions for udl_gem_object
Haixia Shi [Thu, 13 Nov 2014 02:33:52 +0000 (18:33 -0800)]
drm/udl: add cache flags definitions for udl_gem_object

By default set udl_gem_object as cacheable, but set WC flag when attaching
dmabuf. In udl_gem_mmap() update cache attributes based on the flags, similar
to exynos_drm_gem_mmap().

Signed-off-by: Haixia Shi <hshi@chromium.org>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Reviewed-by: Olof Johansson <olofj@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/cirrus: fix leaky driver load error handling
Zach Reizner [Tue, 18 Nov 2014 01:19:41 +0000 (17:19 -0800)]
drm/cirrus: fix leaky driver load error handling

Before this patch, cirrus_device_init could have failed while
cirrus_mm_init succeeded and the driver would have reported overall
success on load. This patch causes cirrus_device_init to return on
the first error encountered.

Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/atomic_helper: Make it clear that commit_planes gets the old state
Daniel Vetter [Wed, 19 Nov 2014 17:38:11 +0000 (18:38 +0100)]
drm/atomic_helper: Make it clear that commit_planes gets the old state

Oversight from my kerneldoc cleanup when doing the original atomic
helper series - I've only applied this clarification to the modeset
related helpers, and not the plane update code. Remedy this asap.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: s/enum_blob_list/enum_list/ in drm_property
Daniel Vetter [Wed, 19 Nov 2014 17:38:10 +0000 (18:38 +0100)]
drm: s/enum_blob_list/enum_list/ in drm_property

I guess for hysterical raisins this was meant to be the way to read
blob properties. But that's done with the two-stage approach which
uses separate blob kms object and the special-purpose get_blob ioctl.

Shipping userspace seems to have never relied on this, and the kernel
also never put any blob thing onto that property. And nowadays it
would blow up, e.g. in drm_property_destroy. Also it makes no sense to
return values in an ioctl that only returns metadata about everything.

So let's ditch all the internal code for the blob list, rename the
list to be unambiguous and sprinkle comments all over the place to
explain this peculiar piece of api.

v2: Squash in fixup from Rob to remove now unused variables.

Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/crtc: Polish kerneldoc
Daniel Vetter [Wed, 19 Nov 2014 17:38:09 +0000 (18:38 +0100)]
drm/crtc: Polish kerneldoc

- Make it clear that it's a negative errno (more in line with
  everything else).
- Clean up the confusion around get_properties vs. getproperty ioctls:
  One reads per-obj property values, the other reads property
  metadata.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/atomic: Don't overrun the connector array when hotplugging
Daniel Vetter [Wed, 19 Nov 2014 17:38:08 +0000 (18:38 +0100)]
drm/atomic: Don't overrun the connector array when hotplugging

Yet another fallout from not considering DP MST hotplug. With the
previous patches we have stable indices, but it might still happen
that a connector gets added between when we allocate the array and
when we actually add a connector. Especially when we back off due to
ww mutex contention or similar issues.

So store the sizes of the arrays in struct drm_atomic_state and double
check them. We don't really care about races except that we want to
use a consistent value, so ACCESS_ONCE is all we need. And if we
indeed notice that we'd overrun the array then just give up and
restart the entire ioctl.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/atomic: Only destroy connector states with connection mutex held
Daniel Vetter [Wed, 19 Nov 2014 17:38:07 +0000 (18:38 +0100)]
drm/atomic: Only destroy connector states with connection mutex held

Otherwise the connector might have been unplugged and destroyed while
we didn't look. Yet another fallout from DP MST hotplugging that I
didn't consider.

To make sure we get this right add an appropriate WARN_ON to
drm_atomic_state_clear (obviously only when we actually have a state
to clear up). And reorder all the state_clear and backoff calls to
make it work out properly.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/atomic: Ensure that drm_connector_index is stable
Daniel Vetter [Wed, 19 Nov 2014 17:38:06 +0000 (18:38 +0100)]
drm/atomic: Ensure that drm_connector_index is stable

I've totally forgotten that with DP MST connectors can now be
hotplugged. And failed to adapt Rob's drm_atomic_state code (which
predates connector hotplugging) to the new realities.

The first step is to make sure that the connector indices used to
access the arrays of pointers are stable. The connection mutex gives
us enough guarantees for that, which means we won't unecessarily block
on concurrent modesets or background probing.

So add a locking WARN_ON and shuffle the code slightly to make sure we
always hold the right lock.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/irq: BUG_ON() -> WARN_ON()
Rob Clark [Sat, 8 Nov 2014 15:16:19 +0000 (10:16 -0500)]
drm/irq: BUG_ON() -> WARN_ON()

Let's make things a bit easier to debug when things go bad (potentially
under console_lock).

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/ttm: Avoid memory allocation from shrinker functions.
Tetsuo Handa [Thu, 13 Nov 2014 13:43:23 +0000 (22:43 +0900)]
drm/ttm: Avoid memory allocation from shrinker functions.

Andrew Morton wrote:
> On Wed, 12 Nov 2014 13:08:55 +0900 Tetsuo Handa <penguin-kernel@i-love.sakura.ne.jp> wrote:
>
> > Andrew Morton wrote:
> > > Poor ttm guys - this is a bit of a trap we set for them.
> >
> > Commit a91576d7916f6cce ("drm/ttm: Pass GFP flags in order to avoid deadlock.")
> > changed to use sc->gfp_mask rather than GFP_KERNEL.
> >
> > -       pages_to_free = kmalloc(npages_to_free * sizeof(struct page *),
> > -                       GFP_KERNEL);
> > +       pages_to_free = kmalloc(npages_to_free * sizeof(struct page *), gfp);
> >
> > But this bug is caused by sc->gfp_mask containing some flags which are not
> > in GFP_KERNEL, right? Then, I think
> >
> > -       pages_to_free = kmalloc(npages_to_free * sizeof(struct page *), gfp);
> > +       pages_to_free = kmalloc(npages_to_free * sizeof(struct page *), gfp & GFP_KERNEL);
> >
> > would hide this bug.
> >
> > But I think we should use GFP_ATOMIC (or drop __GFP_WAIT flag)
>
> Well no - ttm_page_pool_free() should stop calling kmalloc altogether.
> Just do
>
>  struct page *pages_to_free[16];
>
> and rework the code to free 16 pages at a time.  Easy.

Well, ttm code wants to process 512 pages at a time for performance.
Memory footprint increased by 512 * sizeof(struct page *) buffer is
only 4096 bytes. What about using static buffer like below?
----------
>From d3cb5393c9c8099d6b37e769f78c31af1541fe8c Mon Sep 17 00:00:00 2001
From: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Date: Thu, 13 Nov 2014 22:21:54 +0900
Subject: [PATCH] drm/ttm: Avoid memory allocation from shrinker functions.

Commit a91576d7916f6cce ("drm/ttm: Pass GFP flags in order to avoid
deadlock.") caused BUG_ON() due to sc->gfp_mask containing flags
which are not in GFP_KERNEL.

  https://bugzilla.kernel.org/show_bug.cgi?id=87891

Changing from sc->gfp_mask to (sc->gfp_mask & GFP_KERNEL) would
avoid the BUG_ON(), but avoiding memory allocation from shrinker
function is better and reliable fix.

Shrinker function is already serialized by global lock, and
clean up function is called after shrinker function is unregistered.
Thus, we can use static buffer when called from shrinker function
and clean up function.

Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: stable <stable@kernel.org> [2.6.35+]
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: remove unnecessary sizeof(u8)
Fabian Frederick [Sun, 16 Nov 2014 10:21:25 +0000 (11:21 +0100)]
drm: remove unnecessary sizeof(u8)

sizeof(u8) is always 1.

Signed-off-by: Fabian Frederick <fabf@skynet.be>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: omapdrm: remove unused variable
Boris BREZILLON [Mon, 17 Nov 2014 10:21:08 +0000 (11:21 +0100)]
drm: omapdrm: remove unused variable

Commit f9b9faf6d94dd29eab8c128905c7d091f955481d "drm: flip-work: change
drm_flip_work_init prototype" changed the drm_flip_work_init prototype
to a void function, which makes 'ret' an unused variable.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agobochs: add page_flip
Gerd Hoffmann [Wed, 19 Nov 2014 11:28:12 +0000 (12:28 +0100)]
bochs: add page_flip

Implement crtc page_flip callback for bochsdrm.  The qemu stdvga has no
vblank signaling, so we have to fake it.  We do so by instantly calling
drm_send_vblank_event.  Tested with kmscon.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agobochs: fix bochsdrmfb mmap
Gerd Hoffmann [Wed, 19 Nov 2014 11:28:11 +0000 (12:28 +0100)]
bochs: fix bochsdrmfb mmap

Remove the mapping offset from the bo backing the fbdev framebuffer.
Wire up fbdev mmap function to map the backing bo using ttm_fbdev_mmap.
With that patch in place mmap(/dev/fb0) works as expected.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agobochs: add endian switching support
Gerd Hoffmann [Wed, 19 Nov 2014 11:28:10 +0000 (12:28 +0100)]
bochs: add endian switching support

Recently (qemu 2.2+) the qemu stdvga got a register to switch the vga
framebuffer endianness.  This patch adds code to explicitly set the
endianness of the framebuffer.  In most cases this has no effect as
the default is guest architecture endianness.  It is needed though in
case a architecture supports both big and little endian, i.e. for
ppc64le.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agobochs: little cleanup
Gerd Hoffmann [Wed, 19 Nov 2014 11:28:09 +0000 (12:28 +0100)]
bochs: little cleanup

Drop some leftover, commented code.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agoMerge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm...
Dave Airlie [Sun, 16 Nov 2014 20:36:53 +0000 (06:36 +1000)]
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next

Main pull for 3.19.  I may have another pull in a few days with some
mdp5 bits (and hopefully mdp5 atomic), but I figured there was no need
to hold up what we have already.  Main highlights so far:

1) a4xx gpu support (userspace gallium bits on mesa master)
2) mdp4/hdmi/core bits for atomic helpers.  Still missing mdp5
conversion, main hold up there is current hard-coded mixer setup isn't
clever enough to deal with disabling primary plane while crtc active.
3) various other misc cleanup/fixes/etc..

* 'msm-next' of git://people.freedesktop.org/~robclark/linux: (21 commits)
  drm/msm: a4xx support for msm-drm
  drm/msm: Handle register offset differences between a3xx and a4xx
  drm/msm: small mmap offset cleanups
  drm/msm/mdp4: atomic
  drm/msm/hdmi: atomic
  drm/msm: atomic core bits
  drm/msm: bit of fb error checking
  drm/msm: fb prepare/cleanup
  drm/msm: remove unused compile-test stub
  drm/msm: small fence cleanup
  drm/msm/mdp5: drop attached planes table
  drm/msm/mdp4: drop attached planes table
  drm/msm/mdp4: don't care about fb in crtc
  drm/msm/mdp5: drop private primary ptr
  drm/msm/mdp4: drop private primary ptr
  drm/msm: Fix fbdev for 16- and 24-bit modes.
  drm/msm: Allow exported dma-bufs to be mapped
  drm/msm/hdmi: refactor bind/init
  drm/msm: update generated headers
  drm/msm/adreno: slight init order cleanup
  ...

10 years agodrm/msm: a4xx support for msm-drm
Aravind Ganesan [Mon, 8 Sep 2014 19:40:16 +0000 (13:40 -0600)]
drm/msm: a4xx support for msm-drm

Added a4xx GPU support.

Signed-off-by: Aravind Ganesan <aravindg@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: Handle register offset differences between a3xx and a4xx
Aravind Ganesan [Mon, 8 Sep 2014 16:57:28 +0000 (10:57 -0600)]
drm/msm: Handle register offset differences between a3xx and a4xx

Register offsets have changed between a3xx and a4xx GPUs.
To be able access these registers in common code, we create
a lookup table, and set of read-write APIs to access the
register through the lookup table.

Signed-off-by: Aravind Ganesan <aravindg@codeaurora.org>
[robclark: remove REG_ADRENO_UNDEFINED, just use zero, and minor
tweaks for latest generated headers]
Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: small mmap offset cleanups
Rob Clark [Wed, 12 Nov 2014 20:25:50 +0000 (15:25 -0500)]
drm/msm: small mmap offset cleanups

Use pre-computed iova when unmapping, to reduce the places we assume iova
and mmap offset are (at the moment) the same.  And get rid of an extra
drm_gem_free_mmap_offset() call (since it is already called from
drm_gem_object_release())

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm/mdp4: atomic
Rob Clark [Sat, 8 Nov 2014 18:24:08 +0000 (13:24 -0500)]
drm/msm/mdp4: atomic

Convert mdp4 display controller backend to atomic helpers.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm/hdmi: atomic
Rob Clark [Sat, 8 Nov 2014 18:23:07 +0000 (13:23 -0500)]
drm/msm/hdmi: atomic

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: atomic core bits
Rob Clark [Sat, 8 Nov 2014 18:21:06 +0000 (13:21 -0500)]
drm/msm: atomic core bits

The core parts for async commit.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: bit of fb error checking
Rob Clark [Sat, 8 Nov 2014 14:20:28 +0000 (09:20 -0500)]
drm/msm: bit of fb error checking

It's a problem that can't happen yet, since we don't support any
multi-planar formats yet.  But let's avoid nasty surprises when the
time comes.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: fb prepare/cleanup
Rob Clark [Sat, 8 Nov 2014 14:13:37 +0000 (09:13 -0500)]
drm/msm: fb prepare/cleanup

Atomic wants to split the prepare/pin from where we actually program the
scanout address (so that any part that can fail is done synchronously).
Add some fb/gem apis to make this easier to use from the kms parts.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: remove unused compile-test stub
Rob Clark [Fri, 7 Nov 2014 23:11:02 +0000 (18:11 -0500)]
drm/msm: remove unused compile-test stub

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: small fence cleanup
Rob Clark [Fri, 7 Nov 2014 23:10:04 +0000 (18:10 -0500)]
drm/msm: small fence cleanup

Give ourselves a way to wait for certain fence #..  makes it easier to
wait on a set of bo's, which we'll need for atomic.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm/mdp5: drop attached planes table
Rob Clark [Wed, 12 Nov 2014 16:37:12 +0000 (11:37 -0500)]
drm/msm/mdp5: drop attached planes table

Simplify things a bit for atomic, gets rid of some bookkeeping, and
makes the code cleaner.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm/mdp4: drop attached planes table
Rob Clark [Fri, 7 Nov 2014 18:20:50 +0000 (13:20 -0500)]
drm/msm/mdp4: drop attached planes table

Simplify things a bit for atomic, gets rid of some bookkeeping, and
makes the code cleaner.

TODO move iterator macro somewhere common.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm/mdp4: don't care about fb in crtc
Rob Clark [Fri, 7 Nov 2014 18:06:54 +0000 (13:06 -0500)]
drm/msm/mdp4: don't care about fb in crtc

Since we are configuring things via MDP4_PIPE regs in the plane, it seems
like setting the dimensions of the primary plane on the OVLP/DMA regs in
crtc is unnecessary.  This will make life easier when we want to do a
nofb modeset.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm/mdp5: drop private primary ptr
Rob Clark [Wed, 12 Nov 2014 16:22:19 +0000 (11:22 -0500)]
drm/msm/mdp5: drop private primary ptr

Since primary-plane support in core, we can just use crtc->primary.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm/mdp4: drop private primary ptr
Rob Clark [Fri, 7 Nov 2014 18:04:51 +0000 (13:04 -0500)]
drm/msm/mdp4: drop private primary ptr

Since primary-plane support in core, we can just use crtc->primary.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: Fix fbdev for 16- and 24-bit modes.
Daniel Thompson [Fri, 17 Oct 2014 15:48:54 +0000 (16:48 +0100)]
drm/msm: Fix fbdev for 16- and 24-bit modes.

Currently forcing the video mode from the kernel command line (for example
video=HDMI-A-1:1280x720-16@60) does not correctly set the number of bits
per pixel. This is due to a rather aggressive override in
msm_fbdev_create(). This is a particular problem for Android bring up
because the software EGL fallbacks don't support 32bpp.

Since the overrides are actually the default values anyway then this
problem can be trivially fixed by removing the overrides completely.

Change was tested by dd'ing a test image to /dev/fb0 with no video=
(still 32bpp), video=1920x1080-32@60, video=1920x1080-24@60 and
video=1920x1080-16@60 .

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Cc: David Airlie <airlied@linux.ie>
Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: Allow exported dma-bufs to be mapped
Daniel Thompson [Wed, 12 Nov 2014 11:38:14 +0000 (11:38 +0000)]
drm/msm: Allow exported dma-bufs to be mapped

Currently msm does not implement gem_prime_mmap. Without this it is not
possible to draw onto a dma-buf from userspace (making its very hard to
implement the Android rendering model).

Fixing this is just a matter of adding a little boilerplate.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm/hdmi: refactor bind/init
Rob Clark [Tue, 4 Nov 2014 18:33:14 +0000 (13:33 -0500)]
drm/msm/hdmi: refactor bind/init

Split up hdmi_init() into hdmi_init() (done at hdmi sub-device
bind/probe time) and hdmi_modeset_init() done from master driver's
modeset_init().

Anything that can fail due to dependencies on other drivers which
may be missing or not probed yet should go in hdmi_init(), so that
devm error/cleanup paths work properly.

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: update generated headers
Rob Clark [Fri, 31 Oct 2014 16:54:25 +0000 (12:54 -0400)]
drm/msm: update generated headers

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm/adreno: slight init order cleanup
Rob Clark [Fri, 31 Oct 2014 15:50:55 +0000 (11:50 -0400)]
drm/msm/adreno: slight init order cleanup

Move anything that can fail after call to base class msm_gpu_init().
This way, if we fail, active_list has already been initialized so we
don't trip 'WARN_ON(!list_empty(&gpu->active_list))' in
msm_gpu_cleanup().

Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/msm: select REGULATOR
Rob Clark [Fri, 31 Oct 2014 16:19:40 +0000 (12:19 -0400)]
drm/msm: select REGULATOR

Fixes a potential error, spotted by Felipe with randconfig:

-----
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c: In function ‘mdp4_kms_init’:
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c:384:2: error: implicit declaration \
        of function ‘devm_regulator_get_exclusive’ [-Werror=implicit-function-declaration]
  mdp4_kms->vdd = devm_regulator_get_exclusive(&pdev->dev, "vdd");
  ^
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c:384:16: error: assignment makes \
        pointer from integer without a cast [-Werror]
  mdp4_kms->vdd = devm_regulator_get_exclusive(&pdev->dev, "vdd");
                ^
-----

Also add a brief comment explaining the use of _get_exclusive()

Reported-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
10 years agodrm/qxl: drop unused mode private pointer
Dave Airlie [Sat, 15 Nov 2014 00:15:30 +0000 (10:15 +1000)]
drm/qxl: drop unused mode private pointer

This was pointless, forgot to remove the code.

Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agoMerge tag 'drm/gem-cma/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux...
Dave Airlie [Fri, 14 Nov 2014 23:50:21 +0000 (09:50 +1000)]
Merge tag 'drm/gem-cma/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm: Sanitize DRM_IOCTL_MODE_CREATE_DUMB input

Some drivers erroneously treat the .pitch and .size fields of struct
drm_mode_create_dumb as inputs. While the include/uapi/drm/drm_mode.h
header has a comment denoting them as outputs, that seemingly wasn't
enough to make drivers use them properly.

The result is that some userspace doesn't explicitly zero out those
fields, assuming that the kernel won't use them. That causes problems
since the data within the structure might be uninitialized, so bogus
data may end up confusing drivers (ridiculously large values for the
pitch, ...).

This series attempts to improve the situation by fixing all drivers to
not use the output fields. Furthermore to spare new drivers this bad
surprise, the DRM core now zeros out these fields prior to handing the
data structure to the driver.

Lessons learned from this are that future IOCTLs should be properly
documented (in the DRM DocBook for example) and should be rigorously
defined. To prevent misuse like this, userspace should be required to
zero out all output fields. The kernel should check for this and fail
if that's not the case.

* tag 'drm/gem-cma/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux:
  drm/cma: Remove call to drm_gem_free_mmap_offset()
  drm: Sanitize DRM_IOCTL_MODE_CREATE_DUMB input
  drm/rcar: gem: dumb: pitch is an output
  drm/omap: gem: dumb: pitch is an output
  drm/cma: Introduce drm_gem_cma_dumb_create_internal()
  drm/doc: Add GEM/CMA helpers to kerneldoc
  drm/doc: mm: Fix indentation
  drm/gem: Fix a few kerneldoc typos

10 years agodrm/qxl: use suggested x/y offset properties to pass guest prefs
Dave Airlie [Tue, 28 Oct 2014 01:28:44 +0000 (11:28 +1000)]
drm/qxl: use suggested x/y offset properties to pass guest prefs

This passes the guest preferences for a where to place the
outputs through to userspace. Userspace would need to be updated
to take note of this information, X server and GNOME.

Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: add properties for suggested x/y offset for connectors. (v2)
Dave Airlie [Mon, 10 Nov 2014 00:18:15 +0000 (10:18 +1000)]
drm: add properties for suggested x/y offset for connectors. (v2)

Virtual GPUs would like to give the guest some indication where on the screen
the outputs are layed out. So far we only provide modes, these
properties could be exposed to userspace so the desktop environment
could use them as hints to set the correct offsets.

v2: rename properties to be more consistent.

Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: Simplify return value handling in drm_crtc.c
Daniel Vetter [Wed, 12 Nov 2014 10:59:47 +0000 (11:59 +0100)]
drm: Simplify return value handling in drm_crtc.c

While looking through drm_crtc.c to double-check make locking changes
I've noticed that there's a few other places that would now benefit
from simplified return value handling.

So let's flatten the control flow and replace and always 0 ret with 0
where possible.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agoMerge tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into...
Dave Airlie [Fri, 14 Nov 2014 23:38:55 +0000 (09:38 +1000)]
Merge tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm/tegra: Changes for v3.19-rc1

The highlights in this pull request are:

  * IOMMU support: The Tegra DRM driver can now deal with discontiguous
    buffers if an IOMMU exists in the system. That means it can allocate
    using drm_gem_get_pages() and will map them into IOVA space via the
    IOMMU API. Similarly, non-contiguous PRIME buffers can be imported
    from a different driver, which allows better integration with gk20a
    (nouveau) and less hacks.

  * Universal planes: This is precursory work for atomic modesetting and
    will allow hardware cursor support to be implemented on pre-Tegra114
    where RGB cursors were not supported.

  * DSI ganged-mode support: The DSI controller can now gang up with a
    second DSI controller to drive high resolution DSI panels.

Besides those bigger changes there is a slew of fixes, cleanups, plugged
memory leaks and so on.

* tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux: (44 commits)
  drm/tegra: gem: Check before freeing CMA memory
  drm/tegra: fb: Add error codes to error messages
  drm/tegra: fb: Properly release GEM objects on failure
  drm/tegra: Detach panel when a connector is removed
  drm/tegra: Plug memory leak
  drm/tegra: gem: Use more consistent data types
  drm/tegra: fb: Do not destroy framebuffer
  drm/tegra: gem: dumb: pitch and size are outputs
  drm/tegra: Enable the hotplug interrupt only when necessary
  drm/tegra: dc: Universal plane support
  drm/tegra: dc: Registers are 32 bits wide
  drm/tegra: dc: Factor out DC, window and cursor commit
  drm/tegra: Add IOMMU support
  drm/tegra: Fix error handling cleanup
  drm/tegra: gem: Use dma_mmap_writecombine()
  drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()
  drm/tegra: gem: Cleanup tegra_bo_create_with_handle()
  drm/tegra: gem: Extract tegra_bo_alloc_object()
  drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
  drm/tegra: dsi: Replace 1000000 by USEC_PER_SEC
  ...

10 years agoMerge tag 'drm/fixes/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into...
Dave Airlie [Fri, 14 Nov 2014 23:37:20 +0000 (09:37 +1000)]
Merge tag 'drm/fixes/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm: Miscellaneous fixes for v3.19-rc1

This is a small collection of fixes that I've been carrying around for a
while now. Many of these have been posted and reviewed or acked. The few
that haven't I deemed too trivial to bother.

* tag 'drm/fixes/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux:
  video/hdmi: Relicense header under MIT license
  drm/gma500: mdfld: Reuse video/mipi_display.h
  drm: Make drm_mode_create_tv_properties() signature consistent
  drm: Implement drm_get_pci_dev() dummy for !PCI
  drm/prime: Use unsigned type for number of pages
  drm/gem: Fix typo in kerneldoc
  drm: Use const data when creating blob properties
  drm: Use size_t for blob property sizes

10 years agoMerge tag 'drm/panel/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into...
Dave Airlie [Fri, 14 Nov 2014 23:36:13 +0000 (09:36 +1000)]
Merge tag 'drm/panel/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm/panel: Changes for v3.19-rc1

This contains support for a couple of new panels, updates for some GPIO
API changes and a bunch of updates to the MIPI DSI support that should
make it easier to write panel drivers in the future.

* tag 'drm/panel/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux: (31 commits)
  drm/panel: Add Sharp LQ101R1SX01 support
  drm/dsi: Do not require .owner field to be set
  drm/dsi: Resolve MIPI DSI device from phandle
  drm/dsi: Implement DCS set_{column,page}_address commands
  drm/dsi: Implement DCS {get,set}_pixel_format commands
  drm/dsi: Implement DCS get_power_mode command
  drm/dsi: Implement DCS soft_reset command
  drm/dsi: Implement DCS nop command
  drm/dsi: Add to DocBook documentation
  drm/dsi: Implement some standard DCS commands
  drm/dsi: Implement generic read and write commands
  drm/panel: s6e8aa0: Use standard MIPI DSI function
  drm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helper
  drm/dsi: Constify mipi_dsi_msg
  drm/dsi: Make mipi_dsi_dcs_{read,write}() symmetrical
  drm/dsi: Add DSI transfer helper
  drm/dsi: Add message to packet translator
  drm/dsi: Introduce packet format helpers
  drm/panel: s6e8aa0: Fix build warnings on 64-bit
  drm/panel: ld9040: Fix build warnings on 64-bit
  ...

10 years agoMerge tag 'drm-intel-next-2014-11-07-fixups' of git://anongit.freedesktop.org/drm...
Dave Airlie [Fri, 14 Nov 2014 23:33:40 +0000 (09:33 +1000)]
Merge tag 'drm-intel-next-2014-11-07-fixups' of git://anongit.freedesktop.org/drm-intel into drm-next

- skl watermarks code (Damien, Vandana, Pradeep)
- reworked audio codec /eld handling code (Jani)
- rework the mmio_flip code to use the vblank evade logic and wait for rendering
  using the standard wait_seqno interface (Ander)
- skl forcewake support (Zhe Wang)
- refactor the chv interrupt code to use functions shared with vlv (Ville)
- prep work for different global gtt views (Tvrtko Ursulin)
- precompute the display PLL config before touching hw state (Ander)
- completely reworked panel power sequencer code for chv/vlv (Ville)
- pre work to split the plane update code into a prepare and commit phase
  (Gustavo Padovan)
- golden context for skl (Armin Reese)
- as usual tons of fixes and improvements all over

* tag 'drm-intel-next-2014-11-07-fixups' of git://anongit.freedesktop.org/drm-intel: (135 commits)
  drm/i915: Use correct pipe config to update pll dividers. V2
  drm/i915: Plug memory leak in intel_shared_dpll_start_config()
  drm/i915: Update DRIVER_DATE to 20141107
  drm/i915: Add gen to the gpu hang ecode
  drm/i915: Cache HPLL frequency on VLV/CHV
  Revert "drm/i915/vlv: Remove check for Old Ack during forcewake"
  drm/i915: Make mmio flip wait for seqno in the work function
  drm/i915: Make __wait_seqno non-static and rename to __i915_wait_seqno
  drm/i915: Move the .global_resources() hook call into modeset_update_crtc_power_domains()
  drm/i915/audio: add DOC comment describing HDA over HDMI/DP
  drm/i915: make pipe/port based audio valid accessors easier to use
  drm/i915/audio: add audio codec enable debug log for g4x
  drm/i915/audio: add audio codec disable on g4x
  drm/i915: enable audio codec after port
  drm/i915/audio: add vlv/chv/gen5-7 audio codec disable sequence
  drm/i915/audio: rewrite vlv/chv and gen 5-7 audio codec enable sequence
  drm/i915/skl: Enable Gen9 RC6
  drm/i915/skl: Gen9 Forcewake
  drm/i915/skl: Log the order in which we flush the pipes in the WM code
  drm/i915/skl: Flush the WM configuration
  ...

10 years agodrm/dp/mst: Handle invalid link bandwidth from DPCD gracefully
Chris Wilson [Wed, 12 Nov 2014 10:13:37 +0000 (10:13 +0000)]
drm/dp/mst: Handle invalid link bandwidth from DPCD gracefully

Don't BUG out if the link reports an invalid (or plain unknown)
bandwidth value, but report the failure and fail gracefully.

Fixes a trivial compiler warning in case the BUG is ever compiled away.

Link: http://lkml.kernel.org/p/1415785566-12758-1-git-send-email-geert@linux-m68k.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/atomic: rip out unnecessary locking checks
Rob Clark [Fri, 14 Nov 2014 22:12:59 +0000 (17:12 -0500)]
drm/atomic: rip out unnecessary locking checks

For async commit, it is *intentional* that those locks are not held.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: flip-work: change drm_flip_work_init prototype
Boris BREZILLON [Fri, 14 Nov 2014 18:30:30 +0000 (19:30 +0100)]
drm: flip-work: change drm_flip_work_init prototype

Now that we're using lists instead of kfifo to store drm flip-work tasks
we do not need the size parameter passed to drm_flip_work_init function
anymore.
Moreover this function cannot fail anymore, we can thus remove the return
code.

Modify drm_flip_work_init users to take account of these changes.

[airlied: fixed two unused variable warnings]

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: rework flip-work helpers to avoid calling func when the FIFO is full
Boris BREZILLON [Fri, 14 Nov 2014 18:30:29 +0000 (19:30 +0100)]
drm: rework flip-work helpers to avoid calling func when the FIFO is full

Make use of lists instead of kfifo in order to dynamically allocate
task entry when someone require some delayed work, and thus preventing
drm_flip_work_queue from directly calling func instead of queuing this
call.
This allow drm_flip_work_queue to be safely called even within irq
handlers.

Add new helper functions to allocate a flip work task and queue it when
needed. This prevents allocating data within irq context (which might
impact the time spent in the irq handler).

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/i915: Use correct pipe config to update pll dividers. V2
Bob Paauwe [Tue, 11 Nov 2014 17:29:18 +0000 (09:29 -0800)]
drm/i915: Use correct pipe config to update pll dividers. V2

Use the new pipe config values to calculate the updated pll dividers.

This regression was introduced in

commit 0dbdf89f27b17ae1eceed6782c2917f74cbb5d59
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date:   Wed Oct 29 11:32:33 2014 +0200

    drm/i915: Add infrastructure for choosing DPLLs before disabling crtcs

and

commit 00d958817dd3daaa452c221387ddaf23d1e4c06f
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date:   Wed Oct 29 11:32:36 2014 +0200

    drm/i915: Covert remaining platforms to choose DPLLS before disabling CRTCs

v2: Use intel_pipe_will_have_type() to look at new configuration - Ander

Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
CC: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Tested-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
10 years agodrm/tegra: gem: Check before freeing CMA memory
Thierry Reding [Thu, 6 Nov 2014 13:41:31 +0000 (14:41 +0100)]
drm/tegra: gem: Check before freeing CMA memory

dma_free_writecombine() must not be called on a buffer that couldn't be
allocated. Check for a valid virtual address before attempting to free
the memory to avoid a crash.

Reported-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: fb: Add error codes to error messages
Thierry Reding [Thu, 6 Nov 2014 13:36:19 +0000 (14:36 +0100)]
drm/tegra: fb: Add error codes to error messages

This helps in determining what errors happened at specifics points in
the initialization sequence.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: fb: Properly release GEM objects on failure
Thierry Reding [Thu, 6 Nov 2014 13:33:19 +0000 (14:33 +0100)]
drm/tegra: fb: Properly release GEM objects on failure

When fbdev initialization fails, make sure to unreference the GEM
objects properly. Note that we can't do this in the general error
unwinding path because ownership of the GEM object references is
transferred to the framebuffer upon creation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Detach panel when a connector is removed
Thierry Reding [Tue, 4 Nov 2014 15:20:20 +0000 (16:20 +0100)]
drm/tegra: Detach panel when a connector is removed

When the DRM device is torn down and the connector is removed, make sure
to detach the panel to make sure there are no dangling pointers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Plug memory leak
Thierry Reding [Tue, 4 Nov 2014 15:17:55 +0000 (16:17 +0100)]
drm/tegra: Plug memory leak

Free the DRM device-private memory upon driver unload to make sure the
memory doesn't leak.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: Use more consistent data types
Thierry Reding [Mon, 3 Nov 2014 12:23:02 +0000 (13:23 +0100)]
drm/tegra: gem: Use more consistent data types

Use size_t consistently for sizes and u32/u64 instead of uint32_t and
uint64_t.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: fb: Do not destroy framebuffer
Thierry Reding [Tue, 21 Oct 2014 11:56:59 +0000 (13:56 +0200)]
drm/tegra: fb: Do not destroy framebuffer

Drop a reference instead of directly calling the framebuffer .destroy()
callback at fbdev free time. This is necessary to make sure the object
isn't destroyed if anyone else still has a reference.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: dumb: pitch and size are outputs
Thierry Reding [Thu, 30 Oct 2014 14:32:56 +0000 (15:32 +0100)]
drm/tegra: gem: dumb: pitch and size are outputs

When creating a dumb buffer object using the DRM_IOCTL_MODE_CREATE_DUMB
IOCTL, only the width, height, bpp and flags parameters are inputs. The
caller is not guaranteed to zero out or set handle, pitch and size, so
the driver must not treat these values as possible inputs.

Fixes a bug where running the Weston compositor on Tegra DRM would cause
an attempt to allocate a 3 GiB framebuffer to be allocated.

Fixes: de2ba664c30f ("gpu: host1x: drm: Add memory manager and fb")
Cc: stable@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Enable the hotplug interrupt only when necessary
Thierry Reding [Tue, 21 Oct 2014 12:00:09 +0000 (14:00 +0200)]
drm/tegra: Enable the hotplug interrupt only when necessary

The hotplug handling needs access to the DRM device, which only appears
at ->init() time. Disable interrupts up until that time. Similarly, when
an output is removed, disable the hotplug interrupt again because the
DRM device (and with it the hotplug infrastructure) is going away.

Also make sure to only access the DRM device if it's available. Given
the above change for the hotplug interrupt this should really never
happen, but the extra check doesn't hurt either.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dc: Universal plane support
Thierry Reding [Tue, 21 Oct 2014 11:51:53 +0000 (13:51 +0200)]
drm/tegra: dc: Universal plane support

This allows the primary plane and cursor to be exposed as regular
DRM/KMS planes, which is a prerequisite for atomic modesetting and gives
userspace more flexibility over controlling them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dc: Registers are 32 bits wide
Thierry Reding [Tue, 21 Oct 2014 11:48:48 +0000 (13:48 +0200)]
drm/tegra: dc: Registers are 32 bits wide

Using an unsigned long type will cause these variables to become 64-bit
on 64-bit SoCs. In practice this should always work, but there's no need
for carrying around the additional 32 bits.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dc: Factor out DC, window and cursor commit
Thierry Reding [Tue, 21 Oct 2014 11:41:46 +0000 (13:41 +0200)]
drm/tegra: dc: Factor out DC, window and cursor commit

The sequence to commit changes to the DC, window or cursor configuration
is repetitive and can be extracted into separate functions for ease of
use.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Add IOMMU support
Thierry Reding [Thu, 26 Jun 2014 19:41:53 +0000 (21:41 +0200)]
drm/tegra: Add IOMMU support

When an IOMMU device is available on the platform bus, allocate an IOMMU
domain and attach the display controllers to it. The display controllers
can then scan out non-contiguous buffers by mapping them through the
IOMMU.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Fix error handling cleanup
Thierry Reding [Thu, 6 Nov 2014 13:12:08 +0000 (14:12 +0100)]
drm/tegra: Fix error handling cleanup

The DRM driver's ->load() implementation didn't do a good job (no job at
all really) cleaning up on failure. Fix that by undoing any prior setup
when an error occurs. This requires a bit of rework to make it possible
to clean up fbdev midway.

This was tested by injecting errors at various points during the
initialization sequence and verifying that error cleanup didn't crash
and no memory leaked (using kmemleak).

Reported-by: Stéphane Marchesin <marcheu@chromium.org>
Reported-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: Use dma_mmap_writecombine()
Thierry Reding [Wed, 24 Sep 2014 14:14:04 +0000 (16:14 +0200)]
drm/tegra: gem: Use dma_mmap_writecombine()

Use the existing API rather than open-coding equivalent functionality
in the driver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()
Thierry Reding [Thu, 16 Oct 2014 12:23:36 +0000 (14:23 +0200)]
drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()

The drm_gem_object_release() function already performs this cleanup, so
there is no reason to do it explicitly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: Cleanup tegra_bo_create_with_handle()
Thierry Reding [Thu, 16 Oct 2014 12:22:50 +0000 (14:22 +0200)]
drm/tegra: gem: Cleanup tegra_bo_create_with_handle()

There is only a single location where the function needs to do cleanup.
Skip the error unwinding path and call the cleanup function directly
instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: Extract tegra_bo_alloc_object()
Thierry Reding [Thu, 16 Oct 2014 12:18:50 +0000 (14:18 +0200)]
drm/tegra: gem: Extract tegra_bo_alloc_object()

This function implements the common buffer object allocation used for
both allocation and import paths.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
Sean Paul [Tue, 7 Oct 2014 14:04:42 +0000 (16:04 +0200)]
drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier

Make sure the DSI PHY_TIMING and BTA_TIMING registers are initialized
when the clocks are set up as opposed to when the output is enabled.
This makes sure that the PHY timings are properly set up when the panel
is prepared and that DCS commands sent at that time use the appropriate
timings.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Replace 1000000 by USEC_PER_SEC
Thierry Reding [Thu, 13 Nov 2014 13:32:06 +0000 (14:32 +0100)]
drm/tegra: dsi: Replace 1000000 by USEC_PER_SEC

Using the symbolic constant instantly provides a lot more context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Replace 1000000000UL by NSEC_PER_SEC
Thierry Reding [Fri, 7 Nov 2014 16:17:41 +0000 (17:17 +0100)]
drm/tegra: dsi: Replace 1000000000UL by NSEC_PER_SEC

Using the symbolic constant instantly provides a lot more context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Implement host transfers
Thierry Reding [Fri, 7 Nov 2014 16:25:26 +0000 (17:25 +0100)]
drm/tegra: dsi: Implement host transfers

Add support for sending MIPI DSI command packets from the host to a
peripheral. This is required for panels that need configuration before
they accept video data.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Add ganged mode support
Thierry Reding [Tue, 7 Oct 2014 14:10:24 +0000 (16:10 +0200)]
drm/tegra: dsi: Add ganged mode support

Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Split out tegra_dsi_set_timeout()
Thierry Reding [Thu, 13 Nov 2014 13:50:33 +0000 (14:50 +0100)]
drm/tegra: dsi: Split out tegra_dsi_set_timeout()

In preparation for adding ganged-mode support, this commit splits out
the tegra_dsi_set_timeout() function so that it can be reused for the
slave DSI controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Add command mode support
Thierry Reding [Thu, 13 Nov 2014 14:02:46 +0000 (15:02 +0100)]
drm/tegra: dsi: Add command mode support

Add support for DC-driven command mode. This is a mode where the video
stream sent by the display controller is packed into DCS command packets
(write_memory_start and write_memory_continue) by the DSI controller. It
can be used for panels with a remote framebuffer and is useful to save
power when used with a dynamic refresh rate (not yet supported by the
driver).

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Refactor in preparation for command mode
Thierry Reding [Thu, 13 Nov 2014 13:44:27 +0000 (14:44 +0100)]
drm/tegra: dsi: Refactor in preparation for command mode

For command mode panels, the DSI controller needs to be enabled and
configured so that panel drivers can send commands prior to the video
stream being enabled.

Move code from the monolithic output enable/disable functions into
smaller, reusable units to allow more fine-grained control over the
controller state.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Properly cleanup on probe failure
Thierry Reding [Thu, 13 Nov 2014 13:58:27 +0000 (14:58 +0100)]
drm/tegra: dsi: Properly cleanup on probe failure

The driver wasn't even attempting to do any cleanup when probing failed.
Fix this by releasing any resources acquired up to the point of failure
and putting the device back into the original state (reset, clocks off).

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Mark connector hotpluggable
Thierry Reding [Thu, 13 Nov 2014 13:54:01 +0000 (14:54 +0100)]
drm/tegra: dsi: Mark connector hotpluggable

DSI panels can always be hotplugged via the DSI bus' attach/detach
infrastructure, so unconditionally mark the connector hotpluggable.

While at it, also make sure that when a panel is detached the connector
is marked unconnected before calling into the DRM hotplug helpers to
reflect the correct state.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Leave parent clock alone
Thierry Reding [Thu, 13 Nov 2014 13:34:50 +0000 (14:34 +0100)]
drm/tegra: dsi: Leave parent clock alone

The common clock framework will take care of preparing and enabling the
parent of the DSI clock automatically.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Do not manage clock on enable/disable
Thierry Reding [Thu, 13 Nov 2014 13:27:29 +0000 (14:27 +0100)]
drm/tegra: dsi: Do not manage clock on enable/disable

In preparation for supporting command mode panels, don't disable the
clock when the output is disabled. The output will be enabled only after
the panel has been programmed in command mode, so the clock must always
remain on.

As a side-effect, pad calibration now only needs to be done at driver
probe time, since neither power nor controller state will go away before
driver removal. While at it, use a 32-bit variable to store register
content because the registers are 32-bit even on 64-bit Tegra.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Make FIFO depths host parameters
Thierry Reding [Wed, 6 Aug 2014 07:14:28 +0000 (09:14 +0200)]
drm/tegra: dsi: Make FIFO depths host parameters

Rather than hardcoding them as macros, make the host and video FIFO
depths parameters so that they can be more easily adjusted if a new
generation of the Tegra SoC changes them.

While at it, set the depth of the video FIFO to the correct value of
1920 *words* rather than *bytes*.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: DPMS off/on in encoder prepare/commit
Sean Paul [Wed, 29 Oct 2014 19:33:35 +0000 (15:33 -0400)]
drm/tegra: DPMS off/on in encoder prepare/commit

Previously the panel and output were only enabled on encoder->dpms(). If
userspace called dpms on before doing a modeset, the driver would get into
a state where the connector had a dpms state of ON, but the encoder and output
were not enabled (because the encoder is not yet attached to the connector).
Subsequent dpms ON calls are ignored b/c the connector's state already matches
the desired state.

This patch enables/disables the panel and output on modeset as well, so we
can catch the above case.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Do not enable output on .mode_set()
Thierry Reding [Tue, 7 Oct 2014 14:26:24 +0000 (16:26 +0200)]
drm/tegra: Do not enable output on .mode_set()

The output is already enabled in .dpms(), doing it in .mode_set() too
can cause noticeable flicker.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dc: Add powergate support
Thierry Reding [Mon, 7 Jul 2014 13:32:53 +0000 (15:32 +0200)]
drm/tegra: dc: Add powergate support

Both display controllers are in their own power partition. Currently the
driver relies on the assumption that these partitions are on (which is
the hardware default). However some bootloaders may disable them, so the
driver must make sure to turn them back on to avoid hangs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register
Sean Paul [Wed, 10 Sep 2014 14:52:05 +0000 (10:52 -0400)]
gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register

During calibration, sets the "internal reference level for drive pull-
down" to the value specified in the Tegra TRM.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: mipi: Calibrate clock lanes
Sean Paul [Wed, 10 Sep 2014 14:52:04 +0000 (10:52 -0400)]
gpu: host1x: mipi: Calibrate clock lanes

Include the clock lanes when calibrating the MIPI PHY on Tegra124
compatible devices.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
[treding@nvidia.com: bikeshedding]
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: mipi: Preserve the contents of MIPI_CAL_CTRL
Sean Paul [Wed, 10 Sep 2014 14:52:03 +0000 (10:52 -0400)]
gpu: host1x: mipi: Preserve the contents of MIPI_CAL_CTRL

By paving the CTRL reg value, the current code changes MIPI_CAL_PRESCALE
("Auto-cal calibration step prescale") from 1us to 0.1us (val=0). In the
description for PHY's noise filter (MIPI_CAL_NOISE_FLT), the TRM states
that if the value of the prescale is 0 (or 0.1us), the filter should be
set between 2-5. However, the current code sets it to 0.

For now, let's keep the prescale and filter values as-is, which is most
likely the power-on-reset values of 0x2 and 0xa, respectively.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: mipi: Registers are 32 bits wide
Thierry Reding [Thu, 2 Oct 2014 12:33:31 +0000 (14:33 +0200)]
gpu: host1x: mipi: Registers are 32 bits wide

On 64-bit platforms an unsigned long would be 64 bit and cause
unnecessary casting when being passed to writel() or returned from
readl(). Make register values 32 bits wide to avoid that.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: Make gather offsets unsigned
Thierry Reding [Thu, 12 Jun 2014 11:26:19 +0000 (13:26 +0200)]
gpu: host1x: Make gather offsets unsigned

Use the u32 type for the offset in the host1x_job_gather structure for
consistentcy with other structures. Negative offsets don't make sense in
this context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: Print address/offset pairs consistently
Thierry Reding [Thu, 12 Jun 2014 11:24:17 +0000 (13:24 +0200)]
gpu: host1x: Print address/offset pairs consistently

Consistently use a format of %pad+%#x to print address/offset in debug
messages.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: Fix typo in comment
Thierry Reding [Thu, 12 Jun 2014 11:17:48 +0000 (13:17 +0200)]
gpu: host1x: Fix typo in comment

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: Make mapped field of push buffers void *
Thierry Reding [Thu, 12 Jun 2014 11:16:54 +0000 (13:16 +0200)]
gpu: host1x: Make mapped field of push buffers void *

This reduces the amount of casting that needs to be done to get rid of
annoying warnings on 64-bit builds.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: Use struct host1x_bo pointers in traces
Thierry Reding [Thu, 12 Jun 2014 11:14:50 +0000 (13:14 +0200)]
gpu: host1x: Use struct host1x_bo pointers in traces

Rather than cast to a u32 use the struct host1x_bo pointers directly.
This avoid annoying warnings for 64-bit builds.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Depend on COMMON_CLK
Thierry Reding [Thu, 16 Oct 2014 13:40:58 +0000 (15:40 +0200)]
drm/tegra: Depend on COMMON_CLK

The introduction of the COMPILE_TEST dependency in commit 158b50aefa14
(drm/tegra: Increase compile test coverage) removes the dependency on
COMMON_CLK (implicitly selected via ARCH_TEGRA, ARCH_MULTI_V7 and
ARCH_MULTIPLATFORM).

Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agoMerge branch 'drm/panel/for-next' into drm/tegra/for-next
Thierry Reding [Thu, 13 Nov 2014 15:09:48 +0000 (16:09 +0100)]
Merge branch 'drm/panel/for-next' into drm/tegra/for-next

10 years agodrm/panel: Add Sharp LQ101R1SX01 support
Thierry Reding [Fri, 1 Aug 2014 12:26:35 +0000 (14:26 +0200)]
drm/panel: Add Sharp LQ101R1SX01 support

This panel requires dual-channel mode. The device accepts command-mode
data on 8 lanes and will therefore need a dual-channel DSI controller.
The two interfaces that make up this device need to be instantiated in
the controllers that gang up to provide the dual-channel DSI host.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>