GitHub/moto-9609/android_kernel_motorola_exynos9610.git
10 years agodrm/qxl: use suggested x/y offset properties to pass guest prefs
Dave Airlie [Tue, 28 Oct 2014 01:28:44 +0000 (11:28 +1000)]
drm/qxl: use suggested x/y offset properties to pass guest prefs

This passes the guest preferences for a where to place the
outputs through to userspace. Userspace would need to be updated
to take note of this information, X server and GNOME.

Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: add properties for suggested x/y offset for connectors. (v2)
Dave Airlie [Mon, 10 Nov 2014 00:18:15 +0000 (10:18 +1000)]
drm: add properties for suggested x/y offset for connectors. (v2)

Virtual GPUs would like to give the guest some indication where on the screen
the outputs are layed out. So far we only provide modes, these
properties could be exposed to userspace so the desktop environment
could use them as hints to set the correct offsets.

v2: rename properties to be more consistent.

Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: Simplify return value handling in drm_crtc.c
Daniel Vetter [Wed, 12 Nov 2014 10:59:47 +0000 (11:59 +0100)]
drm: Simplify return value handling in drm_crtc.c

While looking through drm_crtc.c to double-check make locking changes
I've noticed that there's a few other places that would now benefit
from simplified return value handling.

So let's flatten the control flow and replace and always 0 ret with 0
where possible.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agoMerge tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into...
Dave Airlie [Fri, 14 Nov 2014 23:38:55 +0000 (09:38 +1000)]
Merge tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm/tegra: Changes for v3.19-rc1

The highlights in this pull request are:

  * IOMMU support: The Tegra DRM driver can now deal with discontiguous
    buffers if an IOMMU exists in the system. That means it can allocate
    using drm_gem_get_pages() and will map them into IOVA space via the
    IOMMU API. Similarly, non-contiguous PRIME buffers can be imported
    from a different driver, which allows better integration with gk20a
    (nouveau) and less hacks.

  * Universal planes: This is precursory work for atomic modesetting and
    will allow hardware cursor support to be implemented on pre-Tegra114
    where RGB cursors were not supported.

  * DSI ganged-mode support: The DSI controller can now gang up with a
    second DSI controller to drive high resolution DSI panels.

Besides those bigger changes there is a slew of fixes, cleanups, plugged
memory leaks and so on.

* tag 'drm/tegra/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux: (44 commits)
  drm/tegra: gem: Check before freeing CMA memory
  drm/tegra: fb: Add error codes to error messages
  drm/tegra: fb: Properly release GEM objects on failure
  drm/tegra: Detach panel when a connector is removed
  drm/tegra: Plug memory leak
  drm/tegra: gem: Use more consistent data types
  drm/tegra: fb: Do not destroy framebuffer
  drm/tegra: gem: dumb: pitch and size are outputs
  drm/tegra: Enable the hotplug interrupt only when necessary
  drm/tegra: dc: Universal plane support
  drm/tegra: dc: Registers are 32 bits wide
  drm/tegra: dc: Factor out DC, window and cursor commit
  drm/tegra: Add IOMMU support
  drm/tegra: Fix error handling cleanup
  drm/tegra: gem: Use dma_mmap_writecombine()
  drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()
  drm/tegra: gem: Cleanup tegra_bo_create_with_handle()
  drm/tegra: gem: Extract tegra_bo_alloc_object()
  drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
  drm/tegra: dsi: Replace 1000000 by USEC_PER_SEC
  ...

10 years agoMerge tag 'drm/fixes/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into...
Dave Airlie [Fri, 14 Nov 2014 23:37:20 +0000 (09:37 +1000)]
Merge tag 'drm/fixes/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm: Miscellaneous fixes for v3.19-rc1

This is a small collection of fixes that I've been carrying around for a
while now. Many of these have been posted and reviewed or acked. The few
that haven't I deemed too trivial to bother.

* tag 'drm/fixes/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux:
  video/hdmi: Relicense header under MIT license
  drm/gma500: mdfld: Reuse video/mipi_display.h
  drm: Make drm_mode_create_tv_properties() signature consistent
  drm: Implement drm_get_pci_dev() dummy for !PCI
  drm/prime: Use unsigned type for number of pages
  drm/gem: Fix typo in kerneldoc
  drm: Use const data when creating blob properties
  drm: Use size_t for blob property sizes

10 years agoMerge tag 'drm/panel/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into...
Dave Airlie [Fri, 14 Nov 2014 23:36:13 +0000 (09:36 +1000)]
Merge tag 'drm/panel/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux into drm-next

drm/panel: Changes for v3.19-rc1

This contains support for a couple of new panels, updates for some GPIO
API changes and a bunch of updates to the MIPI DSI support that should
make it easier to write panel drivers in the future.

* tag 'drm/panel/for-3.19-rc1' of git://people.freedesktop.org/~tagr/linux: (31 commits)
  drm/panel: Add Sharp LQ101R1SX01 support
  drm/dsi: Do not require .owner field to be set
  drm/dsi: Resolve MIPI DSI device from phandle
  drm/dsi: Implement DCS set_{column,page}_address commands
  drm/dsi: Implement DCS {get,set}_pixel_format commands
  drm/dsi: Implement DCS get_power_mode command
  drm/dsi: Implement DCS soft_reset command
  drm/dsi: Implement DCS nop command
  drm/dsi: Add to DocBook documentation
  drm/dsi: Implement some standard DCS commands
  drm/dsi: Implement generic read and write commands
  drm/panel: s6e8aa0: Use standard MIPI DSI function
  drm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helper
  drm/dsi: Constify mipi_dsi_msg
  drm/dsi: Make mipi_dsi_dcs_{read,write}() symmetrical
  drm/dsi: Add DSI transfer helper
  drm/dsi: Add message to packet translator
  drm/dsi: Introduce packet format helpers
  drm/panel: s6e8aa0: Fix build warnings on 64-bit
  drm/panel: ld9040: Fix build warnings on 64-bit
  ...

10 years agoMerge tag 'drm-intel-next-2014-11-07-fixups' of git://anongit.freedesktop.org/drm...
Dave Airlie [Fri, 14 Nov 2014 23:33:40 +0000 (09:33 +1000)]
Merge tag 'drm-intel-next-2014-11-07-fixups' of git://anongit.freedesktop.org/drm-intel into drm-next

- skl watermarks code (Damien, Vandana, Pradeep)
- reworked audio codec /eld handling code (Jani)
- rework the mmio_flip code to use the vblank evade logic and wait for rendering
  using the standard wait_seqno interface (Ander)
- skl forcewake support (Zhe Wang)
- refactor the chv interrupt code to use functions shared with vlv (Ville)
- prep work for different global gtt views (Tvrtko Ursulin)
- precompute the display PLL config before touching hw state (Ander)
- completely reworked panel power sequencer code for chv/vlv (Ville)
- pre work to split the plane update code into a prepare and commit phase
  (Gustavo Padovan)
- golden context for skl (Armin Reese)
- as usual tons of fixes and improvements all over

* tag 'drm-intel-next-2014-11-07-fixups' of git://anongit.freedesktop.org/drm-intel: (135 commits)
  drm/i915: Use correct pipe config to update pll dividers. V2
  drm/i915: Plug memory leak in intel_shared_dpll_start_config()
  drm/i915: Update DRIVER_DATE to 20141107
  drm/i915: Add gen to the gpu hang ecode
  drm/i915: Cache HPLL frequency on VLV/CHV
  Revert "drm/i915/vlv: Remove check for Old Ack during forcewake"
  drm/i915: Make mmio flip wait for seqno in the work function
  drm/i915: Make __wait_seqno non-static and rename to __i915_wait_seqno
  drm/i915: Move the .global_resources() hook call into modeset_update_crtc_power_domains()
  drm/i915/audio: add DOC comment describing HDA over HDMI/DP
  drm/i915: make pipe/port based audio valid accessors easier to use
  drm/i915/audio: add audio codec enable debug log for g4x
  drm/i915/audio: add audio codec disable on g4x
  drm/i915: enable audio codec after port
  drm/i915/audio: add vlv/chv/gen5-7 audio codec disable sequence
  drm/i915/audio: rewrite vlv/chv and gen 5-7 audio codec enable sequence
  drm/i915/skl: Enable Gen9 RC6
  drm/i915/skl: Gen9 Forcewake
  drm/i915/skl: Log the order in which we flush the pipes in the WM code
  drm/i915/skl: Flush the WM configuration
  ...

10 years agodrm/dp/mst: Handle invalid link bandwidth from DPCD gracefully
Chris Wilson [Wed, 12 Nov 2014 10:13:37 +0000 (10:13 +0000)]
drm/dp/mst: Handle invalid link bandwidth from DPCD gracefully

Don't BUG out if the link reports an invalid (or plain unknown)
bandwidth value, but report the failure and fail gracefully.

Fixes a trivial compiler warning in case the BUG is ever compiled away.

Link: http://lkml.kernel.org/p/1415785566-12758-1-git-send-email-geert@linux-m68k.org
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/atomic: rip out unnecessary locking checks
Rob Clark [Fri, 14 Nov 2014 22:12:59 +0000 (17:12 -0500)]
drm/atomic: rip out unnecessary locking checks

For async commit, it is *intentional* that those locks are not held.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: flip-work: change drm_flip_work_init prototype
Boris BREZILLON [Fri, 14 Nov 2014 18:30:30 +0000 (19:30 +0100)]
drm: flip-work: change drm_flip_work_init prototype

Now that we're using lists instead of kfifo to store drm flip-work tasks
we do not need the size parameter passed to drm_flip_work_init function
anymore.
Moreover this function cannot fail anymore, we can thus remove the return
code.

Modify drm_flip_work_init users to take account of these changes.

[airlied: fixed two unused variable warnings]

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm: rework flip-work helpers to avoid calling func when the FIFO is full
Boris BREZILLON [Fri, 14 Nov 2014 18:30:29 +0000 (19:30 +0100)]
drm: rework flip-work helpers to avoid calling func when the FIFO is full

Make use of lists instead of kfifo in order to dynamically allocate
task entry when someone require some delayed work, and thus preventing
drm_flip_work_queue from directly calling func instead of queuing this
call.
This allow drm_flip_work_queue to be safely called even within irq
handlers.

Add new helper functions to allocate a flip work task and queue it when
needed. This prevents allocating data within irq context (which might
impact the time spent in the irq handler).

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
10 years agodrm/i915: Use correct pipe config to update pll dividers. V2
Bob Paauwe [Tue, 11 Nov 2014 17:29:18 +0000 (09:29 -0800)]
drm/i915: Use correct pipe config to update pll dividers. V2

Use the new pipe config values to calculate the updated pll dividers.

This regression was introduced in

commit 0dbdf89f27b17ae1eceed6782c2917f74cbb5d59
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date:   Wed Oct 29 11:32:33 2014 +0200

    drm/i915: Add infrastructure for choosing DPLLs before disabling crtcs

and

commit 00d958817dd3daaa452c221387ddaf23d1e4c06f
Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Date:   Wed Oct 29 11:32:36 2014 +0200

    drm/i915: Covert remaining platforms to choose DPLLS before disabling CRTCs

v2: Use intel_pipe_will_have_type() to look at new configuration - Ander

Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
CC: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Tested-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
10 years agodrm/tegra: gem: Check before freeing CMA memory
Thierry Reding [Thu, 6 Nov 2014 13:41:31 +0000 (14:41 +0100)]
drm/tegra: gem: Check before freeing CMA memory

dma_free_writecombine() must not be called on a buffer that couldn't be
allocated. Check for a valid virtual address before attempting to free
the memory to avoid a crash.

Reported-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: fb: Add error codes to error messages
Thierry Reding [Thu, 6 Nov 2014 13:36:19 +0000 (14:36 +0100)]
drm/tegra: fb: Add error codes to error messages

This helps in determining what errors happened at specifics points in
the initialization sequence.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: fb: Properly release GEM objects on failure
Thierry Reding [Thu, 6 Nov 2014 13:33:19 +0000 (14:33 +0100)]
drm/tegra: fb: Properly release GEM objects on failure

When fbdev initialization fails, make sure to unreference the GEM
objects properly. Note that we can't do this in the general error
unwinding path because ownership of the GEM object references is
transferred to the framebuffer upon creation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Detach panel when a connector is removed
Thierry Reding [Tue, 4 Nov 2014 15:20:20 +0000 (16:20 +0100)]
drm/tegra: Detach panel when a connector is removed

When the DRM device is torn down and the connector is removed, make sure
to detach the panel to make sure there are no dangling pointers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Plug memory leak
Thierry Reding [Tue, 4 Nov 2014 15:17:55 +0000 (16:17 +0100)]
drm/tegra: Plug memory leak

Free the DRM device-private memory upon driver unload to make sure the
memory doesn't leak.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: Use more consistent data types
Thierry Reding [Mon, 3 Nov 2014 12:23:02 +0000 (13:23 +0100)]
drm/tegra: gem: Use more consistent data types

Use size_t consistently for sizes and u32/u64 instead of uint32_t and
uint64_t.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: fb: Do not destroy framebuffer
Thierry Reding [Tue, 21 Oct 2014 11:56:59 +0000 (13:56 +0200)]
drm/tegra: fb: Do not destroy framebuffer

Drop a reference instead of directly calling the framebuffer .destroy()
callback at fbdev free time. This is necessary to make sure the object
isn't destroyed if anyone else still has a reference.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: dumb: pitch and size are outputs
Thierry Reding [Thu, 30 Oct 2014 14:32:56 +0000 (15:32 +0100)]
drm/tegra: gem: dumb: pitch and size are outputs

When creating a dumb buffer object using the DRM_IOCTL_MODE_CREATE_DUMB
IOCTL, only the width, height, bpp and flags parameters are inputs. The
caller is not guaranteed to zero out or set handle, pitch and size, so
the driver must not treat these values as possible inputs.

Fixes a bug where running the Weston compositor on Tegra DRM would cause
an attempt to allocate a 3 GiB framebuffer to be allocated.

Fixes: de2ba664c30f ("gpu: host1x: drm: Add memory manager and fb")
Cc: stable@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Enable the hotplug interrupt only when necessary
Thierry Reding [Tue, 21 Oct 2014 12:00:09 +0000 (14:00 +0200)]
drm/tegra: Enable the hotplug interrupt only when necessary

The hotplug handling needs access to the DRM device, which only appears
at ->init() time. Disable interrupts up until that time. Similarly, when
an output is removed, disable the hotplug interrupt again because the
DRM device (and with it the hotplug infrastructure) is going away.

Also make sure to only access the DRM device if it's available. Given
the above change for the hotplug interrupt this should really never
happen, but the extra check doesn't hurt either.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dc: Universal plane support
Thierry Reding [Tue, 21 Oct 2014 11:51:53 +0000 (13:51 +0200)]
drm/tegra: dc: Universal plane support

This allows the primary plane and cursor to be exposed as regular
DRM/KMS planes, which is a prerequisite for atomic modesetting and gives
userspace more flexibility over controlling them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dc: Registers are 32 bits wide
Thierry Reding [Tue, 21 Oct 2014 11:48:48 +0000 (13:48 +0200)]
drm/tegra: dc: Registers are 32 bits wide

Using an unsigned long type will cause these variables to become 64-bit
on 64-bit SoCs. In practice this should always work, but there's no need
for carrying around the additional 32 bits.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dc: Factor out DC, window and cursor commit
Thierry Reding [Tue, 21 Oct 2014 11:41:46 +0000 (13:41 +0200)]
drm/tegra: dc: Factor out DC, window and cursor commit

The sequence to commit changes to the DC, window or cursor configuration
is repetitive and can be extracted into separate functions for ease of
use.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Add IOMMU support
Thierry Reding [Thu, 26 Jun 2014 19:41:53 +0000 (21:41 +0200)]
drm/tegra: Add IOMMU support

When an IOMMU device is available on the platform bus, allocate an IOMMU
domain and attach the display controllers to it. The display controllers
can then scan out non-contiguous buffers by mapping them through the
IOMMU.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Fix error handling cleanup
Thierry Reding [Thu, 6 Nov 2014 13:12:08 +0000 (14:12 +0100)]
drm/tegra: Fix error handling cleanup

The DRM driver's ->load() implementation didn't do a good job (no job at
all really) cleaning up on failure. Fix that by undoing any prior setup
when an error occurs. This requires a bit of rework to make it possible
to clean up fbdev midway.

This was tested by injecting errors at various points during the
initialization sequence and verifying that error cleanup didn't crash
and no memory leaked (using kmemleak).

Reported-by: Stéphane Marchesin <marcheu@chromium.org>
Reported-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: Use dma_mmap_writecombine()
Thierry Reding [Wed, 24 Sep 2014 14:14:04 +0000 (16:14 +0200)]
drm/tegra: gem: Use dma_mmap_writecombine()

Use the existing API rather than open-coding equivalent functionality
in the driver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()
Thierry Reding [Thu, 16 Oct 2014 12:23:36 +0000 (14:23 +0200)]
drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()

The drm_gem_object_release() function already performs this cleanup, so
there is no reason to do it explicitly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: Cleanup tegra_bo_create_with_handle()
Thierry Reding [Thu, 16 Oct 2014 12:22:50 +0000 (14:22 +0200)]
drm/tegra: gem: Cleanup tegra_bo_create_with_handle()

There is only a single location where the function needs to do cleanup.
Skip the error unwinding path and call the cleanup function directly
instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: gem: Extract tegra_bo_alloc_object()
Thierry Reding [Thu, 16 Oct 2014 12:18:50 +0000 (14:18 +0200)]
drm/tegra: gem: Extract tegra_bo_alloc_object()

This function implements the common buffer object allocation used for
both allocation and import paths.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
Sean Paul [Tue, 7 Oct 2014 14:04:42 +0000 (16:04 +0200)]
drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier

Make sure the DSI PHY_TIMING and BTA_TIMING registers are initialized
when the clocks are set up as opposed to when the output is enabled.
This makes sure that the PHY timings are properly set up when the panel
is prepared and that DCS commands sent at that time use the appropriate
timings.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Replace 1000000 by USEC_PER_SEC
Thierry Reding [Thu, 13 Nov 2014 13:32:06 +0000 (14:32 +0100)]
drm/tegra: dsi: Replace 1000000 by USEC_PER_SEC

Using the symbolic constant instantly provides a lot more context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Replace 1000000000UL by NSEC_PER_SEC
Thierry Reding [Fri, 7 Nov 2014 16:17:41 +0000 (17:17 +0100)]
drm/tegra: dsi: Replace 1000000000UL by NSEC_PER_SEC

Using the symbolic constant instantly provides a lot more context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Implement host transfers
Thierry Reding [Fri, 7 Nov 2014 16:25:26 +0000 (17:25 +0100)]
drm/tegra: dsi: Implement host transfers

Add support for sending MIPI DSI command packets from the host to a
peripheral. This is required for panels that need configuration before
they accept video data.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Add ganged mode support
Thierry Reding [Tue, 7 Oct 2014 14:10:24 +0000 (16:10 +0200)]
drm/tegra: dsi: Add ganged mode support

Implement ganged mode support for the Tegra DSI driver. The DSI host
controller to gang up with is specified via a phandle in the device tree
and the resolved DSI host controller used for the programming of the
ganged-mode registers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Split out tegra_dsi_set_timeout()
Thierry Reding [Thu, 13 Nov 2014 13:50:33 +0000 (14:50 +0100)]
drm/tegra: dsi: Split out tegra_dsi_set_timeout()

In preparation for adding ganged-mode support, this commit splits out
the tegra_dsi_set_timeout() function so that it can be reused for the
slave DSI controller.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Add command mode support
Thierry Reding [Thu, 13 Nov 2014 14:02:46 +0000 (15:02 +0100)]
drm/tegra: dsi: Add command mode support

Add support for DC-driven command mode. This is a mode where the video
stream sent by the display controller is packed into DCS command packets
(write_memory_start and write_memory_continue) by the DSI controller. It
can be used for panels with a remote framebuffer and is useful to save
power when used with a dynamic refresh rate (not yet supported by the
driver).

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Refactor in preparation for command mode
Thierry Reding [Thu, 13 Nov 2014 13:44:27 +0000 (14:44 +0100)]
drm/tegra: dsi: Refactor in preparation for command mode

For command mode panels, the DSI controller needs to be enabled and
configured so that panel drivers can send commands prior to the video
stream being enabled.

Move code from the monolithic output enable/disable functions into
smaller, reusable units to allow more fine-grained control over the
controller state.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Properly cleanup on probe failure
Thierry Reding [Thu, 13 Nov 2014 13:58:27 +0000 (14:58 +0100)]
drm/tegra: dsi: Properly cleanup on probe failure

The driver wasn't even attempting to do any cleanup when probing failed.
Fix this by releasing any resources acquired up to the point of failure
and putting the device back into the original state (reset, clocks off).

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Mark connector hotpluggable
Thierry Reding [Thu, 13 Nov 2014 13:54:01 +0000 (14:54 +0100)]
drm/tegra: dsi: Mark connector hotpluggable

DSI panels can always be hotplugged via the DSI bus' attach/detach
infrastructure, so unconditionally mark the connector hotpluggable.

While at it, also make sure that when a panel is detached the connector
is marked unconnected before calling into the DRM hotplug helpers to
reflect the correct state.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Leave parent clock alone
Thierry Reding [Thu, 13 Nov 2014 13:34:50 +0000 (14:34 +0100)]
drm/tegra: dsi: Leave parent clock alone

The common clock framework will take care of preparing and enabling the
parent of the DSI clock automatically.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Do not manage clock on enable/disable
Thierry Reding [Thu, 13 Nov 2014 13:27:29 +0000 (14:27 +0100)]
drm/tegra: dsi: Do not manage clock on enable/disable

In preparation for supporting command mode panels, don't disable the
clock when the output is disabled. The output will be enabled only after
the panel has been programmed in command mode, so the clock must always
remain on.

As a side-effect, pad calibration now only needs to be done at driver
probe time, since neither power nor controller state will go away before
driver removal. While at it, use a 32-bit variable to store register
content because the registers are 32-bit even on 64-bit Tegra.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dsi: Make FIFO depths host parameters
Thierry Reding [Wed, 6 Aug 2014 07:14:28 +0000 (09:14 +0200)]
drm/tegra: dsi: Make FIFO depths host parameters

Rather than hardcoding them as macros, make the host and video FIFO
depths parameters so that they can be more easily adjusted if a new
generation of the Tegra SoC changes them.

While at it, set the depth of the video FIFO to the correct value of
1920 *words* rather than *bytes*.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: DPMS off/on in encoder prepare/commit
Sean Paul [Wed, 29 Oct 2014 19:33:35 +0000 (15:33 -0400)]
drm/tegra: DPMS off/on in encoder prepare/commit

Previously the panel and output were only enabled on encoder->dpms(). If
userspace called dpms on before doing a modeset, the driver would get into
a state where the connector had a dpms state of ON, but the encoder and output
were not enabled (because the encoder is not yet attached to the connector).
Subsequent dpms ON calls are ignored b/c the connector's state already matches
the desired state.

This patch enables/disables the panel and output on modeset as well, so we
can catch the above case.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Do not enable output on .mode_set()
Thierry Reding [Tue, 7 Oct 2014 14:26:24 +0000 (16:26 +0200)]
drm/tegra: Do not enable output on .mode_set()

The output is already enabled in .dpms(), doing it in .mode_set() too
can cause noticeable flicker.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: dc: Add powergate support
Thierry Reding [Mon, 7 Jul 2014 13:32:53 +0000 (15:32 +0200)]
drm/tegra: dc: Add powergate support

Both display controllers are in their own power partition. Currently the
driver relies on the assumption that these partitions are on (which is
the hardware default). However some bootloaders may disable them, so the
driver must make sure to turn them back on to avoid hangs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register
Sean Paul [Wed, 10 Sep 2014 14:52:05 +0000 (10:52 -0400)]
gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register

During calibration, sets the "internal reference level for drive pull-
down" to the value specified in the Tegra TRM.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: mipi: Calibrate clock lanes
Sean Paul [Wed, 10 Sep 2014 14:52:04 +0000 (10:52 -0400)]
gpu: host1x: mipi: Calibrate clock lanes

Include the clock lanes when calibrating the MIPI PHY on Tegra124
compatible devices.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
[treding@nvidia.com: bikeshedding]
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: mipi: Preserve the contents of MIPI_CAL_CTRL
Sean Paul [Wed, 10 Sep 2014 14:52:03 +0000 (10:52 -0400)]
gpu: host1x: mipi: Preserve the contents of MIPI_CAL_CTRL

By paving the CTRL reg value, the current code changes MIPI_CAL_PRESCALE
("Auto-cal calibration step prescale") from 1us to 0.1us (val=0). In the
description for PHY's noise filter (MIPI_CAL_NOISE_FLT), the TRM states
that if the value of the prescale is 0 (or 0.1us), the filter should be
set between 2-5. However, the current code sets it to 0.

For now, let's keep the prescale and filter values as-is, which is most
likely the power-on-reset values of 0x2 and 0xa, respectively.

Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: mipi: Registers are 32 bits wide
Thierry Reding [Thu, 2 Oct 2014 12:33:31 +0000 (14:33 +0200)]
gpu: host1x: mipi: Registers are 32 bits wide

On 64-bit platforms an unsigned long would be 64 bit and cause
unnecessary casting when being passed to writel() or returned from
readl(). Make register values 32 bits wide to avoid that.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: Make gather offsets unsigned
Thierry Reding [Thu, 12 Jun 2014 11:26:19 +0000 (13:26 +0200)]
gpu: host1x: Make gather offsets unsigned

Use the u32 type for the offset in the host1x_job_gather structure for
consistentcy with other structures. Negative offsets don't make sense in
this context.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: Print address/offset pairs consistently
Thierry Reding [Thu, 12 Jun 2014 11:24:17 +0000 (13:24 +0200)]
gpu: host1x: Print address/offset pairs consistently

Consistently use a format of %pad+%#x to print address/offset in debug
messages.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: Fix typo in comment
Thierry Reding [Thu, 12 Jun 2014 11:17:48 +0000 (13:17 +0200)]
gpu: host1x: Fix typo in comment

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: Make mapped field of push buffers void *
Thierry Reding [Thu, 12 Jun 2014 11:16:54 +0000 (13:16 +0200)]
gpu: host1x: Make mapped field of push buffers void *

This reduces the amount of casting that needs to be done to get rid of
annoying warnings on 64-bit builds.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agogpu: host1x: Use struct host1x_bo pointers in traces
Thierry Reding [Thu, 12 Jun 2014 11:14:50 +0000 (13:14 +0200)]
gpu: host1x: Use struct host1x_bo pointers in traces

Rather than cast to a u32 use the struct host1x_bo pointers directly.
This avoid annoying warnings for 64-bit builds.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/tegra: Depend on COMMON_CLK
Thierry Reding [Thu, 16 Oct 2014 13:40:58 +0000 (15:40 +0200)]
drm/tegra: Depend on COMMON_CLK

The introduction of the COMPILE_TEST dependency in commit 158b50aefa14
(drm/tegra: Increase compile test coverage) removes the dependency on
COMMON_CLK (implicitly selected via ARCH_TEGRA, ARCH_MULTI_V7 and
ARCH_MULTIPLATFORM).

Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agoMerge branch 'drm/panel/for-next' into drm/tegra/for-next
Thierry Reding [Thu, 13 Nov 2014 15:09:48 +0000 (16:09 +0100)]
Merge branch 'drm/panel/for-next' into drm/tegra/for-next

10 years agodrm/panel: Add Sharp LQ101R1SX01 support
Thierry Reding [Fri, 1 Aug 2014 12:26:35 +0000 (14:26 +0200)]
drm/panel: Add Sharp LQ101R1SX01 support

This panel requires dual-channel mode. The device accepts command-mode
data on 8 lanes and will therefore need a dual-channel DSI controller.
The two interfaces that make up this device need to be instantiated in
the controllers that gang up to provide the dual-channel DSI host.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Do not require .owner field to be set
Thierry Reding [Tue, 4 Nov 2014 15:09:56 +0000 (16:09 +0100)]
drm/dsi: Do not require .owner field to be set

Drivers now no longer need to set the .owner field. It will be
automatically set at registration time.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Resolve MIPI DSI device from phandle
Thierry Reding [Wed, 6 Aug 2014 06:53:39 +0000 (08:53 +0200)]
drm/dsi: Resolve MIPI DSI device from phandle

Add a function, of_find_mipi_dsi_device_by_node(), that can be used to
resolve a phandle to a MIPI DSI device.

Acked-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Implement DCS set_{column,page}_address commands
Thierry Reding [Tue, 5 Aug 2014 09:20:25 +0000 (11:20 +0200)]
drm/dsi: Implement DCS set_{column,page}_address commands

Provide small convenience wrappers to set the column and page extents of
the frame memory accessed by the host processors.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Implement DCS {get,set}_pixel_format commands
Thierry Reding [Tue, 5 Aug 2014 09:18:46 +0000 (11:18 +0200)]
drm/dsi: Implement DCS {get,set}_pixel_format commands

Provide small convenience wrappers to query or set the pixel format used
by the interface.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Implement DCS get_power_mode command
Thierry Reding [Tue, 5 Aug 2014 09:17:06 +0000 (11:17 +0200)]
drm/dsi: Implement DCS get_power_mode command

Provide a small convenience wrapper that transmits a DCS get_power_mode
command. A set of bitmasks for the mode bits is also provided.

Acked-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Implement DCS soft_reset command
Thierry Reding [Tue, 5 Aug 2014 09:15:15 +0000 (11:15 +0200)]
drm/dsi: Implement DCS soft_reset command

Provide a small convenience wrapper that transmits a DCS soft_reset
command.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Implement DCS nop command
Thierry Reding [Tue, 5 Aug 2014 09:14:02 +0000 (11:14 +0200)]
drm/dsi: Implement DCS nop command

Provide a small convenience wrapper that transmits a DCS nop command.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Add to DocBook documentation
Thierry Reding [Tue, 5 Aug 2014 08:41:13 +0000 (10:41 +0200)]
drm/dsi: Add to DocBook documentation

Integrate the MIPI DSI helpers into DocBook and clean up various
kerneldoc warnings. Also add a brief DOC section and clarify some
aspects of the mipi_dsi_host struct's .transfer() operation.

Acked-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Implement some standard DCS commands
YoungJun Cho [Tue, 5 Aug 2014 08:38:31 +0000 (10:38 +0200)]
drm/dsi: Implement some standard DCS commands

Add helpers for the {enter,exit}_sleep_mode, set_display_{on,off} and
set_tear_{on,off} DCS commands.

Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
[treding: kerneldoc and other minor cleanup]
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Implement generic read and write commands
Thierry Reding [Tue, 5 Aug 2014 08:36:21 +0000 (10:36 +0200)]
drm/dsi: Implement generic read and write commands

Implement generic read and write commands. Selection of the proper data
type for packets is done automatically based on the number of parameters
or payload length.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/panel: s6e8aa0: Use standard MIPI DSI function
Thierry Reding [Wed, 6 Aug 2014 07:07:49 +0000 (09:07 +0200)]
drm/panel: s6e8aa0: Use standard MIPI DSI function

Use the newly introduced mipi_dsi_set_maximum_return_packet_size()
function to replace an open-coded version.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helper
YoungJun Cho [Tue, 5 Aug 2014 07:27:15 +0000 (09:27 +0200)]
drm/dsi: Add mipi_dsi_set_maximum_return_packet_size() helper

This function can be used to set the maximum return packet size for a
MIPI DSI peripheral.

Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
[treding: endianess, kerneldoc, return value]
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Constify mipi_dsi_msg
Thierry Reding [Tue, 5 Aug 2014 09:27:56 +0000 (11:27 +0200)]
drm/dsi: Constify mipi_dsi_msg

struct mipi_dsi_msg is a read-only structure, drivers should never need
to modify it. Make this explicit by making all references to the struct
const.

Acked-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Make mipi_dsi_dcs_{read,write}() symmetrical
Thierry Reding [Mon, 21 Jul 2014 13:47:10 +0000 (15:47 +0200)]
drm/dsi: Make mipi_dsi_dcs_{read,write}() symmetrical

Currently the mipi_dsi_dcs_write() function requires the DCS command
byte to be embedded within the write buffer whereas mipi_dsi_dcs_read()
has a separate parameter. Make them more symmetrical by adding an extra
command parameter to mipi_dsi_dcs_write().

The S6E8AA0 driver relies on the old asymmetric API and there's concern
that moving to the new API may be less efficient. Provide a new function
with the old semantics for those cases and make the S6E8AA0 driver use
it instead.

Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Add DSI transfer helper
Thierry Reding [Tue, 14 Oct 2014 09:12:32 +0000 (11:12 +0200)]
drm/dsi: Add DSI transfer helper

A common pattern is starting to emerge for higher level transfer
helpers. Create a new helper that encapsulates this pattern and avoids
code duplication.

Acked-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Add message to packet translator
Thierry Reding [Thu, 16 Oct 2014 11:44:02 +0000 (13:44 +0200)]
drm/dsi: Add message to packet translator

This commit introduces a new function, mipi_dsi_create_packet(), which
converts from a MIPI DSI message to a MIPI DSI packet. The MIPI DSI
packet is as close to the protocol described in the DSI specification as
possible and useful in drivers that need to write a DSI packet into a
FIFO to send a message off to the peripheral.

Suggested-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/dsi: Introduce packet format helpers
Thierry Reding [Tue, 4 Nov 2014 13:59:14 +0000 (14:59 +0100)]
drm/dsi: Introduce packet format helpers

Add two helpers, mipi_dsi_packet_format_is_{short,long}(), that help in
determining the format of a packet.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agovideo/hdmi: Relicense header under MIT license
Thierry Reding [Wed, 8 Oct 2014 09:14:34 +0000 (11:14 +0200)]
video/hdmi: Relicense header under MIT license

OpenBSD wants to reuse this file but needs the license to be more
permissive.

Acked-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Daniel Vetter <daniel.vetter@intel.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/gma500: mdfld: Reuse video/mipi_display.h
Thierry Reding [Tue, 5 Aug 2014 06:22:48 +0000 (08:22 +0200)]
drm/gma500: mdfld: Reuse video/mipi_display.h

The GMA500 driver redefines many constants already found in the generic
header. Replace uses of the custom defines by the standard ones and get
rid of the duplicate defininitions.

Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm: Make drm_mode_create_tv_properties() signature consistent
Thierry Reding [Mon, 13 Oct 2014 10:45:57 +0000 (12:45 +0200)]
drm: Make drm_mode_create_tv_properties() signature consistent

The prototype and the function implementation differ in their signature.
Make them consistent and use an unsigned integer for the number of modes
while at it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm: Implement drm_get_pci_dev() dummy for !PCI
Thierry Reding [Tue, 5 Aug 2014 11:37:47 +0000 (13:37 +0200)]
drm: Implement drm_get_pci_dev() dummy for !PCI

Implementing a dummy of this function allows drivers that use it to be
built on platforms that don't have PCI. This can happen for example if
the nouveau driver is built on Tegra without PCI enabled (or on 64-bit
ARM where PCI is not yet implemented).

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/prime: Use unsigned type for number of pages
Thierry Reding [Wed, 4 Jun 2014 07:18:29 +0000 (09:18 +0200)]
drm/prime: Use unsigned type for number of pages

The number of pages can never be negative, so an unsigned type is
enough. This also matches the type of the n_pages argument of the
sg_alloc_table_from_pages() function.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm/gem: Fix typo in kerneldoc
Thierry Reding [Thu, 2 Oct 2014 12:45:55 +0000 (14:45 +0200)]
drm/gem: Fix typo in kerneldoc

The function being documented is drm_gem_object_handle_free(), not
drm_gem_object_free().

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm: Use const data when creating blob properties
Thierry Reding [Tue, 13 May 2014 09:38:36 +0000 (11:38 +0200)]
drm: Use const data when creating blob properties

Creating a blob property will always copy the input data so the data
that is passed in can be const.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agodrm: Use size_t for blob property sizes
Thierry Reding [Tue, 13 May 2014 09:36:13 +0000 (11:36 +0200)]
drm: Use size_t for blob property sizes

size_t is the standard type when dealing with sizes of all kinds. Use it
consistently when instantiating DRM blob properties.

Signed-off-by: Thierry Reding <treding@nvidia.com>
10 years agoMerge branch 'drm-next-3.19' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Wed, 12 Nov 2014 23:06:41 +0000 (09:06 +1000)]
Merge branch 'drm-next-3.19' of git://people.freedesktop.org/~agd5f/linux into drm-next

Radeon patches for 3.19.  Christian has a number of GPUVM improvements
slated as well, but I'd like to wait until he gets back to work next week
to pull those in. Highlights of this pull:
- ttm performance improvements
- CI dpm fixes

* 'drm-next-3.19' of git://people.freedesktop.org/~agd5f/linux: (26 commits)
  drm/radeon/si/ci: make u8 static arrays constant
  drm/radeon: set power control in ci dpm enable
  drm/radeon: powertune fixes for hawaii
  drm/radeon: fix dpm mc init for certain hawaii boards
  drm/radeon: set bootup pcie level to max for ci dpm
  drm/radeon: fix default dpm state setup
  drm/radeon: workaround a hw bug in bonaire pcie dpm
  drm/radeon: fix mclk vddc configuration for cards for hawaii
  drm/radeon: fix sclk DS enablement
  drm/radeon: fix activity settings for sclk and mclk for CI
  drm/radeon: improve mclk param calcuations for ci dpm
  drm/radeon: fix dram timing for certain hawaii boards
  drm/radeon: switch force state commands for CI
  drm/radeon: fix for memory training on bonaire 0x6649
  drm/radeon/ci: handle gpio controlled dpm features properly
  drm/radeon: store the gpio shift as well
  drm/radeon: export radeon_atombios_lookup_gpio
  drm/radeon: fix typo in CI dpm disable
  drm/radeon: rework CI dpm thermal setup
  drm/radeon: rework SI dpm thermal setup
  ...

10 years agodrm/radeon/si/ci: make u8 static arrays constant
Dave Airlie [Mon, 10 Nov 2014 06:51:08 +0000 (16:51 +1000)]
drm/radeon/si/ci: make u8 static arrays constant

These two arrays don't change, just make them constant,
reduces data segment by a few bytes.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: set power control in ci dpm enable
Alex Deucher [Fri, 7 Nov 2014 19:12:14 +0000 (14:12 -0500)]
drm/radeon: set power control in ci dpm enable

Necessary for poper operation.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: powertune fixes for hawaii
Alex Deucher [Fri, 7 Nov 2014 23:31:39 +0000 (18:31 -0500)]
drm/radeon: powertune fixes for hawaii

- bapm is not available on hawaii
- update pt defaults

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: fix dpm mc init for certain hawaii boards
Alex Deucher [Fri, 7 Nov 2014 18:58:11 +0000 (13:58 -0500)]
drm/radeon: fix dpm mc init for certain hawaii boards

Needs special overrides for certain vram configurations.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: set bootup pcie level to max for ci dpm
Alex Deucher [Fri, 7 Nov 2014 18:34:28 +0000 (13:34 -0500)]
drm/radeon: set bootup pcie level to max for ci dpm

Avoids problems when re-loading the driver.  Does not
affect power saving when dpm is enabled.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: fix default dpm state setup
Alex Deucher [Fri, 7 Nov 2014 18:24:54 +0000 (13:24 -0500)]
drm/radeon: fix default dpm state setup

Only enable the first levels for mclk and sclk.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: workaround a hw bug in bonaire pcie dpm
Alex Deucher [Fri, 7 Nov 2014 18:19:17 +0000 (13:19 -0500)]
drm/radeon: workaround a hw bug in bonaire pcie dpm

Some boards get stuck in pcie x1 otherwise.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: fix mclk vddc configuration for cards for hawaii
Alex Deucher [Fri, 7 Nov 2014 18:11:39 +0000 (13:11 -0500)]
drm/radeon: fix mclk vddc configuration for cards for hawaii

Need to use vddc0 for vdcc1 for certain hawaii configurations.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: fix sclk DS enablement
Alex Deucher [Fri, 7 Nov 2014 18:06:57 +0000 (13:06 -0500)]
drm/radeon: fix sclk DS enablement

Only enable it for levels 0 and 1.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: fix activity settings for sclk and mclk for CI
Alex Deucher [Fri, 7 Nov 2014 18:04:47 +0000 (13:04 -0500)]
drm/radeon: fix activity settings for sclk and mclk for CI

Only need to be enabled on the first level.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: improve mclk param calcuations for ci dpm
Alex Deucher [Fri, 7 Nov 2014 17:56:00 +0000 (12:56 -0500)]
drm/radeon: improve mclk param calcuations for ci dpm

Properly take into account the post divider.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: fix dram timing for certain hawaii boards
Alex Deucher [Fri, 7 Nov 2014 17:51:04 +0000 (12:51 -0500)]
drm/radeon: fix dram timing for certain hawaii boards

Certain memory configurations need a fix.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: switch force state commands for CI
Alex Deucher [Fri, 7 Nov 2014 17:06:56 +0000 (12:06 -0500)]
drm/radeon: switch force state commands for CI

Use the preferred SMC commands for forcing state on CI.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: fix for memory training on bonaire 0x6649
Alex Deucher [Fri, 7 Nov 2014 17:00:25 +0000 (12:00 -0500)]
drm/radeon: fix for memory training on bonaire 0x6649

Workaround for memory link training on certain variants
of 0x6649.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon/ci: handle gpio controlled dpm features properly
Alex Deucher [Fri, 7 Nov 2014 16:52:12 +0000 (11:52 -0500)]
drm/radeon/ci: handle gpio controlled dpm features properly

Certain feature enablement depends on entries in the atom
gpio pin table.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
10 years agodrm/radeon: store the gpio shift as well
Alex Deucher [Fri, 7 Nov 2014 16:34:57 +0000 (11:34 -0500)]
drm/radeon: store the gpio shift as well

We need this in the dpm code.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>