GitHub/exynos8895/android_kernel_samsung_universal8895.git
17 years ago[POWERPC] Platforms shouldn't mess with ROOT_DEV
Grant Likely [Wed, 10 Oct 2007 18:48:28 +0000 (04:48 +1000)]
[POWERPC] Platforms shouldn't mess with ROOT_DEV

There is no good reason for board platform code to mess with the
ROOT_DEV.  Remove it from all in-tree platforms except powermac.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Remove empty ppc_md.setup_arch hooks
Grant Likely [Wed, 10 Oct 2007 18:48:23 +0000 (04:48 +1000)]
[POWERPC] Remove empty ppc_md.setup_arch hooks

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Only call ppc_md.setup_arch() if it is provided
Grant Likely [Wed, 10 Oct 2007 18:48:18 +0000 (04:48 +1000)]
[POWERPC] Only call ppc_md.setup_arch() if it is provided

This allows platforms which don't have anything to do at setup_arch time
(like a bunch of the 4xx platforms) to eliminate an empty setup_arch hook.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Disable vDSO support for ARCH=ppc where it's not implemented
Wolfgang Denk [Tue, 9 Oct 2007 22:36:18 +0000 (08:36 +1000)]
[POWERPC] Disable vDSO support for ARCH=ppc where it's not implemented

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Align the sys_call_table
Stephen Rothwell [Tue, 9 Oct 2007 07:03:57 +0000 (17:03 +1000)]
[POWERPC] Align the sys_call_table

Our _GLOBAL macro does a ".align 2" so the alignment is fine for 32
bit, but on 64 bit it is possible for it to end up only 4 byte aligned.
I don't know if it matters, but it can't hurt to 8 byte align it.

It also means that when we build with --emit_relocs, none of our 64 bit
relocations are to misaligned places.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Remove redundant reference to non-existent CONFIG_BOOTIMG
Robert P. J. Day [Sun, 7 Oct 2007 11:34:57 +0000 (21:34 +1000)]
[POWERPC] Remove redundant reference to non-existent CONFIG_BOOTIMG

There is no BOOTIMG Kconfig variable, not to mention that there is no
include/linux/bootimg.h header file.

Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] PS3: Add os-area database routines
Geoff Levand [Tue, 9 Oct 2007 01:07:24 +0000 (11:07 +1000)]
[POWERPC] PS3: Add os-area database routines

Add support for a simple tagged database in the PS3 flash rom
os-area.  The database allows the flash rom os-area to be shared
between a bootloader and installed operating systems.   The
application ps3-flash-util or the library libps3-utils from the
ps3-utils package can be used for userspace database operations.

The latest ps3-utils package is available here:

  git://git.kernel.org/pub/scm/linux/kernel/git/geoff/ps3-utils.git

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] PS3: Save os-area params to device tree
Geoff Levand [Sat, 6 Oct 2007 21:35:47 +0000 (07:35 +1000)]
[POWERPC] PS3: Save os-area params to device tree

Add the PS3 os-area startup params to the device tree.  This allows
a second stage kernel loaded with kexec to use these values.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] PS3: Add os-area rtc_diff set/get routines
Geoff Levand [Sat, 6 Oct 2007 21:35:46 +0000 (07:35 +1000)]
[POWERPC] PS3: Add os-area rtc_diff set/get routines

Updates for PS3 os-area rtc_diff set/get routines
o Add a new routine ps3_os_area_set_rtc_diff().
o Rename ps3_os_area_rtc_diff() to ps3_os_area_get_rtc_diff().
o Remove static variable rtc_shift with calls to ps3_os_area_get_rtc_diff().

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] PS3: os-area workqueue processing
Geoff Levand [Sat, 6 Oct 2007 21:35:45 +0000 (07:35 +1000)]
[POWERPC] PS3: os-area workqueue processing

Add a workqueue to the PS3 os-area support.  This is needed to
support writing updates to flash memory and to update the /proc
device tree entries from the timer tick interrupt context.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] PS3: Remove unused os-area params
Geoff Levand [Sat, 6 Oct 2007 21:35:44 +0000 (07:35 +1000)]
[POWERPC] PS3: Remove unused os-area params

Updates for PS3 os-area startup params
o Remove some unused PS3 os-area startup params from struct saved_params.
o Rename ps3_os_area_init() to ps3_os_area_save_params().
o Zero mirrored header after saving params.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] PS3: Cleanup of os-area.c
Geoff Levand [Sat, 6 Oct 2007 21:35:43 +0000 (07:35 +1000)]
[POWERPC] PS3: Cleanup of os-area.c

Minor cleanup of the PS3 file os-area.c:
 o Correct file text header.
 o Add type names enum os_area_ldr_format, enum os_area_boot_flag,
   enum os_area_ctrl_button.
 o Change struct os_area_header.magic_num type to u8.
 o Add preprocessor macro SECONDS_FROM_1970_TO_2000.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] cell: Add Cell memory controller register defs and expose it
Benjamin Herrenschmidt [Thu, 4 Oct 2007 05:40:43 +0000 (15:40 +1000)]
[POWERPC] cell: Add Cell memory controller register defs and expose it

This adds definitions for the Cell memory controller registers (at
least some of them) for use by the EDAC driver for ECC error reporting.

It also expose the said MIC as a platform device that can be used
by the EDAC driver to match on.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] cell: Move cbe_regs.h to include/asm-powerpc/cell-regs.h
Benjamin Herrenschmidt [Thu, 4 Oct 2007 05:40:42 +0000 (15:40 +1000)]
[POWERPC] cell: Move cbe_regs.h to include/asm-powerpc/cell-regs.h

The new Cell EDAC driver needs that file, oprofile also does ugly
path tricks to get to it, it's time to move it to asm-powerpc. While
at it, rename it to be consistent with cell-pmu.h (and dashes look
nicer than underscores anyway).

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Enable debug info on boot wrapper
Grant Likely [Thu, 4 Oct 2007 04:05:01 +0000 (14:05 +1000)]
[POWERPC] Enable debug info on boot wrapper

Add '-g' to BOOTCFLAGS if CONFIG_DEBUG_INFO is set.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Remove unused old code from powermac setup code
Paul Mackerras [Thu, 4 Oct 2007 03:47:06 +0000 (13:47 +1000)]
[POWERPC] Remove unused old code from powermac setup code

Since bootdevice never gets initialized, it's always NULL, and hence a
whole pile of code in arch/powerpc/platforms/setup.c never gets used.
(This was the code that originally was there so that the automatic
root partition selection mechanism would prefer a rootish-looking
partition on the device that OF loaded the kernel from over a similar
partition on other devices.)

This removes the unused code.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
17 years ago[POWERPC] Remove some more section mismatch warnings
Stephen Rothwell [Thu, 4 Oct 2007 02:00:28 +0000 (12:00 +1000)]
[POWERPC] Remove some more section mismatch warnings

WARNING: vmlinux.o(.text+0x2ff5c): Section mismatch: reference to .init.text:.pmac_find_ide_boot (between '.note_bootable_part' and '.note_scsi_host')

>From holly_defconfig:
WARNING: vmlinux.o(.text+0x164fe): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')
WARNING: vmlinux.o(.text+0x16506): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')

>From linkstation_defconfig:
WARNING: vmlinux.o(.text+0x158fe): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')
WARNING: vmlinux.o(.text+0x15906): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')

>From mpc7448_hpc2_defconfig:
WARNING: vmlinux.o(.text+0x1583e): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')
WARNING: vmlinux.o(.text+0x15846): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')

>From pmac32_defconfig:
WARNING: vmlinux.o(.text+0x154ca): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'note_scsi_host')
WARNING: vmlinux.o(.text+0x154d2): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'note_scsi_host')
WARNING: vmlinux.o(.text+0x1553c): Section mismatch: reference to .init.text:pmac_find_ide_boot (between 'note_bootable_part' and 'note_scsi_host')

>From ppc64_defconfig:
WARNING: vmlinux.o(.text+0x3acdc): Section mismatch: reference to .init.text:.pmac_find_ide_boot (between '.note_bootable_part' and '.note_scsi_host')

>From prpmc2800_defconfig:
WARNING: vmlinux.o(.text+0x1611e): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')
WARNING: vmlinux.o(.text+0x16126): Section mismatch: reference to .init.data:boot_command_line (between 'note_bootable_part' and 'find_via_pmu')

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Use cache-inhibited large page bit from firmware
Paul Mackerras [Wed, 3 Oct 2007 04:41:15 +0000 (14:41 +1000)]
[POWERPC] Use cache-inhibited large page bit from firmware

Discussions with firmware architects have confirmed that the bit in
the ibm,pa-features property that indicates support for
cache-inhibited large (>= 64kB) page mappings does in fact mean that
the hypervisor allows 64kB mappings to I/O devices.

Thus we can now enable the code that tests that bit and sets our
CPU_FTR_CI_LARGE_PAGE feature bit.

Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Prepare to remove of_platform_driver name
Stephen Rothwell [Fri, 21 Sep 2007 08:08:17 +0000 (18:08 +1000)]
[POWERPC] Prepare to remove of_platform_driver name

The name field of of_platform_driver is just copied into the included
device_driver.  By not overriding an already initialised device_driver
name, we can convert the drivers over time to stop using the
of_platform_driver name.

Also we were not copying the owner field from of_platform_driver, so do
the same with it.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] iSeries: Correct missing newline in printk
Stephen Rothwell [Fri, 21 Sep 2007 04:36:47 +0000 (14:36 +1000)]
[POWERPC] iSeries: Correct missing newline in printk

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Lite5200: Use comma delimiter format for lists in device tree
Grant Likely [Mon, 8 Oct 2007 07:24:22 +0000 (01:24 -0600)]
[POWERPC] Lite5200: Use comma delimiter format for lists in device tree

DTC now supports "foo","bar" format for lists of strings; use the new
format on the lite5200 device trees.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] spi: Support non-QE processors
Peter Korsgaard [Sat, 6 Oct 2007 20:06:40 +0000 (22:06 +0200)]
[POWERPC] spi: Support non-QE processors

On non-QE processors (mpc831x/mpc834x) the SPI clock is the SoC clock.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 85xx: mpc85xx_mds - reset UCC ethernet properly
Anton Vorontsov [Fri, 5 Oct 2007 17:46:47 +0000 (21:46 +0400)]
[POWERPC] 85xx: mpc85xx_mds - reset UCC ethernet properly

Apart from that the current code doesn't compile it's also
meaningless with regard to the MPC8568E-MDS' BCSR.

This patch used to reset UCCs properly.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 85xx: mpc8568mds - update dts to be able to use UCCs
Anton Vorontsov [Fri, 5 Oct 2007 17:46:53 +0000 (21:46 +0400)]
[POWERPC] 85xx: mpc8568mds - update dts to be able to use UCCs

1. UCC1's RX_DV pin is 16, not 15;
2. UCC1's phy is at 0x7, not 0x1. Schematics says 0x7, and recent
   u-boot also using 0x7.
3. Use gianfar's (eTSEC) mdio bus. This is hardware default setup.
4. tx-clock should be CLK16 (GE125, PB31);
5. phy-connection-type is RGMII-ID;

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] QE: pario - support for MPC85xx layout
Anton Vorontsov [Fri, 5 Oct 2007 17:47:09 +0000 (21:47 +0400)]
[POWERPC] QE: pario - support for MPC85xx layout

8 bytes padding required to match MPC85xx registers layout.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading
Anton Vorontsov [Fri, 5 Oct 2007 17:47:29 +0000 (21:47 +0400)]
[POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading

set_irq_chained_handler overwrites MPIC's handle_irq function
(handle_fasteoi_irq) thus MPIC never gets eoi event from the
cascaded IRQ. This situation hangs MPIC on MPC8568E.

To solve this problem efficiently, QEIC needs pluggable handlers,
specific to the underlaying interrupt controller.

Patch extends qe_ic_init() function to accept low and high interrupt
handlers. To avoid #ifdefs, stack of interrupt handlers specified in
the header file and functions are marked 'static inline', thus
handlers are compiled-in only if actually used (in the board file).
Another option would be to lookup for parent controller and
automatically detect handlers (will waste text size because of
never used handlers, so this option abolished).

qe_ic_init() also changed in regard to support multiplexed high/low
lines as found in MPC8568E-MDS, plus qe_ic_cascade_muxed_mpic()
handler implemented appropriately.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] mpc85xx_mds: select QUICC_ENGINE
Anton Vorontsov [Fri, 5 Oct 2007 17:47:38 +0000 (21:47 +0400)]
[POWERPC] mpc85xx_mds: select QUICC_ENGINE

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 86xx: update immap_86xx.h for the 8610
Timur Tabi [Tue, 2 Oct 2007 21:27:13 +0000 (16:27 -0500)]
[POWERPC] 86xx: update immap_86xx.h for the 8610

Update the definition of the global utilities structure (ccsr_guts) in
immap_86xx.h and add some related macros for the Freescale 8610 SOC.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 85xx/86xx: refactor RSTCR reset code
Kumar Gala [Thu, 4 Oct 2007 06:04:57 +0000 (01:04 -0500)]
[POWERPC] 85xx/86xx: refactor RSTCR reset code

On the majority of 85xx & 86xx we have a register that's ability to
assert HRESET_REQ to reset the board.  We refactored that code so it
can be shared between both platforms into fsl_soc.c and removed all
the duplication in each platform directory.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] Use for_each_ matching routinues for pci PHBs
Kumar Gala [Thu, 4 Oct 2007 05:28:43 +0000 (00:28 -0500)]
[POWERPC] Use for_each_ matching routinues for pci PHBs

On the Freescale embedded (83xx, 85xx, 86xx) and a few of the discrete
bridges (mpc10x, tsi108) use the new for_each_compatible_node() or
for_each_node_by_type() to provide more exact matching when looking for
PHBs in the device tree.

With the previous code it was possible to match on pci bridges since
we were only matching on device_type.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] FSL: Access PCIe LTSSM register with correct size
Kumar Gala [Thu, 4 Oct 2007 04:37:33 +0000 (23:37 -0500)]
[POWERPC] FSL: Access PCIe LTSSM register with correct size

The LTSSM register is actual 32-bits wide so we should be doing a
dword access.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 85xx: Failure with odd memory sizes and CONFIG_HIGHMEM
Dale Farnsworth [Wed, 3 Oct 2007 19:01:40 +0000 (12:01 -0700)]
[POWERPC] 85xx: Failure with odd memory sizes and CONFIG_HIGHMEM

The CONFIG_FSL_BOOKE mmu setup code fails when CONFIG_HIGHMEM=y
and the 3 fixed TLB entries cannot exactly map the lowmem size.
Each TLB entry can map 4MB, 16MB, 64MB or 256MB, so the failure
is observed when the kernel lowmem size is not equal to the
sum of up to 3 of those values.

Normally, memory is sized in nice numbers, but I observed this
problem while testing a crash dump kernel.  The failure can
also be observed by artificially reducing the kernel's main
memory via the mem= kernel command line parameter.

This commit fixes the problem by setting __initial_memory_limit
in adjust_total_lowmem().

Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] Add initial MPC8610 HPCD Platform files.
Xianghua Xiao [Wed, 3 Oct 2007 20:09:33 +0000 (15:09 -0500)]
[POWERPC] Add initial MPC8610 HPCD Platform files.

Add basic board support for the MPC8610 HPCD.  This does
not include any support the SoC Display or Audio controllers.

Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loelier <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] Treat 8610 PCIe host bridge as transparent
Jason Jin [Wed, 3 Oct 2007 20:09:50 +0000 (15:09 -0500)]
[POWERPC] Treat 8610 PCIe host bridge as transparent

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] Add initial MPC8610 HPCD Device Tree Source file.
Xianghua Xiao [Wed, 3 Oct 2007 20:09:15 +0000 (15:09 -0500)]
[POWERPC] Add initial MPC8610 HPCD Device Tree Source file.

Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] spi: mode should be "cpu-qe" instead of "qe"
Peter Korsgaard [Wed, 3 Oct 2007 16:29:09 +0000 (18:29 +0200)]
[POWERPC] spi: mode should be "cpu-qe" instead of "qe"

Mode should be "cpu-qe" for QE in CPU mode. "qe" should be reserved
for native QE mode.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] spi: Use fsl_spi instead of mpc83xx_spi
Peter Korsgaard [Wed, 3 Oct 2007 15:44:58 +0000 (17:44 +0200)]
[POWERPC] spi: Use fsl_spi instead of mpc83xx_spi

According to booting-without-of.txt, compatible should be "fsl_spi" and
mode "cpu" or "qe" for the fsl SPI controllers.

Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] qe: miscellaneous code improvements and fixes to the QE library
Timur Tabi [Wed, 3 Oct 2007 16:34:59 +0000 (11:34 -0500)]
[POWERPC] qe: miscellaneous code improvements and fixes to the QE library

This patch makes numerous miscellaneous code improvements to the QE library.

1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type()
   (every caller of ucc_init_guemr() also calls ucc_set_type()).  Modify all
   callers of ucc_set_type() accordingly.

2. Remove the unused enum ucc_pram_initial_offset.

3. Refactor qe_setbrg(), also implement work-around for errata QE_General4.

4. Several printk() calls were missing the terminating \n.

5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where
   appropriate.

6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed
   with the wrong value.

7. Add the protocol type to struct us_info and updated ucc_slow_init() to
   use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED.

8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx()

9. Add several macros in qe.h (mostly for slow UCC support, but also to
   standardize some naming convention) and remove several unused macros.

10. Update ucc_geth.c to use the new macros.

11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol
    to use when initializing the UCC in ucc_slow_init().

12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since
    these are the real names of the registers.

13. Use the setbits, clrbits, and clrsetbits where appropriate.

14. Refactor ucc_set_qe_mux_rxtx().

15. Remove all instances of 'volatile'.

16. Simplify get_cmxucr_reg();

17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[].

18. Updated struct ucc_geth because struct ucc_fast is not padded any more.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] Update .gitignore for new vdso generated files
Kumar Gala [Wed, 3 Oct 2007 15:43:10 +0000 (10:43 -0500)]
[POWERPC] Update .gitignore for new vdso generated files

We now generate vdso[32,64].so.dbg as part of the build so
add them to .gitignore

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] Fixup MPC8568 dts
Kumar Gala [Tue, 2 Oct 2007 14:51:32 +0000 (09:51 -0500)]
[POWERPC] Fixup MPC8568 dts

The PCI nodes on the MPC8568 dts didn't get moved up to be sibilings of the
SOC node when we did that clean up for some reason.  Fix that up and some
minor whitespace and adjusting the size of the soc reg property.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] mpc8568mds.dts: fix PCIe I/O address space location and size
Anton Vorontsov [Tue, 2 Oct 2007 13:48:07 +0000 (17:48 +0400)]
[POWERPC] mpc8568mds.dts: fix PCIe I/O address space location and size

According to u-boot/board/mpc8568mds/init.S:

LAW(Local Access Window) configuration:
2)   0xa000_0000   0xbfff_ffff     PCIe MEM                512MB
4)   0xe280_0000   0xe2ff_ffff     PCIe I/O                8M

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] MPC8568E-MDS: add support for ds1374 rtc
Anton Vorontsov [Tue, 2 Oct 2007 13:47:43 +0000 (17:47 +0400)]
[POWERPC] MPC8568E-MDS: add support for ds1374 rtc

MPC8568E-MDS have DS1374 chip on the I2C bus, thus let's use it.
This patch also adds #address-cells and #size-cells to the I2C
controllers nodes.

p.s. DS1374 rtc class driver is in the -mm tree, its name is
rtc-rtc-class-driver-for-the-ds1374.patch.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] fsl_soc: fix uninitialized i2c_board_info structure
Anton Vorontsov [Tue, 2 Oct 2007 13:47:40 +0000 (17:47 +0400)]
[POWERPC] fsl_soc: fix uninitialized i2c_board_info structure

i2c_board_info used semi-initialized, causing garbage in the
info->flags, and that, in turn, causes various symptoms of i2c
malfunctioning, like PEC mismatches.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] cpm: Describe multi-user ram in its own device node.
Scott Wood [Fri, 28 Sep 2007 19:06:16 +0000 (14:06 -0500)]
[POWERPC] cpm: Describe multi-user ram in its own device node.

The way the current CPM binding describes available multi-user (a.k.a.
dual-ported) RAM doesn't work well when there are multiple free regions,
and it doesn't work at all if the region doesn't begin at the start of
the muram area (as the hardware needs to be programmed with offsets into
this area).  The latter situation can happen with SMC UARTs on CPM2, as its
parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't
support moving it.

It is now described with a muram node, similar to QE.  The current CPM
binding is sufficiently recent (i.e. never appeared in an official release)
that compatibility with existing device trees is not an issue.

The code supporting the new binding is shared between cpm1 and cpm2, rather
than remain separated.  QE should be able to use this code as well, once
minor fixes are made to its device trees.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] Cleaned up whitespace in head_fsl_booke.S
Kumar Gala [Thu, 27 Sep 2007 13:43:35 +0000 (08:43 -0500)]
[POWERPC] Cleaned up whitespace in head_fsl_booke.S

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] QE: Added missing CEURNR register
Emil Medve [Wed, 26 Sep 2007 17:03:40 +0000 (12:03 -0500)]
[POWERPC] QE: Added missing CEURNR register

According to the publicly available MPC8360E RM (rev. 1 from 09/2006 and rev. 2
from 05/2007) and MPC8323E RM (rev. 1 from 09/2006), CEURNR is the QE microcode
revision number register and is located at offset 0x1b8 within the QE internal
register space

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] fsl_soc: rtc-ds1307 support
Peter Korsgaard [Thu, 20 Sep 2007 10:42:13 +0000 (12:42 +0200)]
[POWERPC] fsl_soc: rtc-ds1307 support

Add support for the I2C devices handled by the rtc-ds1307 driver to
of_register_i2c_devices.

Cc: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] fsl_soc: Fix trivial printk typo.
Peter Korsgaard [Thu, 20 Sep 2007 10:42:12 +0000 (12:42 +0200)]
[POWERPC] fsl_soc: Fix trivial printk typo.

Fix a trivial printk typo in fsl_soc.

Cc: G. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 8xx: Move softemu8xx.c from arch/ppc
Scott Wood [Tue, 18 Sep 2007 20:29:35 +0000 (15:29 -0500)]
[POWERPC] 8xx: Move softemu8xx.c from arch/ppc

Previously, Soft_emulate_8xx was called with no implementation, resulting in
build failures whenever building 8xx without math emulation.  The
implementation is copied from arch/ppc to resolve this issue.

However, this sort of minimal emulation is not a very good idea other than
for compatibility with existing userspaces, as it's less efficient than
soft-float and can mislead users into believing they have soft-float.  Thus,
it is made a configurable option, off by default.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] bootwrapper: adds cuboot for MPC7448HPC2 platform
Roy Zang [Mon, 24 Sep 2007 10:31:55 +0000 (18:31 +0800)]
[POWERPC] bootwrapper: adds cuboot for MPC7448HPC2 platform

This patch adds cuboot support for MPC7448HPC2 platform.
The cuImage can be used with legacy u-boot without FDT support.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] mpc82xx: Add pq2fads board support.
Scott Wood [Wed, 5 Sep 2007 19:00:54 +0000 (14:00 -0500)]
[POWERPC] mpc82xx: Add pq2fads board support.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] mpc82xx: Update mpc8272ads, and factor out PCI and reset.
Scott Wood [Fri, 14 Sep 2007 20:41:56 +0000 (15:41 -0500)]
[POWERPC] mpc82xx: Update mpc8272ads, and factor out PCI and reset.

1. PCI and reset are factored out into pq2.c.  I renamed them from m82xx
to pq2 because they won't work on the Integrated Host Processor line of
82xx chips (i.e. 8240, 8245, and such).

2. The PCI PIC, which is nominally board-specific, is used on multiple
boards, and thus is used into pq2ads-pci-pic.c.

3. The new CPM binding is used.

4. General cleanup.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 8xx/wrapper: Embedded Planet EP88xC support
Scott Wood [Fri, 14 Sep 2007 19:58:25 +0000 (14:58 -0500)]
[POWERPC] 8xx/wrapper: Embedded Planet EP88xC support

This board is also resold by Freescale under the names
"QUICCStart MPC885 Evaluation System" and "CWH-PPC-885XN-VE".

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 8xx: mpc885ads cleanup
Scott Wood [Fri, 14 Sep 2007 19:38:16 +0000 (14:38 -0500)]
[POWERPC] 8xx: mpc885ads cleanup

It now uses the new CPM binding and the generic pin/clock functions, and
has assorted fixes and cleanup.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] Document local bus nodes in the device tree, and update cuboot-pq2.
Scott Wood [Fri, 14 Sep 2007 18:24:02 +0000 (13:24 -0500)]
[POWERPC] Document local bus nodes in the device tree, and update cuboot-pq2.

The localbus node is used to describe devices that are connected via a chip
select or similar mechanism.  The advantages over placing the devices under
the root node are that it can be probed without probing other random things
under the root, and that the description of which chip select a given device
uses can be used to set up mappings if the firmware failed to do so in a
useful manner.

cuboot-pq2 is updated to match the binding; previously, it called itself
chipselect rather than localbus, and used phandle linkage between the
actual bus node and the control node (the current agreement is to simply use
the fully-qualified address of the control registers, and ignore the overlap
with the IMMR node).

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] mpc8272ads: Change references from 82xx_ADS to 8272_ADS.
Scott Wood [Thu, 26 Jul 2007 18:52:28 +0000 (13:52 -0500)]
[POWERPC] mpc8272ads: Change references from 82xx_ADS to 8272_ADS.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] mpc82xx: Rename mpc82xx_ads to mpc8272_ads.
Scott Wood [Thu, 26 Jul 2007 18:51:42 +0000 (13:51 -0500)]
[POWERPC] mpc82xx: Rename mpc82xx_ads to mpc8272_ads.

This is just a rename patch; internal references to mpc82xx_ads will be
changed in the next one.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] mpc82xx: Remove a bunch of cruft that duplicates generic functionality.
Scott Wood [Mon, 27 Aug 2007 21:56:43 +0000 (16:56 -0500)]
[POWERPC] mpc82xx: Remove a bunch of cruft that duplicates generic functionality.

m82xx_calibrate_decr(), mpc82xx_ads_show_cpuinfo(), and mpc82xx_halt() do
anything useful beyond what the generic code does.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] mpc82xx: Define CPU_FTR_NEED_COHERENT
Scott Wood [Fri, 14 Sep 2007 20:32:14 +0000 (15:32 -0500)]
[POWERPC] mpc82xx: Define CPU_FTR_NEED_COHERENT

The 8272 (and presumably other PCI PQ2 chips) appear to have the
same issue as the 83xx regarding PCI streaming DMA.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] cpm2: Add cpm2_set_pin().
Scott Wood [Mon, 16 Jul 2007 18:32:24 +0000 (13:32 -0500)]
[POWERPC] cpm2: Add cpm2_set_pin().

This provides a generic way for board code to set up CPM pins, rather
than directly poking magic values into registers.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] cpm2: Add SCCs to cpm2_clk_setup(), and cpm2_smc_clk_setup().
Scott Wood [Mon, 16 Jul 2007 18:26:35 +0000 (13:26 -0500)]
[POWERPC] cpm2: Add SCCs to cpm2_clk_setup(), and cpm2_smc_clk_setup().

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] cpm2: Infrastructure code cleanup.
Scott Wood [Fri, 14 Sep 2007 20:30:44 +0000 (15:30 -0500)]
[POWERPC] cpm2: Infrastructure code cleanup.

Mostly sparse fixes (__iomem annotations, etc); also, cpm2_immr
is used rather than creating many temporary mappings.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 8xx: Set initial memory limit.
John Traill [Tue, 17 Jul 2007 01:17:23 +0000 (05:17 +0400)]
[POWERPC] 8xx: Set initial memory limit.

The 8xx can only support a max of 8M during early boot (it seems a lot of
8xx boards only have 8M so the bug was never triggered), but the early
allocator isn't aware of this.  The following change makes it able to run
with larger memory.

Signed-off-by: John Traill <john.traill@freescale.com>
Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 8xx: Work around CPU15 erratum.
Scott Wood [Mon, 25 Jun 2007 19:50:41 +0000 (14:50 -0500)]
[POWERPC] 8xx: Work around CPU15 erratum.

The CPU15 erratum on MPC8xx chips can cause incorrect code execution
under certain circumstances, where there is a conditional or indirect
branch in the last word of a page, with a target in the last cache line
of the next page.  This patch implements one of the suggested
workarounds, by forcing a TLB miss whenever execution crosses a page
boundary.  This is done by invalidating the pages before and after the
one being loaded into the TLB in the ITLB miss handler.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 8xx: Add pin and clock setting functions.
Scott Wood [Mon, 16 Jul 2007 22:22:01 +0000 (17:22 -0500)]
[POWERPC] 8xx: Add pin and clock setting functions.

These let board code set up pins and clocks without having to
put magic numbers directly into the registers.

The clock function is mostly duplicated from the cpm2 version;
hopefully this stuff can be merged at some point.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 8xx: Infrastructure code cleanup.
Scott Wood [Fri, 14 Sep 2007 19:22:36 +0000 (14:22 -0500)]
[POWERPC] 8xx: Infrastructure code cleanup.

1. Keep a global mpc8xx_immr mapping, rather than constantly
creating temporary mappings.
2. Look for new fsl,cpm1 and fsl,cpm1-pic names.
3. Always reset the CPM when not using the udbg console;
this is required in case the firmware initialized a device
that is incompatible with one that the kernel is about to
use.
4. Remove some superfluous casts and header includes.
5. Change a usage of IMAP_ADDR to get_immrbase().
6. Use phys_addr_t, not uint, for dpram_pbase.
7. Various sparse-related fixes, such as __iomem annotations.
8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything
useful beyond the generic cpuinfo handler.
9. Move prototypes for 8xx support functions from board files
to sysdev/commproc.h.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] 8xx: Fix CONFIG_PIN_TLB.
Scott Wood [Mon, 16 Jul 2007 16:28:18 +0000 (11:28 -0500)]
[POWERPC] 8xx: Fix CONFIG_PIN_TLB.

1. Move CONSISTENT_START on 8xx so that it doesn't overlap the IMMR mapping.
2. The wrong register was being loaded into SPRN_MD_RPN.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] cpm_uart: Issue STOP_TX command before initializing console.
Scott Wood [Tue, 17 Jul 2007 23:09:33 +0000 (18:09 -0500)]
[POWERPC] cpm_uart: Issue STOP_TX command before initializing console.

This prevents some bootloader/bootwrapper characters from being lost.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] cpm_uart: sparse fixes
Scott Wood [Tue, 24 Jul 2007 20:53:07 +0000 (15:53 -0500)]
[POWERPC] cpm_uart: sparse fixes

Mostly a bunch of direct access to in/out conversions, plus a few
cast removals, __iomem annotations, and miscellaneous cleanup.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] cpm_uart: Be an of_platform device when CONFIG_PPC_CPM_NEW_BINDING is set.
Scott Wood [Tue, 17 Jul 2007 22:59:06 +0000 (17:59 -0500)]
[POWERPC] cpm_uart: Be an of_platform device when CONFIG_PPC_CPM_NEW_BINDING is set.

The existing OF glue code was crufty and broken.  Rather than fix it,
it has been removed, and the serial driver now talks to the device tree
directly.

The non-CONFIG_PPC_CPM_NEW_BINDING code can go away once CPM platforms
are dropped from arch/ppc (which will hopefully be soon), and existing
arch/powerpc boards that I wasn't able to test on for this patchset get
converted (which should be even sooner).

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] bootwrapper: Use fsl_get_immr() in cuboot-pq2.c.
Scott Wood [Fri, 31 Aug 2007 22:18:28 +0000 (17:18 -0500)]
[POWERPC] bootwrapper: Use fsl_get_immr() in cuboot-pq2.c.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] bootwrapper: Add fsl_get_immr() and 8xx/pq2 clock functions.
Scott Wood [Mon, 27 Aug 2007 18:46:38 +0000 (13:46 -0500)]
[POWERPC] bootwrapper: Add fsl_get_immr() and 8xx/pq2 clock functions.

fsl_get_immr() uses /soc/ranges to determine the immr.

mpc885_get_clock() transforms a crystal frequency into a system frequency
according to the PLL register settings.

pq2_get_clocks() does the same as the above for the PowerQUICC II,
except that it produces several different clocks.

The mpc8xx/pq2 set_clocks() functions modify common properties in
the device tree based on the given clock data.

The mpc885/pq2 fixup_clocks() functions call get_clocks(), and
pass the results to set_clocks().

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] bootwrapper: Support all-in-one PCI nodes in cuboot-pq2.
Scott Wood [Thu, 30 Aug 2007 17:06:21 +0000 (12:06 -0500)]
[POWERPC] bootwrapper: Support all-in-one PCI nodes in cuboot-pq2.

Consensus was reached to put PCI nodes at the root of the tree (and not
under /soc), but the phandle to a control node was rejected in favor of
simply not worrying about /pci/reg overlapping /soc/ranges.

This updates cuboot-82xx to not look for the phandle.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] Add early debug console for CPM serial ports.
Scott Wood [Mon, 16 Jul 2007 16:43:43 +0000 (11:43 -0500)]
[POWERPC] Add early debug console for CPM serial ports.

This code assumes that the ports have been previously set up, with
buffers in DPRAM.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] Introduce new CPM device bindings.
Scott Wood [Fri, 14 Sep 2007 18:04:54 +0000 (13:04 -0500)]
[POWERPC] Introduce new CPM device bindings.

This introduces a new device binding for the CPM and other devices on
these boards.  Some of the changes include:

1. Proper namespace scoping for Freescale compatibles and properties.

2. Use compatible rather than things like device_type and model
to determine which particular variant of a device is present.

3. Give the drivers the relevant CPM command word directly, rather than
requiring it to have a lookup table based on device-id, SCC v. SMC, and
CPM version.

4. Specify the CPCR and the usable DPRAM region in the CPM's reg property.

Boards that do not require the legacy bindings should select
CONFIG_PPC_CPM_NEW_BINDING to enable the of_platform CPM devices. Once
all existing boards are converted and tested, the config option can
become default y to prevent new boards from using the old model.  Once
arch/ppc is gone, the config option can be removed altogether.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[POWERPC] CPM: Change from fsl,brg-frequency to brg/clock-frequency
Scott Wood [Wed, 29 Aug 2007 20:08:40 +0000 (15:08 -0500)]
[POWERPC] CPM: Change from fsl,brg-frequency to brg/clock-frequency

As suggested by David Gibson, now that we have a separate node
for the baud rate generators, it's better to use the standard
clock-frequency property than a cpm-node-level fsl,brg-frequency
property.

This patch updates existing places where fsl,brg-frequency is
used.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
17 years ago[PPC] Use cpu setup routines from cpu_setup_44x.S for ARCH=ppc
Paul Mackerras [Thu, 4 Oct 2007 01:02:09 +0000 (11:02 +1000)]
[PPC] Use cpu setup routines from cpu_setup_44x.S for ARCH=ppc

Commit 8112753bb2c0045398c89d0647792b39805f6d40 made 44x in
ARCH=powerpc builds use cpu setup routines in cpu_setup_44x.S,
but didn't make a similar change for ARCH=ppc, and consequently
the ARCH=ppc builds fail with undefined symbols (since both use
the same cputable.c).

This fixes it by including cpu_setup_44x.S in the ARCH=ppc builds,
and by taking out the now-redundant FPU initialization in
arch/ppc/kernel/head_44x.S.

Signed-off-by: Paul Mackerras <paulus@samba.org>
17 years ago[POWERPC] Uartlite: Revert register io access changes
Grant Likely [Tue, 2 Oct 2007 16:47:02 +0000 (02:47 +1000)]
[POWERPC] Uartlite: Revert register io access changes

Reverts commit a15da8eff3627b8368db7f5dd260e5643213d918

This driver is used by devices other than the xilinx opb-uartlite which
depend on bytewise access to the registers.  The change to 32 bit access
does not work on these devices.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Uartlite: Add macros for register names
Grant Likely [Tue, 2 Oct 2007 16:44:15 +0000 (02:44 +1000)]
[POWERPC] Uartlite: Add macros for register names

Add macros to define register names to improve readability.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Setup default eth addr in embed_config for Xilinx Virtex platforms
Grant Likely [Sun, 30 Sep 2007 21:47:05 +0000 (07:47 +1000)]
[POWERPC] Setup default eth addr in embed_config for Xilinx Virtex platforms

This simply adds the boilerplate default Ethernet address to embed_config
for the Xilinx platform (bug fix).

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] XilinxFB: Move xilinxfb_platform_data definition to a shared header file
Grant Likely [Sun, 30 Sep 2007 21:47:00 +0000 (07:47 +1000)]
[POWERPC] XilinxFB: Move xilinxfb_platform_data definition to a shared header file

XilnixFB can be used by more than just arch/ppc.  Move the data structure
definition into include/linux/xilinxfb.h so it can be used by microblaze
and arch/powerpc

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Uartlite: Flush RX fifo in bootwrapper
Grant Likely [Sun, 30 Sep 2007 21:46:55 +0000 (07:46 +1000)]
[POWERPC] Uartlite: Flush RX fifo in bootwrapper

Flush the uartlite RX fifo so that characters typed before entry into
the zImage wrapper do not muck up the kernel command line.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Add treeImage to .gitignore
Josh Boyer [Tue, 2 Oct 2007 12:33:22 +0000 (07:33 -0500)]
[POWERPC] Add treeImage to .gitignore

Tell git to ignore the generated treeImage.* files in arch/powerpc/boot

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Uartlite: Let the console be initialized earlier
Grant Likely [Tue, 2 Oct 2007 02:16:09 +0000 (12:16 +1000)]
[POWERPC] Uartlite: Let the console be initialized earlier

By configuring it earlier we get console output sooner which is helpful
for debugging when the kernel crashes before the serial drivers are
initialized.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Uartlite: Add of-platform-bus binding
Grant Likely [Tue, 2 Oct 2007 02:16:04 +0000 (12:16 +1000)]
[POWERPC] Uartlite: Add of-platform-bus binding

Add of_platform bus binding so this driver can be used with arch/powerpc

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Uartlite: Comment block tidy
Grant Likely [Tue, 2 Oct 2007 02:15:59 +0000 (12:15 +1000)]
[POWERPC] Uartlite: Comment block tidy

Tidy the comments to split the driver into logical section; the main driver,
the console driver, the platform bus binding, and module initialization
and teardown.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Uartlite: Separate the bus binding from the driver proper
Grant Likely [Tue, 2 Oct 2007 02:15:54 +0000 (12:15 +1000)]
[POWERPC] Uartlite: Separate the bus binding from the driver proper

Separate the bus binding code from the driver structure allocation code in
preparation for adding the of_platform_bus bindings needed by arch/powerpc

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Uartlite: Add macro for uartlite device name
Grant Likely [Tue, 2 Oct 2007 02:15:49 +0000 (12:15 +1000)]
[POWERPC] Uartlite: Add macro for uartlite device name

Changed to make the following OF_platform bus binding patch a wee bit cleaner

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Uartlite: change name of ports to ulite_ports
Grant Likely [Tue, 2 Oct 2007 02:15:44 +0000 (12:15 +1000)]
[POWERPC] Uartlite: change name of ports to ulite_ports

Changed to match naming convention used in the rest of the module

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Uartlite: Fix reg io to access documented register size
Grant Likely [Tue, 2 Oct 2007 02:15:39 +0000 (12:15 +1000)]
[POWERPC] Uartlite: Fix reg io to access documented register size

The Uartlite data sheet defines the registers as 32 bit wide.  This
patch changes the register access to use 32 bit transfers and eliminates
the magic +3 offset which is currently required to make the device
work.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: John Williams <jwilliams@itee.uq.edu.au>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Add PowerPC Xilinx Virtex entry to maintainers
Grant Likely [Tue, 2 Oct 2007 02:15:34 +0000 (12:15 +1000)]
[POWERPC] Add PowerPC Xilinx Virtex entry to maintainers

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Virtex: Add generic Xilinx Virtex board support
Grant Likely [Tue, 2 Oct 2007 02:15:29 +0000 (12:15 +1000)]
[POWERPC] Virtex: Add generic Xilinx Virtex board support

Adds support for generic Xilinx Virtex boards.  Any board which specifies
"xilinx,virtex" in the compatible property will make use of this board
support.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Virtex: add xilinx interrupt controller driver
Grant Likely [Tue, 2 Oct 2007 02:15:23 +0000 (12:15 +1000)]
[POWERPC] Virtex: add xilinx interrupt controller driver

Adds support for the Xilinx opb-intc interrupt controller

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Virtex: Add Kconfig macros for Xilinx Virtex board support
Grant Likely [Tue, 2 Oct 2007 02:15:18 +0000 (12:15 +1000)]
[POWERPC] Virtex: Add Kconfig macros for Xilinx Virtex board support

Add the needed kconfig macros to enable Xilinx Virtex board support

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Virtex: Add uartlite bootwrapper driver
Grant Likely [Tue, 2 Oct 2007 02:15:13 +0000 (12:15 +1000)]
[POWERPC] Virtex: Add uartlite bootwrapper driver

Allows the bootwrapper to use the uartlite device for console output.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround
Valentine Barshak [Fri, 21 Sep 2007 14:50:09 +0000 (00:50 +1000)]
[POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround

Add a workaround for PowerPC 440EPx/GRx incorrect write to
DDR SDRAM errata. Data can be written to wrong address
in SDRAM when write pipelining enabled on plb0. We disable
it in the cpu_setup for these processors at early init.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] 4xx: Move 440EP(x) FPU setup from head_44x to cpu_setup_4xx
Valentine Barshak [Fri, 21 Sep 2007 14:46:57 +0000 (00:46 +1000)]
[POWERPC] 4xx: Move 440EP(x) FPU setup from head_44x to cpu_setup_4xx

The PowerPC 440EP(x) FPU init is currently done in head_44x
under ifdefs. Since we should support more then one board
in the same kernel, we move FPU initialization code from head_44x
to cpu_setup_44x and add cpu_setup callbacks for 440EP(x).

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] 4xx: Introduce cpu_setup functionality to 44x platform
Valentine Barshak [Fri, 21 Sep 2007 14:44:38 +0000 (00:44 +1000)]
[POWERPC] 4xx: Introduce cpu_setup functionality to 44x platform

This adds cpu_setup functionality for ppc44x platform.
Low level cpu-spefic initialization routines should be
placed in cpu_setup_44x.S and a callback should be
added to cputable. The cpu_setup is invoked
by identify_cpu() function at early init.

Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] 4xx: Fix Walnut wrapper compile errors
Josh Boyer [Mon, 24 Sep 2007 12:32:15 +0000 (07:32 -0500)]
[POWERPC] 4xx: Fix Walnut wrapper compile errors

Pass the appropriate -mcpu flag to the treeboot-walnut.o object to prevent
some toolchains from erroring out with unknown opcodes

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
17 years ago[POWERPC] Enable tickless idle and high res timers for powerpc
Tony Breeds [Fri, 21 Sep 2007 03:26:03 +0000 (13:26 +1000)]
[POWERPC] Enable tickless idle and high res timers for powerpc

Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>