ARM: shmobile: r8a7790: Reference clocks

Reference clocks using a "clocks" property in all nodes corresponding to
devices that require a clock.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7790: Add clocks

Declare all core clocks and DIV6 clocks, as well as all MSTP clocks
currently used by r8a7790 boards.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: armadillo: dts: Add gpio-keys device

The board had 4 buttons connected to GPIOs, add a corresponding
gpio-keys device.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: sh73a0: Specify PFC interrupts in DT

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7740: Specify PFC interrupts in DT

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a73a4: Specify PFC interrupts in DT

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: armadillo: dts: Add PWM backlight enable GPIO

The Armadillo 800 EVA panel module has a backlight enable signal
connected to GPIO 61. Report this in the backlight DT node.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: armadillo: dts: Add PWM backlight power supply

Commit 22ceeee16eb8f0d04de3ef43a5174fb30ec18af9 ("pwm-backlight: Add
power supply support") added a mandatory power supply for the PWM
backlight. Add a fixed 5V regulator and reference it for the backlight
power supply.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Merge branch 'heads/soc2' into dt3-base

arm: shmobile: clks: remove duplicated clock from r7s72100

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: koelsch: Conditionally select MICREL_PHY

The koelsch board uses has an SH ethernet controller which uses a Micrel
phy. Select MICREL_PHY for koelsch if SH_ETH is enabled to make use of the
Micrel-specific phy driver rather than relying on the generic phy driver.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Merge branch 'heads/sh-sci' into dt3-base

Merge tag 'v3.13-rc3' into dt3-base

Linux 3.13-rc3

Conflicts:
drivers/pinctrl/sh-pfc/pfc-r8a7740.c
drivers/pinctrl/sh-pfc/pfc-sh7372.c

Merge remote-tracking branch 'daniel-lezcano/clockevents/for-Simon-3.13-rc2' into dt3-base

Merge remote-tracking branch 'mike-turquette/clk-next-shmobile' into dt3-base

Merge commit '70c8f01' into dt3-base

This is a commit from the for-next branch of Linus Walleij's pin control tre
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git

It is the oldest commit in that branch that provides the dependencies
needed for SoC changes to the usage of sh-pfc.

ARM: shmobile: rcar-gen2: Initialize CCF before clock sources

When CONFIG_COMMON_CLOCK is enabled, call rcar_gen2_clocks_init() in the
timer init function to initialize the common clock framework before
initializing the clock sources. This will take care of clock
initialization when the r8a779[01] boards will be switched to
multiplatform kernels.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7791: Add clock index macros for DT sources

Add macros usable by device tree sources to reference r8a7791 clocks by
index.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7790: Add clock index macros for DT sources

Add macros usable by device tree sources to reference r8a7790 clocks by
index.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

clocksource: sh_cmt: Add clk_prepare/unprepare support

Prepare the clock at probe time, as there is no other appropriate place
in the driver where we're allowed to sleep.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

ARM: shmobile: Add select MIGHT_HAVE_PCI for PCI-AHB bridge code

The PCI sub-system is not enabled by default on ARM and on certain
Renesas devices the build does not select it. This means that there
are configurations that do not allow the AHB-PCI bridge used for the
USB sub-systems to be built.

For the R8A7790, R8A7791 and EMEV-2 select MIGHT_HAVE_PCI to allow the
PCI drivers to be built. Also select MIGHT_HAVE_PCI for the multi-config
where there may be many Reneasas devices selected.

Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

serial: sh-sci: Convert to clk_prepare/unprepare

Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and
clk_disable_unprepare() to get ready for the migration to the common
clock framework.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

serial: sh-sci: Don't enable/disable port from within break timer

The break timer accesses hardware registers and thus requires the port
to be enabled. It currently ensures this by enabling the port at the
beginning of the timer handler, and disabling it at the end. However,
the enable/disable operations call the runtime PM sync functions, which
are not allowed in atomic context. The current situation is thus broken.

This change relies on non-atomic code to enable/disable the port. The
break timer will only be started from the IRQ handler, which already
runs with the port enabled. We just need to ensure that the port won't
be disabled with the timer running, and that's easily done by just
cancelling the timer in the port disable function.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

clk: shmobile: Add MSTP clock support

MSTP clocks are gate clocks controlled through a register that handles
up to 32 clocks. The register is often sparsely populated.

Those clocks are found on Renesas ARM SoCs.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

clk: shmobile: Add DIV6 clock support

DIV6 clocks are divider gate clocks controlled through a single
register. The divider is expressed on 6 bits, hence the name, and can
take values from 1/1 to 1/64.

Those clocks are found on Renesas ARM SoCs.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

clk: shmobile: Add R-Car Gen2 clocks support

The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are
too custom to be supported in a generic driver. Those clocks can be
divided in two categories:

- Fixed rate clocks with multiplier and divisor set according to boot
  mode configuration

- Custom divider clocks with SoC-specific divider values

This driver supports both.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

sh-pfc: Support GPIO to IRQ mapping specified IRQ resources

On non-DT platforms IRQ controllers associated with the GPIOs have a
fixed IRQ base value known at compile time. The sh-pfc driver translates
GPIO number to IRQ numbers using a hardcoded table. This mechanism
breaks on DT platforms, as the IRQ base values are dynamic in that case.

Fix this by specifying IRQs associated with GPIOs in IRQ resources,
populated automatically from the device tree. When IRQ resources are
specified the driver requires one IRQ resource per GPIO able to generate
an interrupt, and uses the translation table to compute the IRQ resource
offset instead of the IRQ number.

Cc: devicetree@vger.kernel.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

sh-pfc: Rename sh_pfc window field to windows

There's more than one window, name the field windows.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

sh-pfc: sh73a0: Sort IRQ entries by IRQ number

This makes catching duplicate entries easier. Merge the two IRQ9 entries
found after sorting.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

sh-pfc: sh73a0: Add missing IRQ15

The external IRQ15 input multiplexed on GPIO 0 is missing. Add it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

sh-pfc: Terminate gpios array by -1

0 is a valid GPIO value, use -1 to terminate the gpios array in IRQ
lists.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

sh-pfc: Turn unsigned indices into unsigned int

Some indices take positive values only, make them unsigned.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: pinconf: remove checks on ops->pin_config_get

ops->pin_config_get() is only used in one specific path that will only be taken
for generic pinconf drivers (ops->is_generic == true) when dumping the pinconf
by using debugfs.

By removing the check in pinconf_check_ops(), let's stop pressuring people to
write a pin_config_get() function that will never be used and so will probably
never be tested.

Removing the check in pinconf_pins_show() allows driver to not implement
pin_config_get() but still get a dump of the pinconf in debugfs by implementing
pin_config_dbg_show().

Finally, not implementing pin_config_get() now results in returning -ENOTSUPP
instead of -EINVAL. While this doesn't have any real impact for now, this feels
more right.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: at91: initialize config parameter to 0

When passing a not initialized config parameter, at91_pinconf_get() would return
a bogus value. Fix that by initializing it to zero before using it.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: at91: correct a few typos

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: shmobile: koelsch: dts: Add gpio-keys device

The board has 7 buttons connected to GPIOs, add a corresponding
gpio-keys device.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

serial: sh-sci: Fix warnings due to improper casts and printk formats

Use the %zu and %pad printk specifiers to print size_t and dma_addr_t
variables, and cast pointers to uintptr_t instead of unsigned int where
applicable. This fixes warnings on platforms where pointers and/or
dma_addr_t have a different size than int.

Cc: linux-serial@vger.kernel.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7778: add USB Func DMAEngine support

HPB-DMAC has 2 channel for USB Func (= D0/D1)
D0 is used as Tx, D1 is used as Rx on this patch

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: rcar-gen2: Do not setup timer in non-secure mode

If the system has been started in non-secure mode, then the ARM generic
timer is not configurable during the kernel initialisation. Currently
the only thing we can check for is if the timer has been correctly
configured during the boot process.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7791: add Ether clock

Add support for R8A7791 Ether clock.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7778: camera-rcar header cleanup

<linux/platform_data/camera-rcar.h> is needed on BockW,
not setup-r8a7778.c

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: kzm9g: add FSI support for DTS

This patch support FSI-AK4648 with simple audio card

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: sh73a0: add FSI support via DTSI

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: sh73a0: add FSI clock support for DT

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7790: add I2C support

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Merge branch 'pinmux/next/pfc' of git://linuxtv.org/pinchartl/fbdev into devel

pinctrl: make the MSM SoC driver depend on OF

We had a compilation failure on x86_64 due to missing OF support
as this was an implicit dependency. Add an explicit dependency
on OF and OF_IRQ on the SoC driver.

Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

ARM: shmobile: r8a7778: add SSIx DMAEngine support

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

pinctrl: sh-pfc: pfc-r8a7790: Add VIN2 and VIN3 pins

There are VIN2 and VIN3 channels available on the R8A7790 SoC.
VIN2 supports 4/8/16/18/24-bit data, while VIN3 supports 8-bit.
Add both here, covering all possible data pin configurations.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

pinctrl: sh-pfc: pfc-r8a7790: Add missing VIN1 pins

Both VIN0 and VIN1 channels support identical input interfaces.
Add missing VIN1 pins here and organize them in the same pin
groups as VIN0.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

pinctrl: sh-pfc: pfc-r8a7790: Reorganize VIN0 data pins

This reorganizes and renames VIN0 data pin groups to cover
all possible configurations. There's total of eight data
pin groups, one per each configuration. Most of the groups
share the same pin/mux array. Only the 18-bit configuration
needs a separate pin/mux array since in combines interleaved
data pins.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

pinctrl: sh-pfc: pfc-r8a7790: Group VIN0 HSYNC and VSYNC together

This groups VIN0 HSYNC and VSYNC pins together
since one cannot be used without another.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

pinctrl: sh-pfc: pfc-r8a7790: Rename VIN pin groups

This drops superfluous "signal" word from the pin group names
and renames data_enable group to clkenb as in the h/w manual.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

sh-pfc: r8a7791: Fix msiof groups to follow GROUP

SH_PFC_PIN_GROUP(), pins[], mux[], defines
 clk, sync, ss1, ss2, rx, tx
But, msiof?_groups[] defines
 clk, ctrl, data

Fix msiof[012]_groups members to be consistent to PIN_GROUP.

Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

sh-pfc: r8a7790: Add Audio pin support

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

sh-pfc: r8a7790: Add SSI pin support

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

sh-pfc: Share common PORTCR macro definition

The macro is defined identically in four different locations. Share it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: make the MSM SoC driver depend on OF

We had a compilation failure on x86_64 due to missing OF support
as this was an implicit dependency. Add an explicit dependency
on OF and OF_IRQ on the SoC driver.

Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v2->v3:
- Total failure with older approaches: what we need to do is
  have the *SoC subdriver* depend on OF and OF_IRQ. This is
  because the placeholder bool PINCTRL_MSM cannot cascade its
  dependencies when a subdriver selects it, Kconfig is smart
  but not that smart.
ChangeLog v1->v2:
- OK so "depends on OF" did not work here let's try to simply
  select OF and OF_IRQ for this then? It's one of those
  "warning: (PINCTRL_MSM8X74) selects PINCTRL_MSM which has
  unmet direct dependencies (PINCTRL && OF)" that I simply
  cannot find my way out of :-/

ARM: shmobile: marzen: enable HSPI0 in DTS

Based on work for the bockw board by Kuninori Morimoto.

Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7779: add HSPI support to DTSI

Based on work for the r8a7778 SoC by Kuninori Morimoto.

Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use r8a7779 suffix for INTC compat string

Add "renesas,intc-irqpin-r8a7779" to the compatible string for the
IRQ pins in case of r8a7779 INTC. This makes the INTC irqpin follow
the same style as the other devices and also makes it more future proof.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use r8a7778 suffix for INTC compat string

Add "renesas,intc-irqpin-r8a7778" to the compatible string for the
IRQ pins in case of r8a7778 INTC. This makes the INTC irqpin follow
the same style as the other devices and also makes it more future proof.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use r8a7740 suffix for INTC compat string

Add "renesas,intc-irqpin-r8a7740" to the compatible string for the
IRQ pins in case of r8a7740 INTC. This makes the INTC irqpin follow
the same style as the other devices and also makes it more future proof.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use sh73a0 suffix for INTC compat string

Add "renesas,intc-irqpin-sh73a0" to the compatible string for the
IRQ pins in case of sh73a0 INTC. This makes the INTC irqpin follow
the same style as the other devices and also makes it more future proof.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: armadillo: add FSI support for DTS

This patch support FSI-WM8978 with simple audio card

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7740: add FSI support via DTSI

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: emev2: Setup internal peripheral interrupts as level high

Interrupts generated by SoC internal devices are currently marked as
IRQ_TYPE_NONE. As they're level-triggered and active-high, mark them as
such.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: emev2: Use interrupt macros in DT files

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use interrupt macros in r8a73a4 and r8a7778 DT files

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Fix r8a7791 GPIO resources in DTS

The r8a7791 GPIO resources are currently incorrect. Fix that
by making them match the English r8a7791 v0.31 data sheet.

Tested with GPIO LED using Koelsch DT reference.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms@verge.net.au>

ARM: shmobile: Include all 4 GiB of memory on Lager DT Ref

Add 2GiB of DRAM at 0x1_8000_0000 to support the full 4GiB
of Lager system memory in case of DT Reference.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Include all 4 GiB of memory on Lager

Add 2GiB of DRAM at 0x1_8000_0000 to support the full 4GiB
of Lager system memory.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Include all 2 GiB of memory on APE6EVM

Add 1GiB of DRAM at 0x2_0000_0000 to support the full 2GiB
of APE6EVM system memory.

Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Include all 2 GiB of memory on APE6EVM DT Ref

Add 1GiB of DRAM at 0x2_0000_0000 to support the full 2GiB
of APE6EVM system memory also in case of DT reference.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: kzm9g-reference: Add GPIO keys to DT

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: kzm9g-reference: Add PCF8575 GPIO extender to DT

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Koelsch DT reference GPIO LED support

Add led6, led7 and led8 to the Koelsch DT reference board support.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Enable DSW2 with gpio-keys on KZM9D

Use the gpio-keys driver to support the 4 pins on the
dip switch DSW2 which is mounted on the KZM9D board.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: armadillo-reference: Use low level IRQ for ST1231

The device is configured to generate an active-low interrupt signal that
needs to be acknowledged by the host. Configure the IRQ to trigger on
low level.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use r8a7790 suffix for IRQC compat string

Add "renesas,irqc-r8a7790" to the compatible string for IRQC
in case of r8a7790. This makes the IRQC follow the same style
as the other devices and also makes it more future proof.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use r8a7790 suffix for MMCIF compat string

Add "renesas,mmcif-r8a7790" to the compatible string for MMCIF
in case of r8a7790. This makes the MMCIF follow the same style
as the other devices and also makes it more future proof.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Add r8a7791 thermal device node to DTS

Hook up the r8a7791 thermal sensor to the DTS.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Add r8a7790 thermal device node to DTS

Hook up the r8a7790 thermal sensor to the DTS.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Configure r8a7791 PFC on Koelsch via DTS

Configure the "D" set of data signals for SCIF0 and SCIF1
on the Koelsch board to setup pinctrl serial console bits.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use r8a7791 suffix for IRQC compat string

Add "renesas,irqc-r8a7791" to the compatible string for IRQC
in case of r8a7791. This makes the IRQC follow the same style
as the other devices and also makes it more future proof.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: sh73a0: fixup sdhi compatible name

sh73a0 != r8a7740

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: marzen: remove SDHI0 WP pin setting

WP pin is not implemented on Marzen

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: marzen: remove SDHI0 WP pin setting from DTS

WP pin is not implemented on Marzen

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: kzm9g-reference: Use falling edge IRQ for LAN9221

The device is configured to generate an active-low interrupt signal that
is automatically deasserted without requiring any action from the host.
Configure the IRQ to trigger on falling edge.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: bockw-reference: Use falling edge IRQ for LAN9221

The device is configured to generate an active-low interrupt signal that
is automatically deasserted without requiring any action from the host.
Configure the IRQ to trigger on falling edge.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: marzen-reference: Use falling edge IRQ for LAN9221

The device is configured to generate an active-low interrupt signal that
is automatically deasserted without requiring any action from the host.
Use falling edge trigger as that is the configuration currently used on
the board.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use interrupt macros in board DT files

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use interrupt macros in SoC DT files

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: Use #include in device tree sources

In order to allow usage of the preprocessor in the SoC device tree
sources, switch from /include/ to #include.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: bockw: enable HSPI0 on DTS

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7778: add HSPI suppport on DTSI

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: r8a7778: add I2C support on DTSI

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: emev2: Add clock tree description in DT

Add minimum clock tree description to .dts file.
This provides same set of clocks as current sh-clkfwk version .c
code does.

Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: lager: tidyup DT node naming

According to ePAPR spec,
this patch tidies up DT node name.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

ARM: shmobile: marzen: tidyup DT node naming

According to ePAPR spec,
this patch tidies up DT node name.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>