drm/i915/bxt: fix dsi hw state pipe readout

BXT isn't as limited as BYT and CHT regarding DSI pipes and ports.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/8bea85b86aaf7a15f854a656bf8d3208a3afe0bd.1458070700.git.jani.nikula@intel.com

drm/i915/dsi: refactor dsi get hw state readout

Make the code easier to read and update. No functional changes.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/04b20a9be6a9481ca2eb2a42cdcdc27358152e5f.1458070700.git.jani.nikula@intel.com

drm/i915: make transcoder_name return a string

Nicer for eDP (actually "EDP" instead of "D"), and makes future
expansion for DSI transcoders easier.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/2ac55ed584e450fe154daecb6453dff8eede5e7d.1458070700.git.jani.nikula@intel.com

drm/i915: add for_each_port_masked macro

Same as for_each_dsi_port, but for general use. Leave the
for_each_dsi_port version around as an "alias" for now to not cause too
much churn. No functional changes.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/a0ef5bf33395e1fcd87178b17d6687b022042cf7.1458070700.git.jani.nikula@intel.com

drm/i915/dsi: start using enum mipi_dsi_pixel_format

A small step moving us closer to DRM MIPI DSI code. Use enum
mipi_dsi_pixel_format instead of our own. The first benefit is being
able to use common mipi_dsi_pixel_format_to_bpp().

There's a little back and forth conversion with the VBT -> enum ->
register, since we have just shoved the VBT value into the register
directly. Longer term, all the VBT parsing and deciphering should be
done in intel_bios.c, and abstracted there.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458123700-16003-2-git-send-email-jani.nikula@intel.com

drm/i915/dsi: lose the loose 666 format name in favor of packed

The enum mipi_dsi_pixel_format defines MIPI_DSI_FMT_RGB666 for the
"loose" 24 bpp format and MIPI_DSI_FMT_RGB666_PACKED for the 18 bpp
format. We have this the other way round, defining a loose version for
24 bpp.

Follow suit with what's in enum mipi_dsi_pixel_format to avoid future
confusion. Rename

VID_MODE_FORMAT_RGB666 -> VID_MODE_FORMAT_RGB666_PACKED
VID_MODE_FORMAT_RGB666_LOOSE -> VID_MODE_FORMAT_RGB666

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458123700-16003-1-git-send-email-jani.nikula@intel.com

drm/i915/csr: Allow matching unknown HW steppings with generic firmware

If the firmware is generic and has a run-anywhere mode, enable it rather
than completely failing on unknown HW revisions.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1457352357-8433-1-git-send-email-chris@chris-wilson.co.uk

drm/i915: add module param "enable_dp_mst"

Adds an (unsafe; auto-kernel-tainting) boolean module parameter to the i915
drm driver: "enable_dp_mst", which is enabled by default.  Disabling the
parameter forces newly connected DisplayPort sinks to report as not
supporting multi-stream transport (MST), thus "forcing" the use of
single-stream transport (SST).

v2: rename parameter to conform to style
v3: add signoff

Signed-off-by: Nathan Schulte <nmschulte@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1458054845-5837-1-git-send-email-nmschulte@gmail.com

drm/i915: More renaming of rings to engines

This time using only sed and a few by hand.

v2: Rename also intel_ring_id and intel_ring_initialized.
v3: Fixed typo in intel_ring_initialized.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1458126040-33105-1-git-send-email-tvrtko.ursulin@linux.intel.com

drm/i915: More intel_engine_cs renaming

Some trivial ones, first pass done with Coccinelle:

@@
@@
(
- I915_NUM_RINGS
+ I915_NUM_ENGINES
|
- intel_ring_flag
+ intel_engine_flag
|
- for_each_ring
+ for_each_engine
|
- i915_gem_request_get_ring
+ i915_gem_request_get_engine
|
- intel_ring_idle
+ intel_engine_idle
|
- i915_gem_reset_ring_status
+ i915_gem_reset_engine_status
|
- i915_gem_reset_ring_cleanup
+ i915_gem_reset_engine_cleanup
|
- init_ring_lists
+ init_engine_lists
)

But that didn't fully work so I cleaned it up with:

for f in *.[hc]; do sed -i -e s/I915_NUM_RINGS/I915_NUM_ENGINES/ $f; done
for f in *.[hc]; do sed -i -e s/i915_gem_request_get_ring/i915_gem_request_get_engine/ $f; done
for f in *.[hc]; do sed -i -e s/intel_ring_flag/intel_engine_flag/ $f; done
for f in *.[hc]; do sed -i -e s/intel_ring_idle/intel_engine_idle/ $f; done
for f in *.[hc]; do sed -i -e s/init_ring_lists/init_engine_lists/ $f; done
for f in *.[hc]; do sed -i -e s/i915_gem_reset_ring_cleanup/i915_gem_reset_engine_cleanup/ $f; done
for f in *.[hc]; do sed -i -e s/i915_gem_reset_ring_status/i915_gem_reset_engine_status/ $f; done

v2: Rebase.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

drm/i915: Rename intel_engine_cs struct members

below and a couple manual fixups.

@@
identifier I, J;
@@
struct I {
...
- struct intel_engine_cs *J;
+ struct intel_engine_cs *engine;
...
}
@@
identifier I, J;
@@
struct I {
...
- struct intel_engine_cs J;
+ struct intel_engine_cs engine;
...
}
@@
struct drm_i915_private *d;
@@
(
- d->ring
+ d->engine
)
@@
struct i915_execbuffer_params *p;
@@
(
- p->ring
+ p->engine
)
@@
struct intel_ringbuffer *r;
@@
(
- r->ring
+ r->engine
)
@@
struct drm_i915_gem_request *req;
@@
(
- req->ring
+ req->engine
)

v2: Script missed the tracepoint code - fixed up by hand.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

drm/i915: Rename intel_engine_cs function parameters

@@
identifier func;
@@
func(..., struct intel_engine_cs *
- ring
+ engine
, ...)
{
<...
- ring
+ engine
...>
}
@@
identifier func;
type T;
@@
T func(..., struct intel_engine_cs *
- ring
+ engine
, ...);

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

drm/i915: Rename local struct intel_engine_cs variables

Done by the Coccinelle script below plus a manual
intervention to GEN8_RING_SEMAPHORE_INIT.

@@
expression E;
@@
- struct intel_engine_cs *ring = E;
+ struct intel_engine_cs *engine = E;
<+...
- ring
+ engine
...+>
@@
@@
- struct intel_engine_cs *ring;
+ struct intel_engine_cs *engine;
<+...
- ring
+ engine
...+>

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

drm/i915/bxt: Fix off-by-one error in Broxton PLL IDs

After the commit below the Broxton PLL IDs had an off-by-one error, so
fix this up. Also add a missing brace at intel_shared_dpll_init(), it
happened to compile only due to the way the IS_BROXTON macro is defined.

v2:
- remove debugging left-over

Fixes: a3c988ea068c ("drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll code")
CC: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
CC: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1457978134-12362-1-git-send-email-imre.deak@intel.com

drm/i915: Nuke fbc members from intel_crtc->atomic, v4.

Whenever there's an update to the primary plane,
fbc_pre_update and fbc_post_update are called. Kill off
intel_crtc->atomic.update_fbc and now that intel_crtc->atomic
is empty, kill it off too.

Changes since v1:
- Add a intel_fbc_supports_rotation helper.
Changes since v2:
- Remove intel_fbc_supports_rotation_helper.
- Remove unrelated changes.
Changes since v3:
- Rebase

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1457516145-32117-2-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

drm/i915: Remove some post-commit members from intel_crtc->atomic, v3.

fb_bits is useful to have in the crtc_state for cs flips when
the code is updated to use intel_frontbuffer_flip_prepare/complete.
So calculate it in advance and move it to crtc_state. The other stuff
can be calculated in post_plane_update, and aren't useful elsewhere.

Changes since v1:
- Changing wording, remove comment about loop.
Changes since v2:
- Rebase.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1457516145-32117-1-git-send-email-maarten.lankhorst@linux.intel.com

Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued

Backmerge because:
- Maarten needs latest atomic patches from drm-misc.
- Lionel needs the color manager core patch from drm-misc.
- Ander extracted intel_dpll_mgr.c, we need a backmerge to avoid git
  losing track of things too often (right now it seems ok due to
  cherry-picks).
- Tvrtko needs a stable baseline to apply some large-scale renaming
  patches to i915 GEM code.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

nouveau: fix nv40_perfctr_next() cleanup regression

gcc-6 warns about code in the nouveau driver that is obviously silly:

drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c: In function 'nv40_perfctr_next':
drivers/gpu/drm/nouveau/nvkm/engine/pm/nv40.c:62:19: warning: self-comparison always evaluats to false [-Wtautological-compare]
  if (pm->sequence != pm->sequence) {

The behavior was accidentally introduced in a patch described as "This is
purely preparation for upcoming commits, there should be no code changes here.".
As far as I can tell, that was true for the rest of that patch except for
this one function, which has been changed to a NOP.

This patch restores the original behavior.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 8c1aeaa13954 ("drm/nouveau/pm: cosmetic changes")
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

Merge tag 'topic/drm-misc-2016-03-14' of git://anongit.freedesktop.org/drm-intel into drm-next

* tag 'topic/drm-misc-2016-03-14' of git://anongit.freedesktop.org/drm-intel: (27 commits)
  drm: atomic helper: do not unreference error pointer
  drm/edid: Extract SADs properly from multiple audio data blocks
  drm: fix blob pointer check
  drm: introduce pipe color correction properties
  drm/atomic: Clean up update_connector_routing.
  drm/atomic: Clean up steal_encoder, v2.
  drm/atomic: Handle encoder assignment conflicts in a separate check, v3.
  drm/atomic: Handle encoder stealing from set_config better.
  drm/atomic: Always call steal_encoder, v2.
  drm/ast: removed optional dummy crtc mode_fixup function.
  drm/bochs: removed optional dummy crtc mode_fixup function.
  drm/fsl-dcu: removed optional dummy crtc mode_fixup function.
  drm/virtio: removed optional dummy crtc mode_fixup function.
  drm/nouveau/dispnv04: removed optional dummy crtc mode_fixup function.
  drm/atmel-hlcdc: remove optional dummy crtc mode_fixup function.
  drm/sti: removed optional dummy crtc mode_fixup function.
  drm/shmobile: removed optional dummy crtc mode_fixup function.
  drm/msm/mdp: removed optional dummy crtc mode_fixup function.
  drm/omapdrm: removed optional dummy crtc mode_fixup function.
  drm/rcar-du: removed optional dummy crtc mode_fixup function.
  ...

Merge tag 'drm-amdkfd-next-fixes-2016-03-15' of git://people.freedesktop.org/~gabbayo/linux into drm-next

* tag 'drm-amdkfd-next-fixes-2016-03-15' of git://people.freedesktop.org/~gabbayo/linux:
  drm/amdkfd: uninitialized variable in dbgdev_wave_control_set_registers()

drm/omap: fix panel/encoder probes

The recent changes which removed platform data support from panels &
encoders had a few mistakes, causing probes of DVI connector and DSI
command mode panels to fail every time due to missing '!'. Fix the
if()s.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

drm/amdkfd: uninitialized variable in dbgdev_wave_control_set_registers()

At the end of the function we expect "status" to be zero, but it's
either -EINVAL or uninitialized.

Fixes: 788bf83db301 ('drm/amdkfd: Add wave control operation to debugger')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>

Merge tag 'drm-vc4-next-2016-03-14' of github.com:anholt/linux into drm-next

This pull request covers what's left for 4.6.  Notably, it includes a
significant 3D performance improvement and a fix to HDMI hotplug
detection for the Pi2/3.

* tag 'drm-vc4-next-2016-03-14' of github.com:anholt/linux:
  drm/vc4: Recognize a more specific compatible string for V3D.
  dt-bindings: Add binding docs for V3D.
  drm/vc4: Return -EFAULT on copy_from_user() failure
  drm/vc4: Respect GPIO_ACTIVE_LOW on HDMI HPD if set in the devicetree.
  drm/vc4: Let gpiolib know that we're OK with sleeping for HPD.
  drm/vc4: improve throughput by pipelining binning and rendering jobs

drm/i915: Update DRIVER_DATE to 20160314

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

drm/vc4: Recognize a more specific compatible string for V3D.

The Raspberry Pi Foundation's firmware updates are shipping device
trees using the old string, so we'll keep recognizing that as this rev
of V3D.  Still, we should use a more specific name in the upstream DT
to clarify which board is being supported, in case we do other revs of
V3D in the future.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>

dt-bindings: Add binding docs for V3D.

This was missed in the upstreaming process.

Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>

Merge branch 'linux-4.6' of git://github.com/skeggsb/linux into drm-next

- GM20x secure boot support (hence, acceleration, finally \o/)
- GM200 support
- GM20B clock driver
- Support for power sensors on some GPUs
- Various other fixes all over the place

* 'linux-4.6' of git://github.com/skeggsb/linux: (95 commits)
  drm/nouveau/clk/gm20b: add basic driver
  drm/nouveau/clk/gk20a: share reusable structures/functions
  drm/nouveau/clk/gk20a: set lowest frequency during init()
  drm/nouveau/clk/gk20a: split gk20a_clk_new()
  drm/nouveau/clk/gk20a: abstract pl_to_div
  drm/nouveau/clk/gk20a: put mnp values into their own struct
  drm/nouveau/clk/gk20a: emit parent rate as debug message
  drm/nouveau/clk/gk20a: only restore divider to 1:1 if needed
  drm/nouveau/clk/gk20a: only compute n_lo if needed
  drm/nouveau/clk/gk20a: fix VCO bit mask
  drm/nouveau/clk/gk20a: rename enable/disable functions
  drm/nouveau/clk/gk20a: reorganize variables in gk20a_pllg_calc_mnp()
  drm/nouveau/clk/gk20a: convert parameters to Khz
  drm/nouveau/volt: add GM20B driver
  drm/nouveau/volt/gk20a: split constructor
  drm/nouveau/volt/gk20a: share reusable members & functions
  drm/nouveau/ce/gm107: expose MaxwellDmaCopyA
  drm/nouveau/fifo/gm107: KeplerChannelGpfifoB, and 2048 channels
  drm/nouveau/fifo/gk110: expose KeplerChannelGpfifoB
  drm/nouveau/fifo/gk104: submit NOP after all PBDMA_INTR_0, not just DEVICE
  ...

drm/nouveau/clk/gm20b: add basic driver

Add a basic clock driver that reuses the GK20A logic.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: share reusable structures/functions

Make functions/structures that the GM20B driver will reuse public.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: set lowest frequency during init()

Err on the safe side by setting the lowest frequency (and thus voltage)
during device init.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: split gk20a_clk_new()

This allows to instanciate drivers that use the same logic as gk20a with
different parameters.

Add a constructor function to allow other chips that inherit from this
clock to easily initialize its members

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: abstract pl_to_div

pl_to_div may be done differently depending on the chip. Abstract this
operation so the same logic can be reused for them as well.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: put mnp values into their own struct

This allows us to read them using one single function and will be handy
to the GM20B driver.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: emit parent rate as debug message

Most users are probably not interested in this information.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: only restore divider to 1:1 if needed

Only restore the 1:1 divider if it is not set already. Also use the
proper masks for this operation and add a second write as done in the
Android code.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: only compute n_lo if needed

n_lo is used if we are going to slide. Compute it only if that condition
succeeds to avoid confusion about future usage of this computation.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: fix VCO bit mask

Fix the mask specified to switch to VCO mode was given as an (incorrect)
immediate value. Although the side-effect happens to be the same, this
is clearly incorrect.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: rename enable/disable functions

gk20a_pllg_disable() is only used in the context of gk20a_clk_fini().
Move its body there and rename _gk20a_pllg_enable() and
_gk20a_pllg_disable() to non-underscored versions.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: reorganize variables in gk20a_pllg_calc_mnp()

Move some variables declarations to the scope where they are actually
used to make the code easier to follow.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk/gk20a: convert parameters to Khz

Perform computations in Khz instead of Mhz for better precision.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt: add GM20B driver

Add basic GM20B volt driver that reuses the GK20A logic.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt/gk20a: split constructor

Split the constructor function so we can reuse the same logic in other
chips.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/volt/gk20a: share reusable members & functions

The CVB calculation and voltage setting functions can be reused for the
future chips. So move the declaration to gk20a.h.

Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/gm107: expose MaxwellDmaCopyA

The HW accepts KeplerDmaCopyA and MaxwellDmaCopyA classes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gm107: KeplerChannelGpfifoB, and 2048 channels

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk110: expose KeplerChannelGpfifoB

This class supports a WFI method (0x0078) that's not present on the
KeplerChannelGpfifoA class.

The binary driver exposes both classes on these GPUs for some reason,
though there doesn't appear to be any difference in the setup that's
done for each (ie. even if you allocate GpfifoA, the WFI method will
still work).

We shall just expose GpfifoB, as I don't see a good reason to report
the presence of both.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: submit NOP after all PBDMA_INTR_0, not just DEVICE

Prevents the same interrupt from re-triggering forever.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: add vic plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: add sec plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: add nvdec plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: add nvenc plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: add msenc plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: add vic plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: add nvdec plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: add nvenc plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: add msenc plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: sort engine indices alphabetically

Unlike subdevs, these aren't initialised in a defined order.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: make use of topology info during gpfifo construction

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: make use of topology info during fault recovery

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: make use of topology info when handling ctxsw timeout

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: read device topology information from hw

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: cosmetic engine->runlist changes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: don't attempt recovery of unknown mmu engines

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: identify fault-recovery members more clearly

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: rename spoon to pbdma, and move detection to oneinit

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gf100: fix certain engines not being recovered after a fault

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gf100: don't attempt recovery of unknown mmu engines

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gf100: identify fault-recovery members more clearly

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gf100: rename spooon to pbdma, and move detection to oneinit

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/fuc: Store $r0 in interrupt handler

It's supposed to always be 0, but at least nv_iowr() temporarily violates
this. Since the ih touches $r0, it should be stored.

Signed-off-by: Roy Spliet <rs855@cam.ac.uk>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/fuc: use imm32 in ld/st macros

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/fuc: use the call macro instead of using the call instruction directly

the macro deals with target specific differences and so we should always use
this

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/fuc: replace mov+sethi with imm32

on gk208+ we can simply mov 32bits, so we should have a single mov there

v2: use or operator instead of add

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/fuc: fix imm32 for gk208+

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: use vzalloc for allocating ramht

Most calls to nvkm_ramht_new use 0x8000 as the size. This results in a
fairly sizeable chunk of memory to be allocated, which may not be
available with kzalloc. Since this is done fairly rarely (once per
channel), use vzalloc instead.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: kick channel upon removal

A channel may still be processed by the PBDMA even after removal, unless
it is properly kicked. Some chips are more sensible to this than others,
with GM20B triggering the issue very easily (the PBDMA will try to fetch
methods from the previously-removed channel after a new one is added).

Make sure this cannot happen by kicking the channel right after it is
disabled, and before the new runlist is submitted.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/instmem/gk20a: add write barrier when releasing DMA object

When using the DMA-API for instmem, we may obtain a write-combined
mapping. For such cases, add a write barrier in
gk20a_instobj_release_dma() to make sure that all writes have reached
memory at this time.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/device/pci: set as non-CPU-coherent on ARM64

Without this buffer inconsistencies may appear between the CPU
and GPU when using a PCI GPU on an ARM64 board.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/hwmon: fix crash on non-PCI platforms

Registration of the hwmon device will fail on non-PCI systems since
dev->pdev is NULL in that case. Use the more generic drm_device::dev
member that points to the same and is always set no matter the platform.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: silence unimportant HDMI status message

On non-PCI devices, nobody should really care if the device does not
provide HDMI...

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bo: consider DMA buffers on x86 only

The DMA API has different semantics on different architectures.
Currently on arm64, it can only provide memory from a small pool which
dries up quickly if we attempt to allocate big buffers from it.

Do not consider that option when running on non-x86, since regular TTM
buffers are the (current) best-fit for ARM platforms.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/gf100: use more reasonable timeout value

LTC operations timeout was set to 2ms, which may be too low for devices
that run at very low clocks (e.g. GM20B) and trigger timeout messages.

Set the timeout to the default 2s. Also remove the redundant error
messages since nvkm_wait_msec() will already display a warning.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: take runlist target into account

Bits 28:29 of RUNLIST_BASE specify the memory target of the runlist. Set
it to 0x3 (SYS_MEM_NONCOHERENT) if the runlist object resides in system
memory.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gf100: take runlist target into account

Bits 28:29 of RUNLIST_BASE specify the memory target of the runlist. Set
it to 0x3 (SYS_MEM_NONCOHERENT) if the runlist object resides in system
memory.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gk104: fix chid bit mask

Fix the channel id bit mask in FIFO schedule timeout error handling.

FIFO_ENGINE_STATUS_NEXT_ID is bit 27:16 thus 0x0fff0000.
FIFO_ENGINE_STATUS_ID      is bit 11:0  thus 0x00000fff.

Signed-off-by: Xia Yang <xiay@nvidia.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/instmem/gk20a: set DMA mask early

DMA mask is typically set in nouveau_ttm_init(), but this function is
called late during initialization and GK20A's instmem will have called
DMA functions before this happens.

Having a wrongly set DMA mask can result in the use of unneeded bounce
buffers. Set it early to avoid this.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gm206: remove implementation, it's now identical to gm200

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gm200: switch over to using sw_nonctx from firmware

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gm200: switch over to using sw_method_init from firmware

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gm200: switch over to using sw_bundle_init from firmware

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gm200: switch over to using sw_ctx from firmware

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/extdev: also parse v4.1 table

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>

drm/nouveau/hwmon: don't require therm to be valid to get any data

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>

drm/nouveau/hwmon: add power consumption

v2: expose only if the sensor reading is valid

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>

drm/nouveau/iccsense: implement for ina209, ina219 and ina3221

based on Martins initial work

v3: fix ina2x9 calculations
v4: don't kmalloc(0), fix the lsb/pga stuff
v5: add a field to tell if the power reading may be invalid
    add nkvm_iccsense_read_all function
    check for the device on the i2c bus

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>

drm/nouveau/nvbios/iccsense: add parsing of the SENSE table

Karol Herbst:
v4: don't kmalloc(0)
v5: stricter validation

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>

drm/nouveau/subdev/iccsense: add new subdev for power sensors

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>

drm/nouveau/secboot/gm20b: add secure boot support

Add secure boot support for the GM20B chip found in Tegra X1. Secure
boot on Tegra works slightly differently from desktop, notably in the
way the WPR region is set up.

In addition, the firmware bootloaders use a slightly different header
format.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/secboot/gm200: add secure-boot support

Add secure-boot for the dGPU set of GM20X chips, using the PMU as the
high-secure falcon.

This work is based on Deepak Goyal's initial port of Secure Boot to
Nouveau.

v2. use proper memory target function

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gm200: do not load firmware for secure falcons

Secure falcons' firmware is managed by secboot. Do not load it in GR for
them.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>