GitHub/moto-9609/android_kernel_motorola_exynos9610.git
8 years agodrm/amdgpu: stop adding dummy entry in amdgpu_ttm_placement_init
Christian König [Mon, 15 Aug 2016 12:08:54 +0000 (14:08 +0200)]
drm/amdgpu: stop adding dummy entry in amdgpu_ttm_placement_init

AMDGPU_GEM_CREATE_NO_CPU_ACCESS and AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED are
obviously mutual exclusive. So stop adding a dummy entry without effect when
both are specified.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: cleanup amdgpu_ttm_placement_init
Christian König [Mon, 15 Aug 2016 12:06:50 +0000 (14:06 +0200)]
drm/amdgpu: cleanup amdgpu_ttm_placement_init

Make it more clear what this function does. No intendet functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fix lru size grouping v2
Christian König [Wed, 17 Aug 2016 11:44:20 +0000 (13:44 +0200)]
drm/amdgpu: fix lru size grouping v2

Adding a BO can make it the insertion point for larger sizes as well.

v2: add a comment about the guard structure.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: Tidy up cz_hwmgr.c
Tom St Denis [Thu, 18 Aug 2016 14:25:52 +0000 (10:25 -0400)]
drm/amd/powerplay:  Tidy up cz_hwmgr.c

Clean up whitespace and formatting.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add AMDGPU_INFO_NUM_EVICTIONS
Marek Olšák [Wed, 17 Aug 2016 21:58:58 +0000 (23:58 +0200)]
drm/amdgpu: add AMDGPU_INFO_NUM_EVICTIONS

For profiling.

v2: really bump the minor version

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: recover vram bo from shadow after gpu reset V2
Chunming Zhou [Thu, 21 Jul 2016 09:20:52 +0000 (17:20 +0800)]
drm/amdgpu: recover vram bo from shadow after gpu reset V2

V2:
1. don't directly submit to many jobs at the same time.
2. delete unrelated printk.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: link all shadow bo V2
Chunming Zhou [Wed, 17 Aug 2016 03:41:30 +0000 (11:41 +0800)]
drm/amdgpu: link all shadow bo V2

V2:
1. use mutex instead of spinlock for shadow list, since its process could
sleep.
2. move list_del to bo destroy phase.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: update pt shadow while updating pt V2
Chunming Zhou [Mon, 15 Aug 2016 03:46:21 +0000 (11:46 +0800)]
drm/amdgpu: update pt shadow while updating pt V2

V2:
move shadow parameter to amdgpu_pte_update_params.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: minutemaidpark@hotmail.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: update pd shadow while updating pd V2
Chunming Zhou [Mon, 15 Aug 2016 03:36:54 +0000 (11:36 +0800)]
drm/amdgpu: update pd shadow while updating pd V2

V2:
Checking if shadow is valid.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: sync bo and shadow V3
Chunming Zhou [Thu, 4 Aug 2016 08:51:18 +0000 (16:51 +0800)]
drm/amdgpu: sync bo and shadow V3

Use shadow flag to judge which direction to sync.
V2:
Don't need bo pin, so remove it.

V3:
1. Split to two functions, one is backup_to_shadow, another is
restore_from_shadow.
2. Clean up previous shadow direction difinitions.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add direct submision option for copy_buffer
Chunming Zhou [Mon, 15 Aug 2016 02:46:04 +0000 (10:46 +0800)]
drm/amdgpu: add direct submision option for copy_buffer

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add need backup function V2
Chunming Zhou [Fri, 5 Aug 2016 09:30:17 +0000 (17:30 +0800)]
drm/amdgpu: add need backup function V2

V2:
add checking if need backup in amdgpu_bo_create.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: S3 resumed failed after 4-5 times loop
jimqu [Fri, 19 Aug 2016 01:31:50 +0000 (09:31 +0800)]
drm/amd/amdgpu: S3 resumed failed after 4-5 times loop

Phenomenon: software hang when device resume back, read UVD fence is 0xffffffff
and read pcie pid is 0xffff.
The issue is caused by VCE reset when update cg setting. according to HW programming
guide, adjust update VCE cg sequence.
The patch apply to VCE2.0.

Signed-off-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use domain's gpu_offset for start addr
Flora Cui [Thu, 18 Aug 2016 05:18:09 +0000 (13:18 +0800)]
drm/amdgpu: use domain's gpu_offset for start addr

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: update gart_pin_size only if the bo is pined to GTT
Flora Cui [Thu, 18 Aug 2016 05:17:07 +0000 (13:17 +0800)]
drm/amdgpu: update gart_pin_size only if the bo is pined to GTT

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: check domain sanity in amdgpu_bo_pin_restricted()
Flora Cui [Thu, 18 Aug 2016 04:55:13 +0000 (12:55 +0800)]
drm/amdgpu: check domain sanity in amdgpu_bo_pin_restricted()

abort if the bo is pined to other domain already

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agoamdgpu: move ttm stuff to amdgpu_ttm.h
Flora Cui [Tue, 2 Aug 2016 03:32:41 +0000 (11:32 +0800)]
amdgpu: move ttm stuff to amdgpu_ttm.h

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: enable power containment features for tonga.
Rex Zhu [Wed, 17 Aug 2016 07:48:30 +0000 (15:48 +0800)]
drm/amd/powerplay: enable power containment features for tonga.

v2: fix build error introduced when fix code style problems.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Add more debugfs config data
Tom St Denis [Wed, 17 Aug 2016 16:00:51 +0000 (12:00 -0400)]
drm/amd/amdgpu:  Add more debugfs config data

Adds family and external_rev_id to config data

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Hardcode virtual DCE vblank / scanout position return values
Emily Deng [Wed, 17 Aug 2016 06:59:20 +0000 (14:59 +0800)]
drm/amdgpu: Hardcode virtual DCE vblank / scanout position return values

For virtual display feature, by hardcoding 0 for the vblank counter and
-EINVAL for the scanout position return value, we signal to the core DRM code that there are
no hardware counters we can use for these.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Add more config data for debugfs
Tom St Denis [Fri, 12 Aug 2016 19:14:31 +0000 (15:14 -0400)]
drm/amd/amdgpu: Add more config data for debugfs

Adds rev_id as well as cg/pg flags to help debug runtime.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fix coding style in amdgpu_object.c
Christian König [Fri, 12 Aug 2016 14:50:12 +0000 (16:50 +0200)]
drm/amdgpu: fix coding style in amdgpu_object.c

Just a few 80 chars problems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add function pointer to the pte_update_params
Christian König [Fri, 12 Aug 2016 11:29:18 +0000 (13:29 +0200)]
drm/amdgpu: add function pointer to the pte_update_params

Remember what function to call while planning the commands instead
of figuring it our later on.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: stop splitting PTE commands into smaller ones
Christian König [Fri, 12 Aug 2016 10:59:59 +0000 (12:59 +0200)]
drm/amdgpu: stop splitting PTE commands into smaller ones

It doesn't make much sense to create bigger commands first which we then need
to split into smaller one again. Just make sure the commands we create aren't
to big in the first place.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove AMDGPU_VM_NO_FLUSH define
Christian König [Fri, 12 Aug 2016 09:40:11 +0000 (11:40 +0200)]
drm/amdgpu: remove AMDGPU_VM_NO_FLUSH define

Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: cleanup the write_pte implementations
Christian König [Fri, 12 Aug 2016 09:33:30 +0000 (11:33 +0200)]
drm/amdgpu: cleanup the write_pte implementations

We don't need the gart mapping handling here any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove pages_addr handling from the VM code
Christian König [Thu, 11 Aug 2016 14:44:15 +0000 (16:44 +0200)]
drm/amdgpu: remove pages_addr handling from the VM code

Not needed any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: write PTEs directly into the IB.
Christian König [Thu, 11 Aug 2016 12:06:54 +0000 (14:06 +0200)]
drm/amdgpu: write PTEs directly into the IB.

Write the PTEs at the end of the IB instead of directly into the SDMA commands.
This can save quite some CPU cycles building the entries.

This doesn't change the DW estimation because PTEs where embedded into the IB
before as well. It just moves them to the end of the IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add shadow flag V2
Chunming Zhou [Thu, 4 Aug 2016 07:47:50 +0000 (15:47 +0800)]
drm/amdgpu: add shadow flag V2

Indicate if need to sync between bo and shadow, where sync to where.
V2:
Rename to backup_shadow

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: allocate shadow for pd/pt bo V2
Chunming Zhou [Thu, 4 Aug 2016 05:59:32 +0000 (13:59 +0800)]
drm/amdgpu: allocate shadow for pd/pt bo V2

The pd/pt shadow bo will be used to backup page table, when gpu reset
happens, we can restore the page table by them.
V2:
Free shadow bo.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: validate shadow as well when validating bo
Chunming Zhou [Thu, 4 Aug 2016 05:05:46 +0000 (13:05 +0800)]
drm/amdgpu: validate shadow as well when validating bo

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add shadow bo support V2
Chunming Zhou [Tue, 26 Jul 2016 06:13:21 +0000 (14:13 +0800)]
drm/amdgpu: add shadow bo support V2

shadow bo is the shadow of a bo, which is always in GTT,
which can be used to backup the original bo.
V2:
reference shadow parent, shadow bo will be freed by who allocted him.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: UVD v6 register cleanup
Tom St Denis [Thu, 11 Aug 2016 14:08:22 +0000 (10:08 -0400)]
drm/amd/amdgpu: UVD v6 register cleanup

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: VCE v2 register cleanup
Tom St Denis [Thu, 11 Aug 2016 13:59:12 +0000 (09:59 -0400)]
drm/amd/amdgpu: VCE v2 register cleanup

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: add mutex in check_soft for VCE v3
Tom St Denis [Thu, 11 Aug 2016 13:55:51 +0000 (09:55 -0400)]
drm/amd/amdgpu: add mutex in check_soft for VCE v3

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Cleanup register access in VCE v3
Tom St Denis [Thu, 11 Aug 2016 13:44:53 +0000 (09:44 -0400)]
drm/amd/amdgpu: Cleanup register access in VCE v3

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agoFixing copy-paste errors and removing unneeded newlines
Alexandre Demers [Wed, 10 Aug 2016 07:02:04 +0000 (03:02 -0400)]
Fixing copy-paste errors and removing unneeded newlines

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm: Add DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags v2
Michel Dänzer [Mon, 8 Aug 2016 07:23:39 +0000 (16:23 +0900)]
drm: Add DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags v2

These flags allow userspace to explicitly specify the target vertical
blank period when a flip should take effect.

v2:
* Add new struct drm_mode_crtc_page_flip_target instead of modifying
  struct drm_mode_crtc_page_flip, to make sure all existing userspace
  code keeps compiling (Daniel Vetter)

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Set MASTER_UPDATE_MODE to 0 again
Michel Dänzer [Thu, 4 Aug 2016 03:39:40 +0000 (12:39 +0900)]
drm/radeon: Set MASTER_UPDATE_MODE to 0 again

With the previous change, it's safe to let page flips take effect
anytime during a vertical blank period.

This can avoid delaying a flip by a frame in some cases where we get to
radeon_flip_work_func -> adev->mode_info.funcs->page_flip during a
vertical blank period.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Provide page_flip_target hook
Michel Dänzer [Thu, 4 Aug 2016 03:39:39 +0000 (12:39 +0900)]
drm/radeon: Provide page_flip_target hook

Now we can program a flip during a vertical blank period, if it's the
one targeted by the flip (or a later one). This allows simplifying
radeon_flip_work_func considerably.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Set MASTER_UPDATE_MODE to 0 again
Michel Dänzer [Thu, 4 Aug 2016 03:39:38 +0000 (12:39 +0900)]
drm/amdgpu: Set MASTER_UPDATE_MODE to 0 again

With the previous change, it's safe to let page flips take effect
anytime during a vertical blank period.

This can avoid delaying a flip by a frame in some cases where we get to
amdgpu_flip_work_func -> adev->mode_info.funcs->page_flip during a
vertical blank period.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Provide page_flip_target hook
Michel Dänzer [Thu, 4 Aug 2016 03:39:37 +0000 (12:39 +0900)]
drm/amdgpu: Provide page_flip_target hook

Now we can program a flip during a vertical blank period, if it's the
one targeted by the flip (or a later one). This allows simplifying
amdgpu_flip_work_func considerably.

agd: update dce_virtual.c as well.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm: Add page_flip_target CRTC hook v2
Michel Dänzer [Mon, 8 Aug 2016 07:23:03 +0000 (16:23 +0900)]
drm: Add page_flip_target CRTC hook v2

Mostly the same as the existing page_flip hook, but takes an additional
parameter specifying the target vertical blank period when the flip
should take effect.

v2:
* Add curly braces around else statement corresponding to an if block
  with curly braces (Alex Deucher)
* Call drm_crtc_vblank_put in the error case (Daniel Vetter)
* Clarify entry point documentation comment (Daniel Vetter)

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agogpu: drm: radeon: radeon_i2c: don't print error when adding adapter fails
Wolfram Sang [Tue, 9 Aug 2016 11:30:30 +0000 (13:30 +0200)]
gpu: drm: radeon: radeon_i2c: don't print error when adding adapter fails

The core will do this for us now.

Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agogpu: drm: amd: amdgpu: amdgpu_i2c: don't print error when adding adapter fails
Wolfram Sang [Tue, 9 Aug 2016 11:30:27 +0000 (13:30 +0200)]
gpu: drm: amd: amdgpu: amdgpu_i2c: don't print error when adding adapter fails

The core will do this for us now.

Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use more than 64KB fragment size if possible
Christian König [Mon, 8 Aug 2016 12:40:18 +0000 (14:40 +0200)]
drm/amdgpu: use more than 64KB fragment size if possible

We align to 64KB, but when userspace aligns even more we can easily use more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: flip frag_ptes and update_pts
Christian König [Fri, 5 Aug 2016 11:56:35 +0000 (13:56 +0200)]
drm/amdgpu: flip frag_ptes and update_pts

We can add the fragment params before we split the update for the page tables.
That should save a few CPU cycles for larger updates.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add adev to the pte_update_params
Christian König [Thu, 4 Aug 2016 13:02:49 +0000 (15:02 +0200)]
drm/amdgpu: add adev to the pte_update_params

No need to carry that forward as a separate parameter.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: rename amdgpu_vm_update_params
Christian König [Thu, 4 Aug 2016 12:52:50 +0000 (14:52 +0200)]
drm/amdgpu: rename amdgpu_vm_update_params

Well those are actually page table entry parameters.
This also makes the variable names used a bit shorter.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: cleanup VM fragment defines
Christian König [Wed, 3 Aug 2016 15:46:42 +0000 (17:46 +0200)]
drm/amdgpu: cleanup VM fragment defines

We can actually do way more than just the 64KB we currently used as default.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove unused VM defines
Christian König [Wed, 3 Aug 2016 15:39:26 +0000 (17:39 +0200)]
drm/amdgpu: remove unused VM defines

Not used for a long time.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Simplify bitfield operations in gfx v8
Tom St Denis [Tue, 9 Aug 2016 14:13:21 +0000 (10:13 -0400)]
drm/amd/amdgpu: Simplify bitfield operations in gfx v8

This patch introduces a new macro WREG32_FIELD which is used
to write to a register with a new value in a field.  It's designed
to replace the pattern:

tmp = RREG32(mmFoo);
tmp &= ~REG__FIELD_MASK;
tmp |= new_value << REG__FIELD__SHIFT;
WREG32(mmFoo, tmp)

with:

WREG32_FIELD(Foo, FIELD, new_value);

Unlike WREG32_P() it understands offsets/masks and doesn't
require the caller to shift the value (or mask properly).

It's applied where suitable in the gfx_v8_0.c driver to start
with.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Simplify various gfx v8 functions
Tom St Denis [Tue, 9 Aug 2016 14:10:30 +0000 (10:10 -0400)]
drm/amd/amdgpu: Simplify various gfx v8 functions

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Correct whitespace in GFX v8
Tom St Denis [Tue, 9 Aug 2016 14:07:36 +0000 (10:07 -0400)]
drm/amd/amdgpu: Correct whitespace in GFX v8

Fix various whitespace issues in gfx v8 driver.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Change the virtual_display type from int to char*.
Emily Deng [Wed, 10 Aug 2016 08:01:25 +0000 (16:01 +0800)]
drm/amdgpu: Change the virtual_display type from int to char*.

For virtual display feature, as there may be multiple GPUs,
for user could choose whiche GPU need to enable this feature, change
the type of virtual_display from int to char*. The variable will be set
like this virtual_display="xxxx:xx:xx.x;xxxx:xx:xx.x;".

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add virtual dce support for iceland
Alex Deucher [Mon, 8 Aug 2016 18:45:29 +0000 (14:45 -0400)]
drm/amdgpu: add virtual dce support for iceland

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/virtual_dce: add case for topaz for disable_dce
Alex Deucher [Mon, 8 Aug 2016 18:40:04 +0000 (14:40 -0400)]
drm/amdgpu/virtual_dce: add case for topaz for disable_dce

This asic has no DCE block.  Also clarify the error message
for unmatched chips.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move vsync_timer_enabled setup to dce virtual early_init
Alex Deucher [Mon, 8 Aug 2016 18:35:55 +0000 (14:35 -0400)]
drm/amdgpu: move vsync_timer_enabled setup to dce virtual early_init

Put it in one place.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Set ip_blocks according variable amdgpu_virtual_display.
Emily Deng [Mon, 8 Aug 2016 03:37:50 +0000 (11:37 +0800)]
drm/amdgpu: Set ip_blocks according variable amdgpu_virtual_display.

For virtual display feature, if user set the option "amdgpu.virtual_display=1"
when load amdgpu.ko. Then need to set the ip_blocks with virtual display ip
blocks. And when enable virtual display, the amdgpu_dal need to be set to zero.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Define one variable for virtual display.
Emily Deng [Mon, 8 Aug 2016 03:37:29 +0000 (11:37 +0800)]
drm/amdgpu: Define one variable for virtual display.

For virtual display feature, define on variable in amdgpu.ko. When want to
enable virtual display feature, need set the option "amdgpu.virtual_display=1".
And then disable vga render and crtc if have DCE engine.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Define virtual display ip blocks.
Emily Deng [Mon, 8 Aug 2016 03:36:45 +0000 (11:36 +0800)]
drm/amdgpu: Define virtual display ip blocks.

For virtual display feature, define virtual display ip blocks, and set
dce_virtual_ip_funcs to DCE block.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Add DRM_MODE_CONNECTOR_VIRTUAL connector in amdgpu_connector_add.
Emily Deng [Mon, 8 Aug 2016 03:36:31 +0000 (11:36 +0800)]
drm/amdgpu: Add DRM_MODE_CONNECTOR_VIRTUAL connector in amdgpu_connector_add.

For virtual display feature, add one connector type in amdgpu_connector_add.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Call pageflip irq funtion when receiced vsync interrupt.
Emily Deng [Mon, 8 Aug 2016 03:36:07 +0000 (11:36 +0800)]
drm/amdgpu: Call pageflip irq funtion when receiced vsync interrupt.

For virtual display feature, as there is no dce engine, so no pageflip irq
generated. So directly call pageflip irq funtion when received vysn interrupt.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Use software timer to generate vsync interrupt.
Emily Deng [Mon, 8 Aug 2016 03:35:39 +0000 (11:35 +0800)]
drm/amdgpu: Use software timer to generate vsync interrupt.

For virtual display feature, use the software timer to
simulate the vsync interrupt.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Disable VGA render and crtc when init GMC.
Emily Deng [Mon, 8 Aug 2016 03:33:11 +0000 (11:33 +0800)]
drm/amdgpu: Disable VGA render and crtc when init GMC.

For virtual display feature, when the GPU has DCE engine, need to disable
the VGA render and CRTC, or it will hang when initialize GMC.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: To define whether the GPU has DCE engine.
Emily Deng [Mon, 8 Aug 2016 03:32:35 +0000 (11:32 +0800)]
drm/amdgpu: To define whether the GPU has DCE engine.

For virtual display feature, when the GPU has DCE engine, need to disable
the VGA render and CRTC, or it will hang when initialize GMC. So first detect
whether the GPU has DCE engine.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize dce_virtual_crtc_funcs. (v2)
Emily Deng [Mon, 8 Aug 2016 03:32:22 +0000 (11:32 +0800)]
drm/amdgpu: Initialize dce_virtual_crtc_funcs. (v2)

For virtual display feature, initialize dce_virtual_crtc_funcs.

v2: agd: rebase on upstream

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize dce_virtual_crtc_helper_funcs
Emily Deng [Mon, 8 Aug 2016 03:32:00 +0000 (11:32 +0800)]
drm/amdgpu: Initialize dce_virtual_crtc_helper_funcs

For virtual display feature, initialize dce_virtual_crtc_helper_funcs.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize crtc, pageflip irq funcs (v2)
Emily Deng [Mon, 8 Aug 2016 03:31:37 +0000 (11:31 +0800)]
drm/amdgpu: Initialize crtc, pageflip irq funcs (v2)

For virtual display feature, initialize dce_virtual_crtc_irq_funcs,
dce_virtual_pageflip_irq_funcs. As it has no dce engine, so the
pageflip interrupt won't be generated, and the vsync interrupt will
be generated by smu's periodic timer or software timer which will
be implemented later.

v2: agd: rebase on upstream

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize dce_virtual_display_funcs.
Emily Deng [Mon, 8 Aug 2016 03:31:13 +0000 (11:31 +0800)]
drm/amdgpu: Initialize dce_virtual_display_funcs.

For virtual display feature, initialize dce_virtual_display_funcs,
which will be used in function dce_virtual_set_display_funcs.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize dce_virtual_ip_funcs
Emily Deng [Mon, 8 Aug 2016 03:30:50 +0000 (11:30 +0800)]
drm/amdgpu: Initialize dce_virtual_ip_funcs

For virtual display feature, first need to initialize dce_virtual_ip_funcs,
which will be used when set ip blocks.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Add virtual connector and encoder macros.
Emily Deng [Mon, 8 Aug 2016 03:30:34 +0000 (11:30 +0800)]
drm/amdgpu: Add virtual connector and encoder macros.

For virtual display feature, add virtual connector and encoder macros.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Don't retry 7 times in amdgpu_atombios_dp_get_dpcd()
Lyude [Sat, 6 Aug 2016 00:30:37 +0000 (20:30 -0400)]
drm/amdgpu: Don't retry 7 times in amdgpu_atombios_dp_get_dpcd()

When this code was written, we didn't retry DP aux transactions on any
error, which required retrying important transactions like this in
individual drivers. Since that's no longer the case, retrying here is
not necessary. As well, we retry any aux transaction on any error 32
times. 7 * 32 = 224, which means this loop causes us to retry grabbing
the dpcd 224 times. This is definitely far more then we actually need to
do.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Don't print error on aux transaction timeouts
Lyude [Sat, 6 Aug 2016 00:30:36 +0000 (20:30 -0400)]
drm/amdgpu: Don't print error on aux transaction timeouts

Since it's normal for DRM to retry our aux transaction helpers multiple
times in a row, up to 32 times for each attempted transaction, we're
making a lot of noise that is no longer necessary now that DRM will just
print the return code we give it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Don't retry 7 times in radeon_dp_dpcd()
Lyude [Sat, 6 Aug 2016 00:30:35 +0000 (20:30 -0400)]
drm/radeon: Don't retry 7 times in radeon_dp_dpcd()

When this code was written, we didn't retry DP aux transactions on any
error, which required retrying important transactions like this in
individual drivers. Since that's no longer the case, retrying here is
not necessary. As well, we retry any aux transaction on any error 32
times. 7 * 32 = 224, which means this loop causes us to retry grabbing
the dpcd 224 times. This is definitely far more then we actually need to
do.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Don't print error on aux transaction timeouts
Lyude [Sat, 6 Aug 2016 00:30:34 +0000 (20:30 -0400)]
drm/radeon: Don't print error on aux transaction timeouts

Since it's normal for DRM to retry our aux transaction helpers multiple
times in a row, up to 32 times for each attempted transaction, we're
making a lot of noise that is no longer necessary now that DRM will just
print the return code we give it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/ttm: Remove unused parameter evict from ttm_bo_move_memcpy
Michel Dänzer [Mon, 8 Aug 2016 03:28:26 +0000 (12:28 +0900)]
drm/ttm: Remove unused parameter evict from ttm_bo_move_memcpy

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/ttm: Remove unused parameter evict from ttm_bo_move_ttm
Michel Dänzer [Mon, 8 Aug 2016 03:28:25 +0000 (12:28 +0900)]
drm/ttm: Remove unused parameter evict from ttm_bo_move_ttm

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/ttm: Wait for a BO to become idle before unbinding it from GTT
Michel Dänzer [Fri, 5 Aug 2016 09:36:10 +0000 (18:36 +0900)]
drm/ttm: Wait for a BO to become idle before unbinding it from GTT

Fixes hangs under memory pressure, e.g. running the piglit test
tex3d-maxsize concurrently with other tests.

Fixes: 17d33bc9d6ef ("drm/ttm: drop waiting for idle in ttm_bo_evict.")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move all Kconfig options to amdgpu/Kconfig
Alex Deucher [Thu, 31 Mar 2016 22:18:28 +0000 (18:18 -0400)]
drm/amdgpu: move all Kconfig options to amdgpu/Kconfig

For consistency.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: enable powerplay as default on CZ/ST
Huang Rui [Mon, 18 Apr 2016 15:29:32 +0000 (23:29 +0800)]
drm/amd/powerplay: enable powerplay as default on CZ/ST

Enable powerplay as default on Carrizo and Stoney. And it can be
disabled with amdgpu.powerplay=0.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: Rex Zhu <Rex.Zhu@amd.com>
Cc: Flora Cui <Flora.Cui@amd.com>
Cc: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: change structure variable name.
Rex Zhu [Mon, 1 Aug 2016 02:49:00 +0000 (10:49 +0800)]
drm/amd/powerplay: change structure variable name.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: delete code set/unset deep_sleep/power_containment.
Rex Zhu [Wed, 3 Aug 2016 06:37:19 +0000 (14:37 +0800)]
drm/amd/powerplay: delete code set/unset deep_sleep/power_containment.

they were controled by module parameter.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: enable VCE soft reset
Chunming Zhou [Wed, 3 Aug 2016 07:15:37 +0000 (15:15 +0800)]
drm/amdgpu: enable VCE soft reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove RB1_BUSY bit checking
Rex Zhu [Wed, 3 Aug 2016 07:10:28 +0000 (15:10 +0800)]
drm/amdgpu: remove RB1_BUSY bit checking

This is a workaround to let VCE soft reset work.
RB1_BUSY bit is always set, so remove its checking now, and we
will depend on RB0_BUSY currently.
After we find the root cause of RB1_BUSY, we can add it back.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fix harvest config checking in vce3 check_soft_reset
Chunming Zhou [Wed, 3 Aug 2016 06:55:46 +0000 (14:55 +0800)]
drm/amdgpu: fix harvest config checking in vce3 check_soft_reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: irq resume should be immediately after gpu resume
Chunming Zhou [Wed, 27 Jul 2016 05:15:20 +0000 (13:15 +0800)]
drm/amdgpu: irq resume should be immediately after gpu resume

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Partially revert change to UVD v3 CG
Tom St Denis [Wed, 3 Aug 2016 16:37:23 +0000 (12:37 -0400)]
drm/amd/amdgpu: Partially revert change to UVD v3 CG

Partially undo changes made by commit:

drm/amd/amdgpu: don't track state in UVD clockgating

To keep bypass even if CG flags are not set.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable VCE MGCG for Stoney
Tom St Denis [Wed, 3 Aug 2016 15:34:35 +0000 (11:34 -0400)]
drm/amd/amdgpu: Enable VCE MGCG for Stoney

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable VCE MGCG for Carrizo
Tom St Denis [Wed, 3 Aug 2016 14:16:17 +0000 (10:16 -0400)]
drm/amd/amdgpu: Enable VCE MGCG for Carrizo

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Don't set VCE CG in startup
Tom St Denis [Wed, 3 Aug 2016 14:15:48 +0000 (10:15 -0400)]
drm/amd/amdgpu: Don't set VCE CG in startup

It's handled by DPM/PP properly.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Fix VCE CG order and resume defaults
Tom St Denis [Wed, 3 Aug 2016 14:15:24 +0000 (10:15 -0400)]
drm/amd/amdgpu: Fix VCE CG order and resume defaults

CG was being enabled in reverse sense from dpm/powerplay.
Also fix the default CLK_EN signal to enable all of the blocks.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: fix indentation in vce3 CG
Tom St Denis [Wed, 3 Aug 2016 14:14:44 +0000 (10:14 -0400)]
drm/amd/amdgpu: fix indentation in vce3 CG

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove the check for sessions being closed
Leo Liu [Wed, 3 Aug 2016 13:25:59 +0000 (09:25 -0400)]
drm/amdgpu: remove the check for sessions being closed

This will make clock and power gated when no block decoded, for example
when paused during the playback.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: print more accurate error messages on IB submission failure
Marek Olšák [Fri, 29 Jul 2016 22:48:39 +0000 (00:48 +0200)]
drm/amdgpu: print more accurate error messages on IB submission failure

It's useful for debugging.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use the kernel zone memory size as the max remote memory in amdgpu
Ken Wang [Wed, 27 Jul 2016 11:18:01 +0000 (19:18 +0800)]
drm/amdgpu: use the kernel zone memory size as the max remote memory in amdgpu

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/ttm: Add interface to export kernel_zone max memory size in ttm
Ken Wang [Wed, 27 Jul 2016 11:12:15 +0000 (19:12 +0800)]
drm/ttm: Add interface to export kernel_zone max memory size in ttm

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powrplay: delete code no longer in use on Polaris.
Rex Zhu [Sun, 31 Jul 2016 05:46:01 +0000 (13:46 +0800)]
drm/amd/powrplay: delete code no longer in use on Polaris.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powrplay: workaround Memory EDC Error for certain partner boards.
Rex Zhu [Fri, 29 Jul 2016 11:26:36 +0000 (19:26 +0800)]
drm/amd/powrplay: workaround Memory EDC Error for certain partner boards.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: AMD SW workaround for certain partner boards
Rex Zhu [Fri, 29 Jul 2016 11:19:26 +0000 (19:19 +0800)]
drm/amdgpu: AMD SW workaround for certain partner boards

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>