GitHub/exynos8895/android_kernel_samsung_universal8895.git
13 years agoARM: kprobes: Migrate ARM space_cccc_01xx to decoding tables
Jon Medhurst [Thu, 9 Jun 2011 08:12:58 +0000 (09:12 +0100)]
ARM: kprobes: Migrate ARM space_cccc_01xx to decoding tables

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Migrate ARM space_cccc_0111__1 to decoding tables
Jon Medhurst [Wed, 8 Jun 2011 17:09:36 +0000 (18:09 +0100)]
ARM: kprobes: Migrate ARM space_cccc_0111__1 to decoding tables

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Migrate ARM space_cccc_0110__1 to decoding tables
Jon Medhurst [Wed, 8 Jun 2011 16:36:45 +0000 (17:36 +0100)]
ARM: kprobes: Migrate ARM space_cccc_0110__1 to decoding tables

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add emulate_rd12rn16rm0_rwflags_nopc()
Jon Medhurst [Thu, 9 Jun 2011 16:23:50 +0000 (17:23 +0100)]
ARM: kprobes: Add emulate_rd12rn16rm0_rwflags_nopc()

This is the emulation function for the instruction format used by the
ARM media instructions.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Migrate ARM space_cccc_001x to decoding tables
Jon Medhurst [Wed, 8 Jun 2011 13:39:11 +0000 (14:39 +0100)]
ARM: kprobes: Migrate ARM space_cccc_001x to decoding tables

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Migrate ARM space_cccc_000x to decoding tables
Jon Medhurst [Tue, 7 Jun 2011 08:58:11 +0000 (09:58 +0100)]
ARM: kprobes: Migrate ARM space_cccc_000x to decoding tables

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Migrate ARM LDRD and STRD to decoding tables
Jon Medhurst [Mon, 6 Jun 2011 14:07:42 +0000 (15:07 +0100)]
ARM: kprobes: Migrate ARM LDRD and STRD to decoding tables

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add emulate_ldrdstrd()
Jon Medhurst [Thu, 9 Jun 2011 16:39:42 +0000 (17:39 +0100)]
ARM: kprobes: Add emulate_ldrdstrd()

This is an emulation function for the LDRD and STRD instructions.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Migrate ARM data-processing (register) instructions to decoding tables
Jon Medhurst [Mon, 6 Jun 2011 15:52:50 +0000 (16:52 +0100)]
ARM: kprobes: Migrate ARM data-processing (register) instructions to decoding tables

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add emulate_rd12rn16rm0rs8_rwflags()
Jon Medhurst [Thu, 9 Jun 2011 16:35:36 +0000 (17:35 +0100)]
ARM: kprobes: Add emulate_rd12rn16rm0rs8_rwflags()

This is the emulation function for the instruction format used by the
ARM data-processing instructions.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add BLX macro
Jon Medhurst [Thu, 7 Jul 2011 13:03:08 +0000 (14:03 +0100)]
ARM: kprobes: Add BLX macro

This is for use by inline assembler which will be added to kprobes-arm.c
It saves memory when used on newer ARM architectures and also provides
correct interworking should ARM probes be required on Thumb kernels in
the future.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add alu_write_pc()
Jon Medhurst [Fri, 1 Jul 2011 16:32:06 +0000 (17:32 +0100)]
ARM: kprobes: Add alu_write_pc()

This writes a new value to PC which was obtained as the result of an ARM
ALU instruction. For ARMv7 and later this performs interworking.

On ARM kernels we shouldn't encounter any ALU instructions trying to
switch to Thumb mode so support for this isn't strictly necessary.
However, the approach taken in all other instruction decoding is for us
to avoid unpredictable modification of the PC for security reasons. This
is usually achieved by rejecting insertion of probes on problematic
instruction, but for ALU instructions we can't do this as it depends on
the contents of the CPU registers at the time the probe is hit. So, as
we require some form of run-time checking to trap undesirable PC
modification, we may as well simulate the instructions correctly, i.e.
in the way they would behave in the absence of a probe.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Migrate ARM space_1111 to decoding tables
Jon Medhurst [Mon, 6 Jun 2011 11:20:25 +0000 (12:20 +0100)]
ARM: kprobes: Migrate ARM space_1111 to decoding tables

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb multiply and absolute difference instructions
Jon Medhurst [Sun, 3 Jul 2011 14:15:59 +0000 (15:15 +0100)]
ARM: kprobes: Decode 32-bit Thumb multiply and absolute difference instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb long multiply and divide instructions
Jon Medhurst [Sun, 3 Jul 2011 14:15:11 +0000 (15:15 +0100)]
ARM: kprobes: Decode 32-bit Thumb long multiply and divide instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb data-processing (register) instructions
Jon Medhurst [Sun, 3 Jul 2011 14:07:19 +0000 (15:07 +0100)]
ARM: kprobes: Decode 32-bit Thumb data-processing (register) instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb load/store single data item instructions
Jon Medhurst [Sun, 3 Jul 2011 14:04:26 +0000 (15:04 +0100)]
ARM: kprobes: Decode 32-bit Thumb load/store single data item instructions

We will reject probing of unprivileged load and store instructions.
These rarely occur and writing test cases for them is difficult.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb memory hint instructions
Jon Medhurst [Sun, 3 Jul 2011 14:00:42 +0000 (15:00 +0100)]
ARM: kprobes: Decode 32-bit Thumb memory hint instructions

We'll treat the preload instructions as nops as they are just
performance hints.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Reject 32-bit Thumb coprocessor and SIMD instructions
Jon Medhurst [Sun, 3 Jul 2011 13:57:18 +0000 (14:57 +0100)]
ARM: kprobes: Reject 32-bit Thumb coprocessor and SIMD instructions

The kernel doesn't currently support VFP or Neon code, and probing of
code with CP15 operations is fraught with bad consequences. So we will
just reject probing these instructions.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb branch instructions
Jon Medhurst [Sun, 3 Jul 2011 13:53:45 +0000 (14:53 +0100)]
ARM: kprobes: Decode 32-bit Thumb branch instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit miscellaneous control instructions
Jon Medhurst [Sun, 3 Jul 2011 13:52:18 +0000 (14:52 +0100)]
ARM: kprobes: Decode 32-bit miscellaneous control instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb data-processing (plain binary immediate) instructions
Jon Medhurst [Sun, 3 Jul 2011 13:40:26 +0000 (14:40 +0100)]
ARM: kprobes: Decode 32-bit Thumb data-processing (plain binary immediate) instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb data-processing (modified immediate) instructions
Jon Medhurst [Sun, 3 Jul 2011 13:36:35 +0000 (14:36 +0100)]
ARM: kprobes: Decode 32-bit Thumb data-processing (modified immediate) instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb data-processing (shifted register) instructions
Jon Medhurst [Sun, 3 Jul 2011 13:31:58 +0000 (14:31 +0100)]
ARM: kprobes: Decode 32-bit Thumb data-processing (shifted register) instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb table branch instructions
Jon Medhurst [Sun, 3 Jul 2011 13:26:16 +0000 (14:26 +0100)]
ARM: kprobes: Decode 32-bit Thumb table branch instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb load/store dual and load/store exclusive instructions
Jon Medhurst [Sun, 3 Jul 2011 13:23:21 +0000 (14:23 +0100)]
ARM: kprobes: Decode 32-bit Thumb load/store dual and load/store exclusive instructions

We reject probing of load/store exclusive instructions because any
emulation routine could never succeed in gaining exclusive access as the
exception framework clears the exclusivity monitor when a probes
breakpoint is hit.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb load/store multiple instructions
Jon Medhurst [Thu, 7 Jul 2011 07:59:32 +0000 (08:59 +0100)]
ARM: kprobes: Decode 32-bit Thumb load/store multiple instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Optimise emulation of LDM and STM
Jon Medhurst [Tue, 14 Jun 2011 14:54:28 +0000 (15:54 +0100)]
ARM: kprobes: Optimise emulation of LDM and STM

This patch improves the performance of LDM and STM instruction
emulation. This is desirable because.

- jprobes and kretprobes probe the first instruction in a function and,
  when the frame pointer is omitted, this instruction is often a STM
  used to push registers onto the stack.

- The STM and LDM instructions are common in the body and tail of
  functions.

- At the same time as being a common instruction form, they also have
  one of the slowest and most complicated simulation routines.

The approach taken to optimisation is to use emulation rather than
simulation, that is, a modified form of the instruction is run with
an appropriate register context.

Benchmarking on an OMAP3530 shows the optimised emulation is between 2
and 3 times faster than the simulation routines. On a Kirkwood based
device the relative performance was very significantly better than this.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add common decoding function for LDM and STM
Jon Medhurst [Thu, 7 Jul 2011 07:57:22 +0000 (08:57 +0100)]
ARM: kprobes: Add common decoding function for LDM and STM

The encoding of these instructions is substantially the same for both
ARM and Thumb, so we can have common decoding and simulation functions.

This patch moves the simulation functions from kprobes-arm.c to
kprobes-common.c. It also adds a new simulation function
(simulate_ldm1_pc) for the case where we load into PC because this may
need to interwork.

The instruction decoding is done by a custom function
(kprobe_decode_ldmstm) rather than just relying on decoding table
entries because we will later be adding optimisation code.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add load_write_pc()
Jon Medhurst [Fri, 10 Jun 2011 19:29:04 +0000 (20:29 +0100)]
ARM: kprobes: Add load_write_pc()

This writes a value to PC which was obtained as the result of a
LDR or LDM instruction. For ARMv5T and later this must perform
interworking.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 32-bit Thumb hint instructions
Jon Medhurst [Sun, 3 Jul 2011 12:55:47 +0000 (13:55 +0100)]
ARM: kprobes: Decode 32-bit Thumb hint instructions

For hints which may have observable effects, like SEV (send event), we
use kprobe_emulate_none which emulates the hint by executing the
original instruction.

For NOP we simulate the instruction using kprobe_simulate_nop, which
does nothing. As probes execute with interrupts disabled this is also
used for hints which may block for an indefinite time, like WFE (wait
for event).

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Reject 16-bit Thumb SETEND, CPS and BKPT instructions
Jon Medhurst [Sat, 2 Jul 2011 15:39:07 +0000 (16:39 +0100)]
ARM: kprobes: Reject 16-bit Thumb SETEND, CPS and BKPT instructions

These are very rare and/or problematic to emulate so we will take the
easy option and disallow probing them (as does the existing ARM
implementation).

Rejecting these instructions doesn't actually require any entries in the
decoding table as it is the default case for instructions which aren't
found.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 16-bit Thumb branch instructions
Jon Medhurst [Sat, 2 Jul 2011 15:30:43 +0000 (16:30 +0100)]
ARM: kprobes: Decode 16-bit Thumb branch instructions

We previously changed the behaviour of probes so that conditional
instructions don't fire when the condition isn't met. For ARM branches,
and Thumb branches in IT blocks, this means they don't fire if the
branch isn't taken.

For consistency, we implement the same for Thumb conditional branch
instructions. This involves setting up insn_check_cc to point to the
relevant condition checking function. As the emulation routine is only
called when this condition passes, it doesn't need to check again and
can unconditionally update PC.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Reject 16-bit Thumb SVC and UNDEFINED instructions
Jon Medhurst [Sat, 2 Jul 2011 15:25:47 +0000 (16:25 +0100)]
ARM: kprobes: Reject 16-bit Thumb SVC and UNDEFINED instructions

SVC (SWI) instructions shouldn't occur in kernel code so we don't
need to be able to probe them.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 16-bit Thumb IT instruction
Jon Medhurst [Sat, 2 Jul 2011 15:16:05 +0000 (16:16 +0100)]
ARM: kprobes: Decode 16-bit Thumb IT instruction

The normal Thumb singlestepping routine updates the IT state after
calling the instruction handler. We don't what this to happen after the
IT instruction simulation sets the IT state, therefore we need to
provide a custom singlestep routine.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 16-bit Thumb PUSH and POP instructions
Jon Medhurst [Sat, 2 Jul 2011 15:13:29 +0000 (16:13 +0100)]
ARM: kprobes: Decode 16-bit Thumb PUSH and POP instructions

These instructions are equivalent to

stmdb sp!,{r0-r7,lr}
ldmdb sp!,{r0-r7,pc}

and we emulate them by transforming them into the 32-bit Thumb
instructions

stmdb r9!,{r0-r7,r8}
ldmdb r9!,{r0-r7,r8}

This is simpler, and almost certainly executes faster, than writing
simulation functions.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 16-bit Thumb CBZ and bit manipulation instructions
Jon Medhurst [Sat, 2 Jul 2011 15:10:44 +0000 (16:10 +0100)]
ARM: kprobes: Decode 16-bit Thumb CBZ and bit manipulation instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 16-bit Thumb PC- and SP-relative address instructions
Jon Medhurst [Sat, 2 Jul 2011 15:05:53 +0000 (16:05 +0100)]
ARM: kprobes: Decode 16-bit Thumb PC- and SP-relative address instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 16-bit Thumb load and store instructions
Jon Medhurst [Sat, 2 Jul 2011 15:00:09 +0000 (16:00 +0100)]
ARM: kprobes: Decode 16-bit Thumb load and store instructions

Most of these instructions only operate on the low registers R0-R7
so they can make use of t16_emulate_loregs_rwflags.

The instructions which use SP or PC for addressing have their own
simulation functions.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 16-bit Thumb special data instructions
Jon Medhurst [Sat, 2 Jul 2011 14:54:57 +0000 (15:54 +0100)]
ARM: kprobes: Decode 16-bit Thumb special data instructions

These data-processing instructions operate on the full range of CPU
registers, so to simulate them we have to modify the registers used
by the instruction. We can't make use of the decoding table framework to
do this because the registers aren't encoded cleanly in separate
nibbles, therefore we need a custom decode function.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 16-bit Thumb BX and BLX instructions
Jon Medhurst [Sat, 2 Jul 2011 14:51:03 +0000 (15:51 +0100)]
ARM: kprobes: Decode 16-bit Thumb BX and BLX instructions

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add bx_write_pc()
Jon Medhurst [Thu, 9 Jun 2011 10:01:54 +0000 (11:01 +0100)]
ARM: kprobes: Add bx_write_pc()

This writes a value to PC, with interworking. I.e. switches to Thumb or
ARM mode depending on the state of the least significant bit.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 16-bit Thumb data-processing instructions
Jon Medhurst [Sat, 2 Jul 2011 14:46:05 +0000 (15:46 +0100)]
ARM: kprobes: Decode 16-bit Thumb data-processing instructions

These instructions only operate on the low registers R0-R7, therefore
it is possible to emulate them by executing the original instruction
unaltered if we restore and save these registers. This is what
t16_emulate_loregs does.

Some of these instructions don't update the PSR when they execute in an
IT block, so there are two flavours of emulation functions:
t16_emulate_loregs_{noit}rwflags

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: ptrace: Add APSR_MASK definition to ptrace.h
Jon Medhurst [Fri, 3 Jun 2011 11:12:33 +0000 (12:12 +0100)]
ARM: ptrace: Add APSR_MASK definition to ptrace.h

APSR_MASK can be used to extract the APSR bits from the CPSR. The
comment for these definitions is also changed because it was inaccurate
as the existing defines didn't refer to any part of the APSR.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Decode 16-bit Thumb hint instructions
Jon Medhurst [Sat, 2 Jul 2011 14:36:32 +0000 (15:36 +0100)]
ARM: kprobes: Decode 16-bit Thumb hint instructions

For hints which may have observable effects, like SEV (send event), we
use kprobe_emulate_none which emulates the hint by executing the
original instruction.

For NOP we simulate the instruction using kprobe_simulate_nop, which
does nothing. As probes execute with interrupts disabled this is also
used for hints which may block for an indefinite time, like WFE (wait
for event).

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Infrastructure for table driven decoding of CPU instructions
Jon Medhurst [Tue, 26 Apr 2011 14:15:56 +0000 (15:15 +0100)]
ARM: kprobes: Infrastructure for table driven decoding of CPU instructions

The existing ARM instruction decoding functions are a mass of if/else
code. Rather than follow this pattern for Thumb instruction decoding
this patch implements an infrastructure for a new table driven scheme.

This has several advantages:

- Reduces the kernel size by approx 2kB. (The ARM instruction decoding
  will eventually have -3.1kB code, +1.3kB data; with similar or better
  estimated savings for Thumb decoding.)

- Allows programmatic checking of decoding consistency and test case
  coverage.

- Provides more uniform source code and is therefore, arguably, clearer.

For a detailed explanation of how decoding tables work see the in-source
documentation in kprobes.h, and also for kprobe_decode_insn().

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Extend arch_specific_insn to add pointer to emulated instruction
Jon Medhurst [Thu, 9 Jun 2011 13:05:51 +0000 (14:05 +0100)]
ARM: kprobes: Extend arch_specific_insn to add pointer to emulated instruction

When we come to emulating Thumb instructions then, to interwork
correctly, the code on in the instruction slot must be invoked with a
function pointer which has the least significant bit set. Rather that
set this by hand in every Thumb emulation function we will add a new
field for this purpose to arch_specific_insn, called insn_fn.

This also enables us to seamlessly share emulation functions between ARM
and Thumb code.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add hooks to override singlestep()
Jon Medhurst [Thu, 9 Jun 2011 11:11:27 +0000 (12:11 +0100)]
ARM: kprobes: Add hooks to override singlestep()

When a probe fires we must single-step the instruction which was
replaced by a breakpoint. As the steps to do this vary between ARM and
Thumb instructions we need a way to customise single-stepping.

This is done by adding a new hook called insn_singlestep to
arch_specific_insn which is initialised by the instruction decoding
functions.

These single-step hooks must update PC and call the instruction handler.
For Thumb instructions an additional step of updating ITSTATE is needed.
We do this after calling the handler because some handlers will need to
test if they are running in an IT block.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Use conditional breakpoints for ARM probes
Jon Medhurst [Thu, 16 Jun 2011 16:22:37 +0000 (17:22 +0100)]
ARM: kprobes: Use conditional breakpoints for ARM probes

Now we no longer trigger probes on conditional instructions when the
condition is false, we can make use of conditional instructions as
breakpoints in ARM code to avoid taking unnecessary exceptions.

Note, we can't rely on not getting an exception when the condition check
fails, as that is Implementation Defined on newer ARM architectures. We
therefore still need to perform manual condition checks as well.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Don't trigger probes on conditional instructions when condition is...
Jon Medhurst [Thu, 16 Jun 2011 14:54:00 +0000 (15:54 +0100)]
ARM: kprobes: Don't trigger probes on conditional instructions when condition is false

This patch changes the behavior of kprobes on ARM so that:

    Kprobes on conditional instructions don't trigger when the
    condition is false. For conditional branches, this means that
    they don't trigger in the branch not taken case.

Rationale:

When probes are placed onto conditionally executed instructions in a
Thumb IT block, they may not fire if the condition is not met. This
is because we use invalid instructions for breakpoints and "it is
IMPLEMENTATION DEFINED whether the instruction executes as a NOP or
causes an Undefined Instruction exception". Therefore, for consistency,
we will ignore all probes on any conditional instructions when the
condition is false. Alternative solutions seem to be too complex to
implement or inconsistent.

This issue was discussed on linux.arm.kernel in the thread titled
"[RFC] kprobes with thumb2 conditional code" See
http://comments.gmane.org/gmane.linux.linaro.devel/2985

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add it_advance()
Jon Medhurst [Thu, 16 Jun 2011 13:53:56 +0000 (14:53 +0100)]
ARM: kprobes: Add it_advance()

This advances the ITSTATE bits in CPSR to their values for the next
instruction.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add condition code checking to Thumb emulation
Jon Medhurst [Wed, 20 Apr 2011 18:29:52 +0000 (19:29 +0100)]
ARM: kprobes: Add condition code checking to Thumb emulation

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add Thumb breakpoint support
Jon Medhurst [Tue, 19 Apr 2011 16:18:35 +0000 (17:18 +0100)]
ARM: kprobes: Add Thumb breakpoint support

Extend the breakpoint insertion and catching functions to support Thumb
code.

As breakpoints are no longer of a fixed size, the flush_insns macro
is modified to take a size argument instead of an instruction count.

Note, we need both 16- and 32-bit Thumb breakpoints, because if we
were to use a 16-bit breakpoint to replace a 32-bit instruction which
was in an IT block, and the condition check failed, then the breakpoint
may not fire (it's unpredictable behaviour) and the CPU could then try
and execute the second half of the 32-bit Thumb instruction.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: Kconfig: Allow kprobes on Thumb-2 kernels
Jon Medhurst [Tue, 14 Jun 2011 12:09:39 +0000 (13:09 +0100)]
ARM: Kconfig: Allow kprobes on Thumb-2 kernels

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add Thumb instruction decoding stubs
Jon Medhurst [Tue, 19 Apr 2011 16:56:58 +0000 (17:56 +0100)]
ARM: kprobes: Add Thumb instruction decoding stubs

Extend arch_prepare_kprobe to support probing of Thumb code. For
the actual decoding of Thumb instructions, stub functions are
added which currently just reject the probe.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Make kprobes framework work on Thumb-2 kernels
Jon Medhurst [Tue, 14 Jun 2011 12:08:04 +0000 (13:08 +0100)]
ARM: kprobes: Make kprobes framework work on Thumb-2 kernels

Fix up kprobes framework so that it builds and correctly interworks on
Thumb-2 kernels.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Make str_pc_offset a constant on ARMv7
Jon Medhurst [Thu, 7 Jul 2011 18:58:29 +0000 (19:58 +0100)]
ARM: kprobes: Make str_pc_offset a constant on ARMv7

The str_pc_offset value is architecturally defined on ARMv7 onwards so
we can make it a compile time constant. This means on Thumb kernels the
runtime checking code isn't needed, which saves us from having to fix it
to work for Thumb.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Move find_str_pc_offset into kprobes-common.c
Jon Medhurst [Thu, 7 Jul 2011 09:21:40 +0000 (10:21 +0100)]
ARM: kprobes: Move find_str_pc_offset into kprobes-common.c

Move str_pc_offset into kprobes-common.c as it will be needed by common
code later.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Move is_writeback define to header file.
Jon Medhurst [Wed, 6 Jul 2011 19:33:41 +0000 (20:33 +0100)]
ARM: kprobes: Move is_writeback define to header file.

This will be used later in other files.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Add kprobes-common.c
Jon Medhurst [Wed, 6 Jul 2011 10:25:18 +0000 (11:25 +0100)]
ARM: kprobes: Add kprobes-common.c

This file will contain the instruction decoding and emulation code
which is common to both ARM and Thumb instruction sets.

For now, we will just move over condition_checks from kprobes-arm.c
This table is also renamed to kprobe_condition_checks to avoid polluting
the public namespace with a too generic name.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Split out internal parts of kprobes.h
Jon Medhurst [Wed, 20 Apr 2011 09:52:38 +0000 (10:52 +0100)]
ARM: kprobes: Split out internal parts of kprobes.h

Later, we will be adding a considerable amount of internal
implementation definitions to kprobe header files and it would be good
to have these in local header file along side the source code, rather
than pollute the existing header which is include by all users of
kprobes.

To this end, we add arch/arm/kernel/kprobes.h and move into this the
existing internal defintions from arch/arm/include/asm/kprobes.h

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: kprobes: Rename kprobes-decode.c to kprobes-arm.c
Jon Medhurst [Wed, 6 Jul 2011 09:49:07 +0000 (10:49 +0100)]
ARM: kprobes: Rename kprobes-decode.c to kprobes-arm.c

This file contains decoding and emulation functions for the ARM
instruction set. As we will later be adding a file for Thumb and a
file with common decoding functions, this renaming makes things clearer.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: Thumb-2: Support Thumb-2 in undefined instruction handler
Jon Medhurst [Sat, 26 Mar 2011 19:19:07 +0000 (19:19 +0000)]
ARM: Thumb-2: Support Thumb-2 in undefined instruction handler

This patch allows undef_hook's to be specified for 32-bit Thumb
instructions and also to be used for thumb kernel-side code.

32-bit Thumb instructions are specified in the form:
((first_half << 16 ) | second_half)
which matches the layout used by the ARM ARM.

ptrace was handling 32-bit Thumb instructions by hooking the first
halfword and manually checking the second half. This method would be
broken by this patch so it is migrated to make use of the new Thumb-2
support.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoARM: Thumb-2: Fix exception return sequence to restore stack correctly
Jon Medhurst [Fri, 18 Mar 2011 17:32:44 +0000 (17:32 +0000)]
ARM: Thumb-2: Fix exception return sequence to restore stack correctly

The implementation of svc_exit didn't take into account any stack hole
created by svc_entry; as happens with the undef handler when kprobes are
configured. The fix is to read the saved value of SP rather than trying
to calculate it.

Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
13 years agoLinux 3.0-rc7
Linus Torvalds [Mon, 11 Jul 2011 23:51:52 +0000 (16:51 -0700)]
Linux 3.0-rc7

13 years agoDocumentation/Changes: remove some really obsolete text
Linus Torvalds [Mon, 11 Jul 2011 23:48:38 +0000 (16:48 -0700)]
Documentation/Changes: remove some really obsolete text

That file harkens back to the days of the big 2.4 -> 2.6 version jump,
and was based even then on older versions.  Some of it is just obsolete,
and Jesper Juhl points out that it talks about kernel versions 2.6 and
should be updated to 3.0.

Remove some obsolete text, and re-phrase some other to not be 2.6-specific.

Reported-by: Jesper Juhl <jj@chaosbits.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
13 years agoMerge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
Linus Torvalds [Mon, 11 Jul 2011 23:43:27 +0000 (16:43 -0700)]
Merge branch 'v4l_for_linus' of git://git./linux/kernel/git/mchehab/linux-2.6

* 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6:
  [media] msp3400: fill in v4l2_tuner based on vt->type field
  [media] tuner-core.c: don't change type field in g_tuner or g_frequency
  [media] cx18/ivtv: fix g_tuner support
  [media] tuner-core: power up tuner when called with s_power(1)
  [media] v4l2-ioctl.c: check for valid tuner type in S_HW_FREQ_SEEK
  [media] tuner-core: simplify the standard fixup
  [media] tuner-core/v4l2-subdev: document that the type field has to be filled in
  [media] v4l2-subdev.h: remove unused s_mode tuner op
  [media] feature-removal-schedule: change in how radio device nodes are handled
  [media] bttv: fix s_tuner for radio
  [media] pvrusb2: fix g/s_tuner support
  [media] v4l2-ioctl.c: prefill tuner type for g_frequency and g/s_tuner
  [media] tuner-core: fix tuner_resume: use t->mode instead of t->type
  [media] tuner-core: fix s_std and s_tuner

13 years agoMerge branch 'pm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspe...
Linus Torvalds [Mon, 11 Jul 2011 19:49:03 +0000 (12:49 -0700)]
Merge branch 'pm-fixes' of git://git./linux/kernel/git/rafael/suspend-2.6

* 'pm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspend-2.6:
  PM: Reintroduce dropped call to check_wakeup_irqs

13 years agoMerge git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6
Linus Torvalds [Mon, 11 Jul 2011 19:48:24 +0000 (12:48 -0700)]
Merge git://git./linux/kernel/git/sfrench/cifs-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6:
  cifs: drop spinlock before calling cifs_put_tlink
  cifs: fix expand_dfs_referral
  cifs: move bdi_setup_and_register outside of CONFIG_CIFS_DFS_UPCALL
  cifs: factor smb_vol allocation out of cifs_setup_volume_info
  cifs: have cifs_cleanup_volume_info not take a double pointer
  cifs: fix build_unc_path_to_root to account for a prefixpath
  cifs: remove bogus call to cifs_cleanup_volume_info

13 years agoMerge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq
Linus Torvalds [Mon, 11 Jul 2011 19:47:53 +0000 (12:47 -0700)]
Merge branch 'fixes' of git://git./linux/kernel/git/davej/cpufreq

* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq:
  [CPUFREQ] fix cpumask memory leak in acpi-cpufreq on cpu hotplug.

13 years agoMerge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mjg59/platf...
Linus Torvalds [Mon, 11 Jul 2011 19:47:09 +0000 (12:47 -0700)]
Merge branch 'for_linus' of git://git./linux/kernel/git/mjg59/platform-drivers-x86

* 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mjg59/platform-drivers-x86:
  hp-wmi: fix use after free
  dell-laptop - using buffer without mutex_lock
  Revert: "dell-laptop: Toggle the unsupported hardware killswitch"
  platform-drivers-x86: set backlight type to BACKLIGHT_PLATFORM
  thinkpad-acpi: handle HKEY 0x4010, 0x4011 events
  drivers/platform/x86: Fix memory leak
  thinkpad-acpi: handle some new HKEY 0x60xx events
  acer-wmi: fix bitwise bug when set device state
  acer-wmi: Only update rfkill status for associated hotkey events

13 years agoMerge branch 'movieboard' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394...
Linus Torvalds [Mon, 11 Jul 2011 19:46:39 +0000 (12:46 -0700)]
Merge branch 'movieboard' of git://git./linux/kernel/git/ieee1394/linux1394-2.6

* 'movieboard' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6:
  firewire: ohci: do not bind to Pinnacle cards, avert panic

13 years agoath5k: Add missing breaks in switch/case
Joe Perches [Sun, 10 Jul 2011 09:28:26 +0000 (02:28 -0700)]
ath5k: Add missing breaks in switch/case

Signed-off-by: Joe Perches <joe@perches.com>
Acked-by: Pavel Roskin <proski@gnu.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
13 years agoDocumentation/spinlocks.txt: Remove reference to sti()/cli()
Muthu Kumar [Mon, 11 Jul 2011 18:04:58 +0000 (11:04 -0700)]
Documentation/spinlocks.txt: Remove reference to sti()/cli()

Since we removed sti()/cli() and related, how about removing it from
Documentation/spinlocks.txt?

Signed-off-by: Muthukumar R <muthur@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
13 years agocifs: drop spinlock before calling cifs_put_tlink
Jeff Layton [Mon, 11 Jul 2011 14:16:34 +0000 (10:16 -0400)]
cifs: drop spinlock before calling cifs_put_tlink

...as that function can sleep.

Signed-off-by: Jeff Layton <jlayton@redhat.com>
Signed-off-by: Steve French <sfrench@us.ibm.com>
13 years agohp-wmi: fix use after free
Eric Dumazet [Mon, 11 Jul 2011 10:22:21 +0000 (12:22 +0200)]
hp-wmi: fix use after free

[  191.310008] WARNING: kmemcheck: Caught 32-bit read from freed memory (f0d25f14)
[  191.310011] c056d2f088000000105fd2f00000000050415353040000000000000000000000
[  191.310020]  i i i i f f f f f f f f f f f f f f f f f f f f f f f f f f f f
[  191.310027]                                          ^
[  191.310029]
[  191.310032] Pid: 737, comm: modprobe Not tainted 3.0.0-rc5+ #268 Hewlett-Packard HP Compaq 6005 Pro SFF PC/3047h
[  191.310036] EIP: 0060:[<f80b3104>] EFLAGS: 00010286 CPU: 0
[  191.310039] EIP is at hp_wmi_perform_query+0x104/0x150 [hp_wmi]
[  191.310041] EAX: f0d25601 EBX: f0d25f00 ECX: 000121cf EDX: 000121ce
[  191.310043] ESI: f0d25f10 EDI: f0f97ea8 EBP: f0f97ec4 ESP: c173f34c
[  191.310045]  DS: 007b ES: 007b FS: 00d8 GS: 0033 SS: 0068
[  191.310046] CR0: 8005003b CR2: f540c000 CR3: 30f30000 CR4: 000006d0
[  191.310048] DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
[  191.310050] DR6: ffff4ff0 DR7: 00000400
[  191.310051]  [<f80b317b>] hp_wmi_dock_state+0x2b/0x40 [hp_wmi]
[  191.310054]  [<f80b6093>] hp_wmi_init+0x93/0x1a8 [hp_wmi]
[  191.310057]  [<c10011f0>] do_one_initcall+0x30/0x170
[  191.310061]  [<c107ab9f>] sys_init_module+0xef/0x1a60
[  191.310064]  [<c149f998>] sysenter_do_call+0x12/0x28
[  191.310067]  [<ffffffff>] 0xffffffff

Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com>
Signed-off-by: Matthew Garrett <mjg@redhat.com>
13 years agodell-laptop - using buffer without mutex_lock
Jose Alonso [Sun, 10 Jul 2011 18:46:51 +0000 (15:46 -0300)]
dell-laptop - using buffer without mutex_lock

Using buffer->output[1] without mutex_lock()

Signed-off-by: Jose Alonso <joalonsof@gmail.com>
Signed-off-by: Matthew Garrett <mjg@redhat.com>
13 years agoRevert: "dell-laptop: Toggle the unsupported hardware killswitch"
Keng-Yu Lin [Mon, 27 Jun 2011 10:19:03 +0000 (11:19 +0100)]
Revert: "dell-laptop: Toggle the unsupported hardware killswitch"

This reverts commit a3d77411e8b2ad661958c1fbee65beb476ec6d70,

as it causes a mess in the wireless rfkill status on some models.
It is probably a bad idea to toggle the rfkill for all dell models
without the respect to the claim that it is hardware-controlled.

Cc: stable@kernel.org
Signed-off-by: Keng-Yu Lin <kengyu@canonical.com>
Signed-off-by: Matthew Garrett <mjg@redhat.com>
13 years agoPM: Reintroduce dropped call to check_wakeup_irqs
Colin Cross [Mon, 11 Jul 2011 08:51:49 +0000 (10:51 +0200)]
PM: Reintroduce dropped call to check_wakeup_irqs

Patch 2e711c04dbbf7a7732a3f7073b1fc285d12b369d
(PM: Remove sysdev suspend, resume and shutdown operations)
deleted sysdev_suspend(), which was being relied on to call
check_wakeup_irqs() in suspend.  If check_wakeup_irqs() is not
called, wake interrupts that are pending when suspend is
entered may be lost.  It also breaks IRQCHIP_MASK_ON_SUSPEND,
which is handled in check_wakeup_irqs().

This patch adds a call to check_wakeup_irqs() in syscore_suspend(),
similar to what was deleted in sysdev_suspend().

Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
13 years ago[CPUFREQ] fix cpumask memory leak in acpi-cpufreq on cpu hotplug.
Luming Yu [Fri, 8 Jul 2011 20:37:44 +0000 (16:37 -0400)]
[CPUFREQ] fix cpumask memory leak in acpi-cpufreq on cpu hotplug.

I came across a memory leak during a cyclic cpu-online-offline test.

Signed-off-by: Yu Luming <luming.yu@intel.com>
Cc: Len Brown <lenb@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Jones <davej@redhat.com>
13 years agoMerge branch 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groec...
Linus Torvalds [Sun, 10 Jul 2011 17:24:47 +0000 (10:24 -0700)]
Merge branch 'hwmon-for-linus' of git://git./linux/kernel/git/groeck/staging

* 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/staging:
  hwmon: (pmbus) Improve auto-detection of temperature status register
  hwmon: (lm95241) Fix negative temperature results
  hwmon: (lm95241) Fix chip detection code

13 years agohwmon: (pmbus) Improve auto-detection of temperature status register
Guenter Roeck [Sun, 3 Jul 2011 20:08:03 +0000 (13:08 -0700)]
hwmon: (pmbus) Improve auto-detection of temperature status register

It is possible that a PMBus device supports the READ_TEMPERATURE2 and/or
READ_TEMPERATURE3 registers but does not support READ_TEMPERATURE1.
Improve temperature status register detection to address this condition.

Reported-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jean Delvare <khali@linux-fr.org>
Cc: stable@kernel.org # 2.6.39+
13 years agohwmon: (lm95241) Fix negative temperature results
Guenter Roeck [Thu, 30 Jun 2011 09:09:37 +0000 (02:09 -0700)]
hwmon: (lm95241) Fix negative temperature results

Negative temperatures were returned in degrees C instead of milli-Degrees C.
Also, negative temperatures were reported for remote temperature sensors even
if the chip was configured for positive-only results.

Fix by detecting temperature modes, and by treating negative temperatures
similar to positive temperatures, with appropriate sign extension.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Acked-by: Jean Delvare <khali@linux-fr.org>
Cc: stable@kernel.org # 2.6.30+
13 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
Linus Torvalds [Sun, 10 Jul 2011 14:29:22 +0000 (07:29 -0700)]
Merge branch 'for-linus' of git://git./linux/kernel/git/tiwai/sound-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6:
  ALSA: hda - Fix a copmile warning
  ASoC: ak4642: fixup snd_soc_update_bits mask for PW_MGMT2
  ALSA: hda - Change all ADCs for dual-adc switching mode for Realtek
  ASoC: Manage WM8731 ACTIVE bit as a supply widget
  ASoC: Don't set invalid name string to snd_card->driver field
  ASoC: Ensure we delay long enough for WM8994 FLL to lock when starting
  ASoC: Tegra: I2S: Ensure clock is enabled when writing regs
  ASoC: Fix Blackfin I2S _pointer() implementation return in bounds values
  ASoC: tlv320aic3x: Do soft reset to codec when going to bias off state
  ASoC: tlv320aic3x: Don't sync first two registers from register cache
  audio: tlv320aic26: fix PLL register configuration

13 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes...
Linus Torvalds [Sun, 10 Jul 2011 14:28:51 +0000 (07:28 -0700)]
Merge branch 'for-linus' of git://git./linux/kernel/git/jbarnes/pci-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6:
  PCI: conditional resource-reallocation through kernel parameter pci=realloc

13 years agoMerge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm
Linus Torvalds [Sun, 10 Jul 2011 14:28:30 +0000 (07:28 -0700)]
Merge branch 'fixes' of /home/rmk/linux-2.6-arm

* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6994/1: smp_twd: Fix typo in 'twd_timer_rate' printing
  ARM: 6987/1: l2x0: fix disabling function to avoid deadlock
  ARM: 6966/1: ep93xx: fix inverted RTS/DTR signals on uart1
  ARM: 6980/1: mmci: use StartBitErr to detect bad connections
  ARM: 6979/1: mach-vt8500: add forgotten irq_data conversion
  ARM: move memory layout sanity checking before meminfo initialization
  ARM: 6990/1: MAINTAINERS: add entry for ARM PMU profiling and debugging
  ARM: 6989/1: perf: do not start the PMU when no events are present
  ARM: dmabounce: fix map_single() error return value

13 years agoMerge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
Linus Torvalds [Sun, 10 Jul 2011 14:27:45 +0000 (07:27 -0700)]
Merge branch 'drm-fixes' of git://git./linux/kernel/git/airlied/drm-2.6

* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
  drm/radeon/kms: clean up multiple crtc handling for evergreen+ (v2)

13 years agofirewire: ohci: do not bind to Pinnacle cards, avert panic
Stefan Richter [Sat, 9 Jul 2011 22:23:03 +0000 (00:23 +0200)]
firewire: ohci: do not bind to Pinnacle cards, avert panic

When firewire-ohci is bound to a Pinnacle MovieBoard, eventually a
"Register access failure" is logged and an interrupt storm or a kernel
panic happens.  https://bugzilla.kernel.org/show_bug.cgi?id=36622

Until this is sorted out (if that is going to succeed at all), let's
just prevent firewire-ohci from touching these devices.

Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Cc: <stable@kernel.org>
13 years agocifs: fix expand_dfs_referral
Jeff Layton [Wed, 6 Jul 2011 12:10:39 +0000 (08:10 -0400)]
cifs: fix expand_dfs_referral

Regression introduced in commit 724d9f1cfba.

Prior to that, expand_dfs_referral would regenerate the mount data string
and then call cifs_parse_mount_options to re-parse it (klunky, but it
worked). The above commit moved cifs_parse_mount_options out of cifs_mount,
so the re-parsing of the new mount options no longer occurred. Fix it by
making expand_dfs_referral re-parse the mount options.

Signed-off-by: Jeff Layton <jlayton@redhat.com>
Signed-off-by: Steve French <sfrench@us.ibm.com>
13 years agocifs: move bdi_setup_and_register outside of CONFIG_CIFS_DFS_UPCALL
Jeff Layton [Sat, 9 Jul 2011 16:21:07 +0000 (12:21 -0400)]
cifs: move bdi_setup_and_register outside of CONFIG_CIFS_DFS_UPCALL

This needs to be done regardless of whether that KConfig option is set
or not.

Reported-by: Sven-Haegar Koch <haegar@sdinet.de>
Signed-off-by: Jeff Layton <jlayton@redhat.com>
Signed-off-by: Steve French <sfrench@us.ibm.com>
13 years agoMerge branch 'fix/asoc' into for-linus
Takashi Iwai [Sat, 9 Jul 2011 09:56:43 +0000 (11:56 +0200)]
Merge branch 'fix/asoc' into for-linus

13 years agoALSA: hda - Fix a copmile warning
Takashi Iwai [Sat, 9 Jul 2011 09:55:28 +0000 (11:55 +0200)]
ALSA: hda - Fix a copmile warning

It's harmless but annyoing.
  sound/pci/hda/patch_realtek.c: In function ‘alc_cap_getput_caller’:
  sound/pci/hda/patch_realtek.c:2722:9: warning: ‘err’ may be used uninitialized in this function

Signed-off-by: Takashi Iwai <tiwai@suse.de>
13 years agoMerge branch 'for-3.0' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound...
Takashi Iwai [Sat, 9 Jul 2011 07:44:09 +0000 (09:44 +0200)]
Merge branch 'for-3.0' of git://git./linux/kernel/git/broonie/sound-2.6 into fix/asoc

13 years agoMerge branch 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sat, 9 Jul 2011 06:28:23 +0000 (23:28 -0700)]
Merge branch 's5p-fixes-for-linus' of git://git./linux/kernel/git/kgene/linux-samsung

* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: S3C2440: fix section mismatch on mini2440
  ARM: S3C24XX: drop return codes in void function of dma.c
  ARM: S3C24XX: don't use uninitialized variable in dma.c
  ARM: EXYNOS4: Set appropriate I2C device variant
  ARM: S5PC100: Fix for compilation error
  spi/s3c64xx: Bug fix for SPI with different FIFO level
  ARM: SAMSUNG: Add tx_st_done variable
  ARM: EXYNOS4: Address a section mismatch w/ suspend issue.
  ARM: S5P: Fix bug on init of PWMTimers for HRTimer
  ARM: SAMSUNG: header file revised to prevent declaring duplicated
  ARM: EXYNOS4: fix improper gpio configuration
  ARM: EXYNOS4: Fix card detection for sdhci 0 and 2

13 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6
Linus Torvalds [Sat, 9 Jul 2011 06:26:28 +0000 (23:26 -0700)]
Merge branch 'for-linus' of git://git./linux/kernel/git/lrg/voltage-2.6

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/voltage-2.6:
  regulator: max8997: Fix setting inappropriate value for ramp_delay variable
  regulator: db8500-prcmu: small fixes
  regulator: max8997: remove dependency on platform_data pointer
  regulator: MAX8997: Fix for divide by zero error
  regulator: max8952 - fix wrong gpio valid check

13 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs...
Linus Torvalds [Sat, 9 Jul 2011 06:25:45 +0000 (23:25 -0700)]
Merge branch 'for-linus' of git://git./linux/kernel/git/mason/btrfs-unstable

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable:
  btrfs: fix oops when doing space balance
  Btrfs: don't panic if we get an error while balancing V2
  btrfs: add missing options displayed in mount output

13 years agoMAINTAINERS: update Bjorn Helgaas's email address
Bjorn Helgaas [Fri, 8 Jul 2011 22:39:48 +0000 (15:39 -0700)]
MAINTAINERS: update Bjorn Helgaas's email address

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
13 years agodrivers/leds/leds-pca9532.c: change driver name to be unique
Wolfram Sang [Fri, 8 Jul 2011 22:39:46 +0000 (15:39 -0700)]
drivers/leds/leds-pca9532.c: change driver name to be unique

This driver handles the variants pca9530-pca9533, so it chose the name
"pca953x".  However, there is a gpio driver which decided on the same
name.  As a result, those two can't be loaded at the same time.  Add a
subsystem prefix to make the driver name unique.  Device matching will not
suffer, because both are I2C drivers which match using a
i2c_device_id-table which is not altered.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Jean Delvare <khali@linux-fr.org>
Cc: Richard Purdie <richard.purdie@linuxfoundation.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
13 years agomm/nommu.c: fix remap_pfn_range()
Bob Liu [Fri, 8 Jul 2011 22:39:46 +0000 (15:39 -0700)]
mm/nommu.c: fix remap_pfn_range()

remap_pfn_range() means map physical address pfn<<PAGE_SHIFT to user addr.

For nommu arch it's implemented by vma->vm_start = pfn << PAGE_SHIFT which
is wrong acroding the original meaning of this function.  And some driver
developer using remap_pfn_range() with correct parameter will get
unexpected result because vm_start is changed.  It should be implementd
like addr = pfn << PAGE_SHIFT but which is meanless on nommu arch, this
patch just make it simply return.

Parameter name and setting of vma->vm_flags also be fixed.

Signed-off-by: Bob Liu <lliubbo@gmail.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: David Howells <dhowells@redhat.com>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Bob Liu <lliubbo@gmail.com>
Cc: <stable@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
13 years agow1: ds1wm: add a reset recovery parameter
Jean-François Dagenais [Fri, 8 Jul 2011 22:39:44 +0000 (15:39 -0700)]
w1: ds1wm: add a reset recovery parameter

This fixes a regression in 3.0 reported by Paul Parsons regarding the
removal of the msleep(1) in the ds1wm_reset() function:

: The linux-3.0-rc4 DS1WM 1-wire driver is logging "bus error, retrying"
: error messages on an HP iPAQ hx4700 PDA (XScale-PXA270):
:
: <snip>
: Driver for 1-wire Dallas network protocol.
: DS1WM w1 busmaster driver - (c) 2004 Szabolcs Gyurko
: 1-Wire driver for the DS2760 battery monitor  chip  - (c) 2004-2005, Szabolcs Gyurko
: ds1wm ds1wm: pass: 1 bus error, retrying
: ds1wm ds1wm: pass: 2 bus error, retrying
: ds1wm ds1wm: pass: 3 bus error, retrying
: ds1wm ds1wm: pass: 4 bus error, retrying
: ds1wm ds1wm: pass: 5 bus error, retrying
: ...
:
: The visible result is that the battery charging LED is erratic; sometimes
: it works, mostly it doesn't.
:
: The linux-2.6.39 DS1WM 1-wire driver worked OK.  I haven't tried 3.0-rc1,
: 3.0-rc2, or 3.0-rc3.

This sleep should not be required on normal circuitry provided the
pull-ups on the bus are correctly adapted to the slaves.  Unfortunately,
this is not always the case.  The sleep is restored but as a parameter to
the probe function in the pdata.

[akpm@linux-foundation.org: coding-style fixes]
Reported-by: Paul Parsons <lost.distance@yahoo.com>
Tested-by: Paul Parsons <lost.distance@yahoo.com>
Signed-off-by: Jean-François Dagenais <dagenaisj@sonatest.com>
Cc: Evgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>