GitHub/mt8127/android_kernel_alcatel_ttab.git
18 years ago[PATCH] i386/x86-64/ia64: Move polling flag into thread_info_status
Andi Kleen [Mon, 26 Jun 2006 11:59:11 +0000 (13:59 +0200)]
[PATCH] i386/x86-64/ia64: Move polling flag into thread_info_status

During some profiling I noticed that default_idle causes a lot of
memory traffic. I think that is caused by the atomic operations
to clear/set the polling flag in thread_info. There is actually
no reason to make this atomic - only the idle thread does it
to itself, other CPUs only read it. So I moved it into ti->status.

Converted i386/x86-64/ia64 for now because that was the easiest
way to fix ACPI which also manipulates these flags in its idle
function.

Cc: Nick Piggin <npiggin@novell.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Len Brown <len.brown@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Remove bogus RED-PEN comment in signal.c
Andi Kleen [Mon, 26 Jun 2006 11:59:08 +0000 (13:59 +0200)]
[PATCH] x86_64: Remove bogus RED-PEN comment in signal.c

No red zone possible/needed on the alternative stack.

It caused confusion.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: check_addr() cleanups
Andrew Morton [Mon, 26 Jun 2006 11:59:05 +0000 (13:59 +0200)]
[PATCH] x86_64: check_addr() cleanups

 - Use DMA_32BIT_MASK

 - Use %z for size_t

 - 80-cols

Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: miscellaneous mm/init.c fixes
Jan Beulich [Mon, 26 Jun 2006 11:59:02 +0000 (13:59 +0200)]
[PATCH] x86_64: miscellaneous mm/init.c fixes

 - fix an off-by-one error in phys_pmd_init()
 - prevent phys_pmd_init() from removing mappings established earlier
 - fix the direct mapping early printk to in fact show the end of the range
 - remove an apparently orphan comment

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Mark mce_amd cpu notifier __cpuinit/__cpuinitdata
Andi Kleen [Mon, 26 Jun 2006 11:58:59 +0000 (13:58 +0200)]
[PATCH] x86_64: Mark mce_amd cpu notifier __cpuinit/__cpuinitdata

Cc: Jacob Shin <jacob.shin@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: mce_amd cleanup
Jacob Shin [Mon, 26 Jun 2006 11:58:56 +0000 (13:58 +0200)]
[PATCH] x86_64: mce_amd cleanup

Clean up mce_amd.c for readability and remove code no
longer needed.

Signed-off-by: Jacob Shin <jacob.shin@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: mce_amd support for family 0x10 processors
Jacob Shin [Mon, 26 Jun 2006 11:58:53 +0000 (13:58 +0200)]
[PATCH] x86_64: mce_amd support for family 0x10 processors

Add support for mce threshold registers found in future
AMD family 0x10 processors.  Backwards compatible with
family 0xF hardware.

AK: fixed build on !SMP

Signed-off-by: Jacob Shin <jacob.shin@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: mce_amd relocate sysfs files
Jacob Shin [Mon, 26 Jun 2006 11:58:50 +0000 (13:58 +0200)]
[PATCH] x86_64: mce_amd relocate sysfs files

Get rid of /sys/devices/system/threshold directory and move
mce_amd thresholding files into the machine sysfs directory --
/sys/devices/system/machinecheck.

AK: Fixed warning

Signed-off-by: Jacob Shin <jacob.shin@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: apic support for extended apic interrupt
Jacob Shin [Mon, 26 Jun 2006 11:58:47 +0000 (13:58 +0200)]
[PATCH] x86_64: apic support for extended apic interrupt

Add support for extended APIC LVT found in future AMD processors.

Signed-off-by: Jacob Shin <jacob.shin@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Move VM86 config into arch/i386/Kconfig
Andi Kleen [Mon, 26 Jun 2006 11:58:44 +0000 (13:58 +0200)]
[PATCH] x86_64: Move VM86 config into arch/i386/Kconfig

Architecture specific configs like this have no business at all
in init/Kconfig. This prevents it from being set on x86-64

Pointed out by H.Peter Anvin

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] i386/x86-64: Fix isoimage when syslinux is in /usr/share
Andi Kleen [Mon, 26 Jun 2006 11:58:41 +0000 (13:58 +0200)]
[PATCH] i386/x86-64: Fix isoimage when syslinux is in /usr/share

It's like this on SUSE systems.

Cc: hpa@zytor.com
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Update copyright in time.c
Vojtech Pavlik [Mon, 26 Jun 2006 11:58:38 +0000 (13:58 +0200)]
[PATCH] x86_64: Update copyright in time.c

Update my copyright dates in arch/x86-64/kernel/time.c

Signed-off-by: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Explain why HPET T0_CMP register is written twice
Vojtech Pavlik [Mon, 26 Jun 2006 11:58:35 +0000 (13:58 +0200)]
[PATCH] x86_64: Explain why HPET T0_CMP register is written twice

After writing the CFG register, the first value written to the T0_CMP
register is the value at which next interrupt should be triggered, every
value after that sets the period of the interrupt. For that reason, the code
needs to write the value twice - to set both the phase and period.

[AK: I had already figured it out by myself, but it's still useful
to have a comment for this.]

Signed-off-by: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Make use of the *PER* constants in time.c
Vojtech Pavlik [Mon, 26 Jun 2006 11:58:32 +0000 (13:58 +0200)]
[PATCH] x86_64: Make use of the *PER* constants in time.c

This patch makes use of the newly added conversion constants
in time.h to x86-64 time.c. The code gets significantly easier
to understand.

Signed-off-by: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Remove hack to manually enable HPET on AMD8111 southbridges
Vojtech Pavlik [Mon, 26 Jun 2006 11:58:29 +0000 (13:58 +0200)]
[PATCH] x86_64: Remove hack to manually enable HPET on AMD8111 southbridges

Remove #ifdefed code to manually enable HPET on AMD8111, where the
BIOS doesn't have ACPI HPET tables and doesn't enable it for us.

Signed-off-by: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Add X86_FEATURE_RDTSCP, fix rdtscp in /proc/cpuinfo
Vojtech Pavlik [Mon, 26 Jun 2006 11:58:26 +0000 (13:58 +0200)]
[PATCH] x86_64: Add X86_FEATURE_RDTSCP, fix rdtscp in /proc/cpuinfo

This patch adds the X86_FEATURE_RDTSCP #define, so that kernel code can
check for the feature easily and also fixes the location of the "rdtscp"
string in the cpuinfo tables.

Signed-off-by: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Rename oem_force_hpet_timer to apic_is_clustered_box
Vojtech Pavlik [Mon, 26 Jun 2006 11:58:23 +0000 (13:58 +0200)]
[PATCH] x86_64: Rename oem_force_hpet_timer to apic_is_clustered_box

Rename oem_force_hpet_timer to apic_is_clustered_box, to give the
function a better fitting name - it really isn't at all about HPET.

Signed-off-by: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Add useful constants to time.h
Vojtech Pavlik [Mon, 26 Jun 2006 11:58:20 +0000 (13:58 +0200)]
[PATCH] x86_64: Add useful constants to time.h

In timekeeping code, one often does need to use conversion constants. Naming
these leads to code that's easier to understand, showing the reader between
which units the conversion is made.

Signed-off-by: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: moving phys_proc_id and cpu_core_id to cpuinfo_x86
Rohit Seth [Mon, 26 Jun 2006 11:58:17 +0000 (13:58 +0200)]
[PATCH] x86_64: moving phys_proc_id and cpu_core_id to cpuinfo_x86

Most of the fields of cpuinfo are defined in cpuinfo_x86 structure.
This patch moves the phys_proc_id and cpu_core_id for each processor to
cpuinfo_x86 structure as well.

Signed-off-by: Rohit Seth <rohitseth@google.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Calgary IOMMU - Calgary specific bits
Jon Mason [Mon, 26 Jun 2006 11:58:14 +0000 (13:58 +0200)]
[PATCH] x86_64: Calgary IOMMU - Calgary specific bits

This patch hooks Calgary into the build, the x86-64 IOMMU
initialization paths, and introduces the Calgary specific bits.  The
implementation draws inspiration from both PPC (which has support for
the same chip but requires firmware support which we don't have on
x86-64) and gart. Calgary is different from gart in that it support a
translation table per PHB, as opposed to the single gart aperture.

Changes from previous version:
 * Addition of boot-time disablement for bus-level translation/isolation
   (e.g, enable userspace DMA for things like X)
 * Usage of newer IOMMU abstraction functions

Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Jon Mason <jdmason@us.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Calgary IOMMU - IOMMU abstractions
Jon Mason [Mon, 26 Jun 2006 11:58:11 +0000 (13:58 +0200)]
[PATCH] x86_64: Calgary IOMMU - IOMMU abstractions

This patch creates a new interface for IOMMUs by adding a centralized
location for IOMMU allocation (for translation tables/apertures) and
IOMMU initialization.  In creating these, code was moved around for
abstraction, uniformity, and consiceness.

Take note of the move of the iommu_setup bootarg parsing code to
__setup.  This is enabled by moving back the location of the aperture
allocation/detection to mem init (which while ugly, was already the
location of the swiotlb_init).

While a slight departure from the previous patch, I belive this provides
the true intention of the previous versions of the patch which changed
this code.  It also makes the addition of the upcoming calgary code much
cleaner than previous patches.

[AK: Removed one broken change. iommu_setup still has to be called
early]

Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Jon Mason <jdmason@us.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Calgary IOMMU - move valid_dma_direction into the callers
Jon Mason [Mon, 26 Jun 2006 11:58:08 +0000 (13:58 +0200)]
[PATCH] x86_64: Calgary IOMMU - move valid_dma_direction into the callers

Based on Andi Kleen's comments on the original Calgary patch, move
valid_dma_direction into the calling functions.

Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Jon Mason <jdmason@us.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Calgary IOMMU - introduce iommu_detected
Jon Mason [Mon, 26 Jun 2006 11:58:05 +0000 (13:58 +0200)]
[PATCH] x86_64: Calgary IOMMU - introduce iommu_detected

swiotlb relies on the gart specific iommu_aperture variable to know if
we discovered a hardware IOMMU before swiotlb initialization.  Introduce
iommu_detected to do the same thing, but in a HW IOMMU neutral manner,
in preparation for adding the Calgary HW IOMMU.

Signed-Off-By: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-Off-By: Jon Mason <jdmason@us.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Change assembly to use regular cpuid_count macro
Rohit Seth [Mon, 26 Jun 2006 11:58:02 +0000 (13:58 +0200)]
[PATCH] x86_64: Change assembly to use regular cpuid_count macro

Minor cleanup patch:

Replacing the asm statement with cpuid_count macro(which already
provides the same functionality).

Signed-off-by: Rohit Seth <rohitseth@google.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: use halt() instead of raw inline assembly
Jan Beulich [Mon, 26 Jun 2006 11:57:59 +0000 (13:57 +0200)]
[PATCH] x86_64: use halt() instead of raw inline assembly

Use abstractions whenever possible.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Get rid of pud_offset_k / __pud_offset_k
Andi Kleen [Mon, 26 Jun 2006 11:57:56 +0000 (13:57 +0200)]
[PATCH] x86_64: Get rid of pud_offset_k / __pud_offset_k

pud_offset_k() equivalent to pud_offset() now.  Pointed out by Jan Beulich
Similar for __pud_offset_ok, which needs a small change in the callers.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] i386/x86-64: Consolidate arch/{i386,x86_64}/boot/compressed/misc.c
Carl-Daniel Hailfinger [Mon, 26 Jun 2006 11:57:53 +0000 (13:57 +0200)]
[PATCH] i386/x86-64: Consolidate arch/{i386,x86_64}/boot/compressed/misc.c

Clean up arch/{i386,x86_64}/boot/compressed/misc.c a bit to reduce their
differences. Should have zero effect on code generation.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: allow unwinder to build without module support
Jan Beulich [Mon, 26 Jun 2006 11:57:50 +0000 (13:57 +0200)]
[PATCH] x86_64: allow unwinder to build without module support

Add proper conditionals to be able to build with CONFIG_MODULES=n.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] i386/x86-64: fall back to old-style call trace if no unwinding
Jan Beulich [Mon, 26 Jun 2006 11:57:47 +0000 (13:57 +0200)]
[PATCH] i386/x86-64: fall back to old-style call trace if no unwinding

If no unwinding is possible at all for a certain exception instance,
fall back to the old style call trace instead of not showing any trace
at all.

Also, allow setting the stack trace mode at the command line.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] i386: reliable stack trace support i386 entry.S
Jan Beulich [Mon, 26 Jun 2006 11:57:44 +0000 (13:57 +0200)]
[PATCH] i386: reliable stack trace support i386 entry.S

To increase the usefulness of reliable stack unwinding, this adds CFI
unwind annotations to many low-level i386 routines.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] i386: reliable stack trace support (i386)
Jan Beulich [Mon, 26 Jun 2006 11:57:41 +0000 (13:57 +0200)]
[PATCH] i386: reliable stack trace support (i386)

These are the i386-specific pieces to enable reliable stack traces. This is
going to be even more useful once CFI annotations get added to he assembly
code, namely to entry.S.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: reliable stack trace support (x86-64 syscall
Jan Beulich [Mon, 26 Jun 2006 11:57:38 +0000 (13:57 +0200)]
[PATCH] x86_64: reliable stack trace support (x86-64 syscall

Adjust the CFA offset for 64- and 32-bit syscall entries so that the five
slots pre-subtracted from the stack pointer do not appear to reside outside
of the current frame.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: reliable stack trace support (x86-64 IRQ stack
Jan Beulich [Mon, 26 Jun 2006 11:57:35 +0000 (13:57 +0200)]
[PATCH] x86_64: reliable stack trace support (x86-64 IRQ stack

Change the switching to/from the IRQ stack so that unwind annotations can
be added for it without requiring CFA expressions.

AK: I cleaned it up a bit, making it unconditional and removing the
obsolete DEBUG_INFO full frame code.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: reliable stack trace support (x86-64)
Jan Beulich [Mon, 26 Jun 2006 11:57:32 +0000 (13:57 +0200)]
[PATCH] x86_64: reliable stack trace support (x86-64)

These are the x86_64-specific pieces to enable reliable stack traces. The
only restriction with this is that it currently cannot unwind across the
interrupt->normal stack boundary, as that transition is lacking proper
annotation.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: reliable stack trace support
Jan Beulich [Mon, 26 Jun 2006 11:57:28 +0000 (13:57 +0200)]
[PATCH] x86_64: reliable stack trace support

These are the generic bits needed to enable reliable stack traces based
on Dwarf2-like (.eh_frame) unwind information. Subsequent patches will
enable x86-64 and i386 to make use of this.

Thanks to Andi Kleen and Ingo Molnar, who pointed out several possibilities
for improvement.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: x86_86 msi miss one entry handler
bibo,mao [Mon, 26 Jun 2006 11:57:25 +0000 (13:57 +0200)]
[PATCH] x86_64: x86_86 msi miss one entry handler

  In x86_64 architecture, if device driver with msi function
gets 0xee vector by assign_irq_vector() function, system will
crash if this interrupt happens. It is because 0xee interrupt
entry is empty. This patch modifies this. This patch is based
on 2.6.17-rc6.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Rename IOMMU option, fix help and mark option embedded.
Andi Kleen [Mon, 26 Jun 2006 11:57:22 +0000 (13:57 +0200)]
[PATCH] x86_64: Rename IOMMU option, fix help and mark option embedded.

 - Rename the GART_IOMMU option to IOMMU to make clear it's not
   just for AMD
 - Rewrite the help text to better emphatise this fact
 - Make it an embedded option because too many people get it wrong.

To my astonishment I discovered the aacraid driver tests this
symbol directly. This looks quite broken to me - it's an internal
implementation detail of the PCI DMA API. Can the maintainer
please clarify what this test was intended to do?

Cc: linux-scsi@vger.kernel.org
Cc: alan@redhat.com
Cc: markh@osdl.org
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Make sure is_compat_task works early
Andi Kleen [Mon, 26 Jun 2006 11:57:19 +0000 (13:57 +0200)]
[PATCH] x86_64: Make sure is_compat_task works early

Previously it would only work in the first 32bit system call, not during
early process setup.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: fix vector_lock deadlock in io_apic.c
Ingo Molnar [Mon, 26 Jun 2006 11:57:16 +0000 (13:57 +0200)]
[PATCH] x86_64: fix vector_lock deadlock in io_apic.c

Fix a potential deadlock scenario introduced by io_apic.c's new vector_lock
on i386 and x86_64.

Found by the locking correctness validator. The patch was boot-tested on
x86. For details of the deadlock scenario, see the validator output:

  ======================================================
  [ BUG: hard-safe -> hard-unsafe lock order detected! ]
  ------------------------------------------------------
  idle/1 [HC0[0]:SC0[0]:HE0:SE1] is trying to acquire:
   (msi_lock){....}, at: [<c04ff8d2>] startup_msi_irq_wo_maskbit+0x10/0x35

  and this task is already holding:
   (&irq_desc[i].lock){++..}, at: [<c015b924>] probe_irq_on+0x36/0x107
  which would create a new lock dependency:
   (&irq_desc[i].lock){++..} -> (msi_lock){....}

  but this new dependency connects a hard-irq-safe lock:
   (&irq_desc[i].lock){++..}
  ... which became hard-irq-safe at:
    [<c01468c4>] lockdep_acquire+0x68/0x84
    [<c10485e9>] _spin_lock+0x21/0x2f
    [<c015aff5>] __do_IRQ+0x3d/0x113
    [<c01062d3>] do_IRQ+0x8c/0xad

  to a hard-irq-unsafe lock:
   (vector_lock){--..}
  ... which became hard-irq-unsafe at:
  ...  [<c01468c4>] lockdep_acquire+0x68/0x84
    [<c10485e9>] _spin_lock+0x21/0x2f
    [<c011b5e8>] assign_irq_vector+0x34/0xc8
    [<c1aa82fa>] setup_IO_APIC+0x45a/0xcff
    [<c1aa56e3>] smp_prepare_cpus+0x5ea/0x8aa
    [<c010033f>] init+0x32/0x2cb
    [<c0102005>] kernel_thread_helper+0x5/0xb

  which could potentially lead to deadlocks!

  other info that might help us debug this:

  3 locks held by idle/1:
   #0:  (port_mutex){--..}, at: [<c067070d>] uart_add_one_port+0x61/0x289
   #1:  (&state->mutex){--..}, at: [<c067071f>] uart_add_one_port+0x73/0x289
   #2:  (&irq_desc[i].lock){++..}, at: [<c015b924>] probe_irq_on+0x36/0x107

  the hard-irq-safe lock's dependencies:
  -> (&irq_desc[i].lock){++..} ops: 9861 {
     initial-use  at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                          [<c015b415>] setup_irq+0x9b/0x14d
                          [<c1aaa4c4>] time_init_hook+0xf/0x11
                          [<c1a9f320>] time_init+0x44/0x46
                          [<c1a9955f>] start_kernel+0x191/0x38f
                          [<c0100210>] 0xc0100210
     in-hardirq-W at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10485e9>] _spin_lock+0x21/0x2f
                          [<c015aff5>] __do_IRQ+0x3d/0x113
                          [<c01062d3>] do_IRQ+0x8c/0xad
     in-softirq-W at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10485e9>] _spin_lock+0x21/0x2f
                          [<c015aff5>] __do_IRQ+0x3d/0x113
                          [<c01062d3>] do_IRQ+0x8c/0xad
   }
   ... key      at: [<c1ea31e0>] irq_desc_lock_type+0x0/0x20
    -> (i8259A_lock){++..} ops: 5149 {
       initial-use  at:
                        [<c01468c4>] lockdep_acquire+0x68/0x84
                        [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                        [<c0108090>] init_8259A+0x11/0x8f
                        [<c1aa0d22>] init_ISA_irqs+0x12/0x4d
                        [<c1aaa4f0>] pre_intr_init_hook+0x8/0xa
                        [<c1aa0cb9>] init_IRQ+0xe/0x65
                        [<c1a99546>] start_kernel+0x178/0x38f
                        [<c0100210>] 0xc0100210
       in-hardirq-W at:
                        [<c01468c4>] lockdep_acquire+0x68/0x84
                        [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                        [<c0107fb0>] mask_and_ack_8259A+0x1b/0xcc
                        [<c015b007>] __do_IRQ+0x4f/0x113
                        [<c01062d3>] do_IRQ+0x8c/0xad
       in-softirq-W at:
                        [<c01468c4>] lockdep_acquire+0x68/0x84
                        [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                        [<c0107fb0>] mask_and_ack_8259A+0x1b/0xcc
                        [<c015b007>] __do_IRQ+0x4f/0x113
                        [<c01062d3>] do_IRQ+0x8c/0xad
     }
     ... key      at: [<c142f174>] i8259A_lock+0x14/0x40
   ... acquired at:
     [<c01468c4>] lockdep_acquire+0x68/0x84
     [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
     [<c0107eb2>] enable_8259A_irq+0x10/0x47
     [<c0107f12>] startup_8259A_irq+0x8/0xc
     [<c015b45e>] setup_irq+0xe4/0x14d
     [<c1aaa4c4>] time_init_hook+0xf/0x11
     [<c1a9f320>] time_init+0x44/0x46
     [<c1a9955f>] start_kernel+0x191/0x38f
     [<c0100210>] 0xc0100210

    -> (ioapic_lock){+...} ops: 122 {
       initial-use  at:
                        [<c01468c4>] lockdep_acquire+0x68/0x84
                        [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                        [<c1aa71db>] io_apic_get_version+0x16/0x55
                        [<c1aa5c73>] mp_register_ioapic+0xc6/0x127
                        [<c1aa382e>] acpi_parse_ioapic+0x2d/0x39
                        [<c1abe031>] acpi_table_parse_madt_family+0xb4/0x100
                        [<c1abe093>] acpi_table_parse_madt+0x16/0x18
                        [<c1aa3c8a>] acpi_boot_init+0x132/0x251
                        [<c1aa08ea>] setup_arch+0xd36/0xe37
                        [<c1a99434>] start_kernel+0x66/0x38f
                        [<c0100210>] 0xc0100210
       in-hardirq-W at:
                        [<c01468c4>] lockdep_acquire+0x68/0x84
                        [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                        [<c011bce1>] mask_IO_APIC_irq+0x11/0x31
                        [<c011c5cc>] ack_edge_ioapic_vector+0x31/0x41
                        [<c015b007>] __do_IRQ+0x4f/0x113
                        [<c01062d3>] do_IRQ+0x8c/0xad
     }
     ... key      at: [<c1432514>] ioapic_lock+0x14/0x3c
      -> (i8259A_lock){++..} ops: 5149 {
         initial-use  at:
                         [<c01468c4>] lockdep_acquire+0x68/0x84
                         [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                         [<c0108090>] init_8259A+0x11/0x8f
                         [<c1aa0d22>] init_ISA_irqs+0x12/0x4d
                         [<c1aaa4f0>] pre_intr_init_hook+0x8/0xa
                         [<c1aa0cb9>] init_IRQ+0xe/0x65
                         [<c1a99546>] start_kernel+0x178/0x38f
                         [<c0100210>] 0xc0100210
         in-hardirq-W at:
                         [<c01468c4>] lockdep_acquire+0x68/0x84
                         [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                         [<c0107fb0>] mask_and_ack_8259A+0x1b/0xcc
                         [<c015b007>] __do_IRQ+0x4f/0x113
                         [<c01062d3>] do_IRQ+0x8c/0xad
         in-softirq-W at:
                         [<c01468c4>] lockdep_acquire+0x68/0x84
                         [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
                         [<c0107fb0>] mask_and_ack_8259A+0x1b/0xcc
                         [<c015b007>] __do_IRQ+0x4f/0x113
                         [<c01062d3>] do_IRQ+0x8c/0xad
       }
       ... key      at: [<c142f174>] i8259A_lock+0x14/0x40
     ... acquired at:
     [<c01468c4>] lockdep_acquire+0x68/0x84
     [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
     [<c0107e6b>] disable_8259A_irq+0x10/0x47
     [<c011bdbd>] startup_edge_ioapic_vector+0x31/0x58
     [<c015b45e>] setup_irq+0xe4/0x14d
     [<c015b5a1>] request_irq+0xda/0xf9
     [<c1ac983a>] rtc_init+0x6a/0x1a7
     [<c0100457>] init+0x14a/0x2cb
     [<c0102005>] kernel_thread_helper+0x5/0xb

   ... acquired at:
     [<c01468c4>] lockdep_acquire+0x68/0x84
     [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
     [<c011bce1>] mask_IO_APIC_irq+0x11/0x31
     [<c011c5cc>] ack_edge_ioapic_vector+0x31/0x41
     [<c015b007>] __do_IRQ+0x4f/0x113
     [<c01062d3>] do_IRQ+0x8c/0xad

  the hard-irq-unsafe lock's dependencies:
  -> (vector_lock){--..} ops: 31 {
     initial-use  at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10485e9>] _spin_lock+0x21/0x2f
                          [<c011b5e8>] assign_irq_vector+0x34/0xc8
                          [<c1aa82fa>] setup_IO_APIC+0x45a/0xcff
                          [<c1aa56e3>] smp_prepare_cpus+0x5ea/0x8aa
                          [<c010033f>] init+0x32/0x2cb
                          [<c0102005>] kernel_thread_helper+0x5/0xb
     softirq-on-W at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10485e9>] _spin_lock+0x21/0x2f
                          [<c011b5e8>] assign_irq_vector+0x34/0xc8
                          [<c1aa82fa>] setup_IO_APIC+0x45a/0xcff
                          [<c1aa56e3>] smp_prepare_cpus+0x5ea/0x8aa
                          [<c010033f>] init+0x32/0x2cb
                          [<c0102005>] kernel_thread_helper+0x5/0xb
     hardirq-on-W at:
                          [<c01468c4>] lockdep_acquire+0x68/0x84
                          [<c10485e9>] _spin_lock+0x21/0x2f
                          [<c011b5e8>] assign_irq_vector+0x34/0xc8
                          [<c1aa82fa>] setup_IO_APIC+0x45a/0xcff
                          [<c1aa56e3>] smp_prepare_cpus+0x5ea/0x8aa
                          [<c010033f>] init+0x32/0x2cb
                          [<c0102005>] kernel_thread_helper+0x5/0xb
   }
   ... key      at: [<c1432574>] vector_lock+0x14/0x3c

  stack backtrace:
   [<c0104f36>] show_trace+0xd/0xf
   [<c010543e>] dump_stack+0x17/0x19
   [<c0144e34>] check_usage+0x1f6/0x203
   [<c0146395>] __lockdep_acquire+0x8c2/0xaa5
   [<c01468c4>] lockdep_acquire+0x68/0x84
   [<c10487f4>] _spin_lock_irqsave+0x2a/0x3a
   [<c04ff8d2>] startup_msi_irq_wo_maskbit+0x10/0x35
   [<c015b932>] probe_irq_on+0x44/0x107
   [<c0673d58>] serial8250_config_port+0x84b/0x986
   [<c06707b1>] uart_add_one_port+0x105/0x289
   [<c1ace54b>] serial8250_init+0xc3/0x10a
   [<c0100457>] init+0x14a/0x2cb
   [<c0102005>] kernel_thread_helper+0x5/0xb

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Cc: Jan Beulich <jbeulich@novell.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: remove unused gart header file
Jon Mason [Mon, 26 Jun 2006 11:57:13 +0000 (13:57 +0200)]
[PATCH] x86_64: remove unused gart header file

include/asm-x86_64/gart-mapping.h is only ever used in
arch/x86_64/kernel/setup.c and none of its contents are referenced.
Looks to be leftover cruft not removed in the dma_ops patch.

Signed-off-by: Jon Mason <jdmason@us.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Optimize bitmap_weight for small bitmaps
Andi Kleen [Mon, 26 Jun 2006 11:57:10 +0000 (13:57 +0200)]
[PATCH] x86_64: Optimize bitmap_weight for small bitmaps

Use inline code bitmaps <= BITS_PER_LONG in bitmap_weight. This
gives _much_ better code.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Remove ia32_sys_call_table export
Andi Kleen [Mon, 26 Jun 2006 11:57:07 +0000 (13:57 +0200)]
[PATCH] x86_64: Remove ia32_sys_call_table export

It was originally added for 2.4 oprofile, but 2.6 oprofile doesn't
need that anymore. Shouldn't be any use in tree anymore and it doesn't
make much sense to export the ia32 syscalls when the main syscalls
are not exported.

I think Adrian Bunk asked for removing it several times.

Also included hunk from Adrian to remove the .globl ia32_sys_call_table

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Remove long obsolete CVS
Andi Kleen [Mon, 26 Jun 2006 11:57:04 +0000 (13:57 +0200)]
[PATCH] x86_64: Remove long obsolete CVS

Early development of x86-64 Linux was in CVS, but that hasn't been
the case for a long time now. Remove the obsolete $Id$s.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: nmi watchdog header cleanup
Don Zickus [Mon, 26 Jun 2006 11:57:01 +0000 (13:57 +0200)]
[PATCH] x86_64: nmi watchdog header cleanup

Misc header cleanup for nmi watchdog.

Signed-off-by: Don Zickus <dzickus@redhat.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: fix unlikely profiling & vsyscalls on x86_64
Ingo Molnar [Mon, 26 Jun 2006 11:56:58 +0000 (13:56 +0200)]
[PATCH] x86_64: fix unlikely profiling & vsyscalls on x86_64

fix unlikely profiling in vsyscalls ...

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: add END()/ENDPROC() annotations to entry.S
Jan Beulich [Mon, 26 Jun 2006 11:56:55 +0000 (13:56 +0200)]
[PATCH] x86_64: add END()/ENDPROC() annotations to entry.S

Since END()/ENDPROC() are now available, add respective annotations to
x86_64's entry.S. This should help debugging activities.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Add compat_printk and sysctl to turn off compat layer warnings
Andi Kleen [Mon, 26 Jun 2006 11:56:52 +0000 (13:56 +0200)]
[PATCH] x86_64: Add compat_printk and sysctl to turn off compat layer warnings

Sometimes e.g. with crashme the compat layer warnings can be noisy.
Add a way to turn them off by gating all output through compat_printk
that checks a global sysctl. The default is not changed.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Use -ENODEV in IOMMU initialization
Andi Kleen [Mon, 26 Jun 2006 11:56:49 +0000 (13:56 +0200)]
[PATCH] x86_64: Use -ENODEV in IOMMU initialization

Fix

initcall at 0xffffffff806c5b89: pci_iommu_init+0x0/0x53c(): returned with error code -1

Return -ENODEV instead when the IOMMU is not used.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] i386/x86-64: simplify ioapic_register_intr()
Jan Beulich [Mon, 26 Jun 2006 11:56:46 +0000 (13:56 +0200)]
[PATCH] i386/x86-64: simplify ioapic_register_intr()

Simplify (remove duplication of) code in ioapic_register_intr().

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: serialize assign_irq_vector() use of static variables
Jan Beulich [Mon, 26 Jun 2006 11:56:43 +0000 (13:56 +0200)]
[PATCH] x86_64: serialize assign_irq_vector() use of static variables

Since assign_irq_vector() can be called at runtime, its access of static
variables should be protected by a lock.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Clean and enhance up K8 northbridge access code
Andi Kleen [Mon, 26 Jun 2006 11:56:40 +0000 (13:56 +0200)]
[PATCH] x86_64: Clean and enhance up K8 northbridge access code

 - Factor out the duplicated access/cache code into a single file
   * Shared between i386/x86-64.
 - Share flush code between AGP and IOMMU
   * Fix a bug: AGP didn't wait for end of flush before
 - Drop 8 northbridges limit and allocate dynamically
 - Add lock to serialize AGP and IOMMU GART flushes
 - Add PCI ID for next AMD northbridge
 - Random related cleanups

The old K8 NUMA discovery code is unchanged. New systems
should all use SRAT for this.

Cc: "Navin Boppuri" <navin.boppuri@newisys.com>
Cc: Dave Jones <davej@redhat.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: trivial gart clean-up
Jon Mason [Mon, 26 Jun 2006 11:56:37 +0000 (13:56 +0200)]
[PATCH] x86_64: trivial gart clean-up

A trivial change to have gart_unmap_sg call gart_unmap_single directly,
instead of bouncing through the dma_unmap_single wrapper in
dma-mapping.h.

This change required moving the gart_unmap_single above gart_unmap_sg,
and under gart_map_single (which seems a more logical place that its
current location IMHO).

Signed-off-by: Jon Mason <jdmason@us.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Implement compat functions for PTRACE_SETSIGINFO/GETSIGINFO
Andi Kleen [Mon, 26 Jun 2006 11:56:34 +0000 (13:56 +0200)]
[PATCH] x86_64: Implement compat functions for PTRACE_SETSIGINFO/GETSIGINFO

Previously we would just silently provide 64 bit services
for this to 32bit processes.

I also added all the other cases explicitely to the ptrace
compat wrapper to make sure this doesn't happen again.

And removed one bogus check in the wrapper.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: iommu_gart_bitmap search to cross next_bit
Mike Waychison [Mon, 26 Jun 2006 11:56:31 +0000 (13:56 +0200)]
[PATCH] x86_64: iommu_gart_bitmap search to cross next_bit

Allow search for a contiguous block of iommu space to cross the next_bit
marker if we have already committed ourselves to flushing the gart.

There shouldn't be any reason why we'd restrict the search.

Signed-off-by: Mike Waychison <mikew@google.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Remove bogus comment in topology.h
Andi Kleen [Mon, 26 Jun 2006 11:56:28 +0000 (13:56 +0200)]
[PATCH] x86_64: Remove bogus comment in topology.h

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: x86_64-enable-large-bzImage.patch
Ingo Molnar [Mon, 26 Jun 2006 11:56:25 +0000 (13:56 +0200)]
[PATCH] x86_64: x86_64-enable-large-bzImage.patch

enable large bzImages on x86_64. (fix is from x86's build.c) Using this
patch i have successfully built and booted an allyesconfig 13MB+ bzImage
on x86_64 too:

 $ size64 vmlinux
    text    data     bss     dec     hex filename
 23444831        8202642 3439360 35086833        21761f1 vmlinux

 -rw-rw-r--  1 mingo mingo 13121740 Apr 19 09:32 arch/x86_64/boot/bzImage

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Remove most of ia32_unistd.h
Andi Kleen [Mon, 26 Jun 2006 11:56:22 +0000 (13:56 +0200)]
[PATCH] x86_64: Remove most of ia32_unistd.h

It's only needed for three system calls, no need to maintain
a full list forever.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: pci-dma.c clean-up - trivial
Jon Mason [Mon, 26 Jun 2006 11:56:19 +0000 (13:56 +0200)]
[PATCH] x86_64: pci-dma.c clean-up - trivial

Replace hard coded DMA masks with #defines from
include/linux/dma-mapping.h

Signed-off-by: Jon Mason <jdmason@us.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: x86_64 version of the smp alternative patch.
Gerd Hoffmann [Mon, 26 Jun 2006 11:56:16 +0000 (13:56 +0200)]
[PATCH] x86_64: x86_64 version of the smp alternative patch.

Changes are largely identical to the i386 version:

 * alternative #define are moved to the new alternative.h file.
 * one new elf section with pointers to the lock prefixes which can be
   nop'ed out for non-smp.
 * two new elf sections simliar to the "classic" alternatives to
   replace SMP code with simpler UP code.
 * fixup headers to use alternative.h instead of defining their own
   LOCK / LOCK_PREFIX macros.

The patch reuses the i386 version of the alternatives code to avoid code
duplication.  The code in alternatives.c was shuffled around a bit to
reduce the number of #ifdefs needed.  It also got some tweaks needed for
x86_64 (vsyscall page handling) and new features (noreplacement option
which was x86_64 only up to now).  Debug printk's are changed from
compile-time to runtime.

Loosely based on a early version from Bastian Blank <waldi@debian.org>

Signed-off-by: Gerd Hoffmann <kraxel@suse.de>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] i386/x86-64: Emulate CPUID4 on AMD
Andi Kleen [Mon, 26 Jun 2006 11:56:13 +0000 (13:56 +0200)]
[PATCH] i386/x86-64: Emulate CPUID4 on AMD

Intel systems report the cache level data from CPUID 4 in sysfs.
Add a CPUID 4 emulation for AMD CPUs to report the same
information for them. This allows programs to read this
information in a uniform way.

The AMD way to report this is less flexible so some assumptions
are hardcoded (e.g. no L3)

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] i386/x86-64: Use new official CPUID to get APICID/core split on AMD platforms
Andi Kleen [Mon, 26 Jun 2006 11:56:10 +0000 (13:56 +0200)]
[PATCH] i386/x86-64: Use new official CPUID to get APICID/core split on AMD platforms

Previously the apicid<->coreid split was computed based on the max
number of cores. Now use a new CPUID AMD defined for that. On most
systems right now it should be 0 and the old method will be used.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Use __always_inline for __inline_memcpy
Andi Kleen [Mon, 26 Jun 2006 11:56:07 +0000 (13:56 +0200)]
[PATCH] x86_64: Use __always_inline for __inline_memcpy

Inspired from i386 changes

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Use local APIC ID from local APIC instead of CPUID
ravikiran thirumalai [Mon, 26 Jun 2006 11:56:04 +0000 (13:56 +0200)]
[PATCH] x86_64: Use local APIC ID from local APIC instead of CPUID

vSMPowered systems use apic_cluster too.  Forcing apic_physflat works
on these systems too, but only if we change phys_pkg_id to use
hard_smp_prcoessor_id() instead of cpuid_ebx.  I am guessing other
multichassi cluster systems would need this too.

Signed-off-by: ravikiran thirumalai <kiran@scalex86.org>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] x86_64: Update defconfig
Andi Kleen [Mon, 26 Jun 2006 11:56:01 +0000 (13:56 +0200)]
[PATCH] x86_64: Update defconfig

Enable some hwmon drivers as modules and tulip and stack unwinding

Kernel image should be somewhat bigger now because of the unwind
information being included, but you'll get exact backtraces for that.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] uclinux: use PER_LINUX_32BIT in binfmt_flat
Malcolm Parsons [Mon, 26 Jun 2006 01:49:41 +0000 (11:49 +1000)]
[PATCH] uclinux: use PER_LINUX_32BIT in binfmt_flat

binfmt_flat.c calls set_personality with PER_LINUX as the personality.
On the arm architecture this results in the program running in 26bit
usermode.  PER_LINUX_32BIT should be used instead.  This doesn't affect
other architectures that use binfmt_flat.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: make enable_irq() macro statement
Greg Ungerer [Mon, 26 Jun 2006 01:47:35 +0000 (11:47 +1000)]
[PATCH] m68knommu: make enable_irq() macro statement

Change enable_irq() macro to be a statement, not expression.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: fix ColdFire 5249 PLL set
Greg Ungerer [Mon, 26 Jun 2006 01:43:35 +0000 (11:43 +1000)]
[PATCH] m68knommu: fix ColdFire 5249 PLL set

Fix PLL setting for the Coldfire 5249 CPU. This brings it into line with
the new style frequency configuration of m68knommu parts.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: ColdFire cache flush fixups
Greg Ungerer [Mon, 26 Jun 2006 01:40:44 +0000 (11:40 +1000)]
[PATCH] m68knommu: ColdFire cache flush fixups

Fix flush code for the ColdFire 5206/5206e/5272 cases.
Add support for the new ColdFire 532x CPU family

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: improve syscall entry and fix strace
Philippe De Muyter [Mon, 26 Jun 2006 01:37:57 +0000 (11:37 +1000)]
[PATCH] m68knommu: improve syscall entry and fix strace

Here is a patch to the system call handling for 5307/5272/etc to:

- fix the strace support (one tested the wrong bit)
- make all system calls a little bit faster by inlining set_esp0 and
  supporting ENOSYS out of the critical path.
- remove extraneous spaces

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: force stack alignment on ColdFire
Greg Ungerer [Mon, 26 Jun 2006 01:01:32 +0000 (11:01 +1000)]
[PATCH] m68knommu: force stack alignment on ColdFire

This patch solve a bug triggered by execvp (this function use calloc to
store the argument list and gcc 3.4.x align the stack to word, not to dword).
This situation aren't related to signal handling and all 2.6.x have the bug.
On ColdFire targets we must force the stack to be aligned.

Original patch from Andrea Tarani <andrea.tarani@gilbarco.com>,

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: configurable frequency selection header
Greg Ungerer [Mon, 26 Jun 2006 00:58:09 +0000 (10:58 +1000)]
[PATCH] m68knommu: configurable frequency selection header

Remove list of fixed clock frequency options used for configuring master
clock, and make field an int. Much more flexible this way, no need to add
more options for every new used freqency.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: configurable frequency selection
Greg Ungerer [Mon, 26 Jun 2006 00:55:36 +0000 (10:55 +1000)]
[PATCH] m68knommu: configurable frequency selection

Remove list of fixed clock frequency options used for configuring master
clock, and make field an int. Much more flexible this way, no need to add
more options for every new used freqency.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: configure support for Avnet5282 board
Greg Ungerer [Mon, 26 Jun 2006 00:47:13 +0000 (10:47 +1000)]
[PATCH] m68knommu: configure support for Avnet5282 board

Add support for the AVNET 5282 board.
Patch submitted by Daniel Alomar <dalomar@serrasold.com>.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: ColdFire 532x CPU configure support
Greg Ungerer [Mon, 26 Jun 2006 00:45:45 +0000 (10:45 +1000)]
[PATCH] m68knommu: ColdFire 532x CPU configure support

Add configure support for the new Freescale 532x family of CPUs.
Patch submitted by Matt Waddel <Matt.Waddel@freescale.com>.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years agoRevert "swsusp special saveable pages support" commits
Linus Torvalds [Mon, 26 Jun 2006 01:41:00 +0000 (18:41 -0700)]
Revert "swsusp special saveable pages support" commits

This reverts commits

  3e3318dee0878d42ed62a19c292a2ac284135db3 [PATCH] swsusp: x86_64 mark special saveable/unsaveable pages
  b6370d96e09944c6e3ae8d5743ca8a8ab1f79f6c [PATCH] swsusp: i386 mark special saveable/unsaveable pages
  ce4ab0012b32c1a4a1d6e934aeb73bf3151c48d9 [PATCH] swsusp: add architecture special saveable pages support

because not only do they apparently cause page faults on x86, the
infrastructure doesn't compile on powerpc.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: ColdFire 532x CPU platform build support
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: ColdFire 532x CPU platform build support

Add build support for the new Freescale 532x CPU platforms.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: add ColdFire 532x UART address support
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: add ColdFire 532x UART address support

Add support for the UART addressing on the new Freescale M532x CPU family.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: add ColdFire 532x timer build support
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: add ColdFire 532x timer build support

Add build support for new Freescale M532x CPU family timer.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: cleanup setup.c
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: cleanup setup.c

A cleanup of m68knommu/kernel/setup.c :

- No need to initialize global pointers to NULL, they will have that value
  automatically, and they eat up space in my data segment image in FLASH.
- Remove get_cpuinfo.  It has been replaced by show_cpuinfo.

Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: check DEBUG defined arch code
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: check DEBUG defined arch code

Don't rely on DEBUG having a value, check for it being defined.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: include ColdFire 532x register definitions
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: include ColdFire 532x register definitions

Include the ColdFire 532x support when including ColdFire peripharp
support definitions.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: add ColdFire 532x cache init
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: add ColdFire 532x cache init

Add cache init support for the new ColdFire 532x CPU family.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: 532x UART support
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: 532x UART support

ColdFire serial driver support for the new 532x CPU family UARTs.

Patch submitted by Matt Waddel <Matt.Waddel@freescale.com>.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: ColdFire 532x register definitions
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: ColdFire 532x register definitions

Register definitions for the new Freescale 532x Coldfire CPU family.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: ColdFire 532x CPU startup code
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: ColdFire 532x CPU startup code

Add kernel startup code for the new Freescale 532x CPU family.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: read/write register access for PIT timer
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: read/write register access for PIT timer

Modify the m68knommu/ColdFire PIT timer code to use register offsets
with raw_read/raw_write access, instead of a mapped struct.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: remove use of rom_length
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: remove use of rom_length

Remove use of rom_length. It serves not real purpose, and when we move
to new stye RAM configuration it will not be needed.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: switch arch config name to CONFIG_M68K
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: switch arch config name to CONFIG_M68K

Switch to naming the architecture config options for the m68knommu branch
as "M68K", dropping "M68KNOMMU".  The CONFIG_MMU separates the 2 now, and
the m68knommu branch is still strictly speaking an M68K (including the
ColdFire parts).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: read/write register access for ColdFire core timer
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: read/write register access for ColdFire core timer

Modify the m68knommu/ColdFire core timer code to use register offsets
with raw_read/raw_write access, instead of a mapped struct.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] m68knommu: 532x FEC eth struct map
Greg Ungerer [Mon, 26 Jun 2006 00:33:10 +0000 (10:33 +1000)]
[PATCH] m68knommu: 532x FEC eth struct map

Specify the struct mapping used on the new Freescale 532x CPU family's
FEC ethernet core.

Patch submitted by Matt Waddel <Matt.Waddel@freescale.com>.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] spufs: update ->flush method proto
Al Viro [Sun, 25 Jun 2006 23:42:33 +0000 (16:42 -0700)]
[PATCH] spufs: update ->flush method proto

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] xfs: update ->flush method proto
Alexey Dobriyan [Sun, 25 Jun 2006 23:42:33 +0000 (16:42 -0700)]
[PATCH] xfs: update ->flush method proto

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Cc: Nathan Scott <nathans@sgi.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years agoMerge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband
Linus Torvalds [Sun, 25 Jun 2006 23:07:58 +0000 (16:07 -0700)]
Merge branch 'for-linus' of /linux/kernel/git/roland/infiniband

* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband:
  IB/iser: iSER Kconfig and Makefile
  IB/iser: iSER handling of memory for RDMA
  IB/iser: iSER RDMA CM (CMA) and IB verbs interaction
  IB/iser: iSER initiator iSCSI PDU and TX/RX
  IB/iser: iSCSI iSER transport provider high level code
  IB/iser: iSCSI iSER transport provider header file
  IB/uverbs: Remove unnecessary list_del()s
  IB/uverbs: Don't free wr list when it's known to be empty

18 years agoFix NFS2 compile error
Linus Torvalds [Sun, 25 Jun 2006 19:30:33 +0000 (12:30 -0700)]
Fix NFS2 compile error

Trond had apparently merged the same patch twice, causing a duplicate
include of the "internal.h" file, with resulting obvious confusion.

Tssk.  I'm the only one allowed to send out trees that don't even
compile! Who does this Trond guy think he is?

Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] i386: Fix softirq accounting with 4K stacks
Björn Steinbrink [Sun, 25 Jun 2006 14:24:40 +0000 (16:24 +0200)]
[PATCH] i386: Fix softirq accounting with 4K stacks

Copy the softirq bits in preempt_count from the current context into the
hardirq context when using 4K stacks to make the softirq_count macro work
correctly and thereby fix softirq cpu time accounting.

Signed-off-by: Björn Steinbrink <B.Steinbrink@gmx.de>
Acked-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years agoMerge git://git.linux-nfs.org/pub/linux/nfs-2.6
Linus Torvalds [Sun, 25 Jun 2006 17:54:14 +0000 (10:54 -0700)]
Merge git://git.linux-nfs.org/pub/linux/nfs-2.6

* git://git.linux-nfs.org/pub/linux/nfs-2.6: (51 commits)
  nfs: remove nfs_put_link()
  nfs-build-fix-99
  git-nfs-build-fixes
  Merge branch 'odirect'
  NFS: alloc nfs_read/write_data as direct I/O is scheduled
  NFS: Eliminate nfs_get_user_pages()
  NFS: refactor nfs_direct_free_user_pages
  NFS: remove user_addr, user_count, and pos from nfs_direct_req
  NFS: "open code" the NFS direct write rescheduler
  NFS: Separate functions for counting outstanding NFS direct I/Os
  NLM: Fix reclaim races
  NLM: sem to mutex conversion
  locks.c: add the fl_owner to nlm_compare_locks
  NFS: Display the chosen RPCSEC_GSS security flavour in /proc/mounts
  NFS: Split fs/nfs/inode.c
  NFS: Fix typo in nfs_do_clone_mount()
  NFS: Fix compile errors introduced by referrals patches
  NFSv4: Ensure that referral mounts bind to a reserved port
  NFSv4: A root pathname is sent as a zero component4
  NFSv4: Follow a referral
  ...

18 years agoMerge master.kernel.org:/pub/scm/linux/kernel/git/mchehab/v4l-dvb
Linus Torvalds [Sun, 25 Jun 2006 17:09:31 +0000 (10:09 -0700)]
Merge /pub/scm/linux/kernel/git/mchehab/v4l-dvb

* master.kernel.org:/pub/scm/linux/kernel/git/mchehab/v4l-dvb: (244 commits)
  V4L/DVB (4210b): git-dvb: tea575x-tuner build fix
  V4L/DVB (4210a): git-dvb versus matroxfb
  V4L/DVB (4209): Added some BTTV PCI IDs for newer boards
  Fixes some sync issues between V4L/DVB development and GIT
  V4L/DVB (4206): Cx88-blackbird: always set encoder height based on tvnorm->id
  V4L/DVB (4205): Merge tda9887 module into tuner.
  V4L/DVB (4203): Explicitly set the enum values.
  V4L/DVB (4202): allow selecting CX2341x port mode
  V4L/DVB (4200): Disable bitrate_mode when encoding mpeg-1.
  V4L/DVB (4199): Add cx2341x-specific control array to cx2341x.c
  V4L/DVB (4198): Avoid newer usages of obsoleted experimental MPEGCOMP API
  V4L/DVB (4197): Port new MPEG API to saa7134-empress with saa6752hs
  V4L/DVB (4196): Port cx88-blackbird to the new MPEG API.
  V4L/DVB (4193): Update cx2341x fw encoding API doc.
  V4L/DVB (4192): Use control helpers for saa7115, cx25840, msp3400.
  V4L/DVB (4191): Add CX2341X MPEG encoder module.
  V4L/DVB (4190): Add helper functions for control processing to v4l2-common.
  V4L/DVB (4189): Add videodev support for VIDIOC_S/G/TRY_EXT_CTRLS.
  V4L/DVB (4188): Add new MPEG control/ioctl definitions to videodev2.h
  V4L/DVB (4186): Add support for the DNTV Live! mini DVB-T card.
  ...

18 years agoFix PM_TRACE dependency: works only on 32-bit x86 for now
Linus Torvalds [Sun, 25 Jun 2006 17:04:15 +0000 (10:04 -0700)]
Fix PM_TRACE dependency: works only on 32-bit x86 for now

Not that x86-64 and other architecture support should be difficult to
add (trivial fixups to the data format and add the proper linker script
entry).

Signed-off-by: Linus Torvalds <torvalds@osdl.org>
18 years ago[PATCH] fix race in idr code
Sonny Rao [Sun, 25 Jun 2006 12:49:34 +0000 (05:49 -0700)]
[PATCH] fix race in idr code

I ran into a bug where the kernel died in the idr code:

cpu 0x1d: Vector: 300 (Data Access) at [c000000b7096f710]
    pc: c0000000001f8984: .idr_get_new_above_int+0x140/0x330
    lr: c0000000001f89b4: .idr_get_new_above_int+0x170/0x330
    sp: c000000b7096f990
   msr: 800000000000b032
   dar: 0
 dsisr: 40010000
  current = 0xc000000b70d43830
  paca    = 0xc000000000556900
    pid   = 2022, comm = hwup
1d:mon> t
[c000000b7096f990c0000000000d2ad8 .expand_files+0x2e8/0x364 (unreliable)
[c000000b7096faa0c0000000001f8bf8 .idr_get_new_above+0x18/0x68
[c000000b7096fb20c00000000002a054 .init_new_context+0x5c/0xf0
[c000000b7096fbc0c000000000049dc8 .copy_process+0x91c/0x1404
[c000000b7096fcd0c00000000004a988 .do_fork+0xd8/0x224
[c000000b7096fdc0c00000000000ebdc .sys_clone+0x5c/0x74
[c000000b7096fe30c000000000008950 .ppc_clone+0x8/0xc

18 years ago[PATCH] update-devices.txt
Jan Engelhardt [Sun, 25 Jun 2006 12:49:33 +0000 (05:49 -0700)]
[PATCH] update-devices.txt

Update Documentation/devices.txt with a new version from the LANANA site
http://www.lanana.org/docs/device-list/devices-2.6+.txt

Signed-off-by: Jan Engelhardt <jengelh@gmx.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>