GitHub/moto-9609/android_kernel_motorola_exynos9610.git
8 years agoMerge remote-tracking branch 'clk/clk-s905' into clk-next
Michael Turquette [Thu, 23 Jun 2016 01:20:12 +0000 (18:20 -0700)]
Merge remote-tracking branch 'clk/clk-s905' into clk-next

8 years agoclk: gxbb: add AmLogic GXBB clk controller driver
Michael Turquette [Mon, 23 May 2016 22:44:26 +0000 (15:44 -0700)]
clk: gxbb: add AmLogic GXBB clk controller driver

The gxbb clock controller is the primary clock generation unit for the
AmLogic GXBB SoC. It is clocked by a fixed 24MHz xtal, contains several
PLLs and the usual post-dividers, muxes, dividers and leaf gates that
are fed into various IP blocks in the SoC.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: gxbb: Document bindings for the GXBB clock controller
Michael Turquette [Thu, 9 Jun 2016 23:20:47 +0000 (16:20 -0700)]
clk: gxbb: Document bindings for the GXBB clock controller

Add documentations for the clock controller.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson: fractional pll support
Michael Turquette [Tue, 7 Jun 2016 01:08:15 +0000 (18:08 -0700)]
clk: meson: fractional pll support

Fractional MPLLs are a superset of the existing AmLogic MPLLs. They add
in a couple of new bitfields for further dividing the clock rate to
achieve rates with fractional hertz.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson: add mpll support
Michael Turquette [Tue, 7 Jun 2016 06:16:17 +0000 (23:16 -0700)]
clk: meson: add mpll support

MPLLs are adjustable rate clocks derived from PLLs. On both Meson8b and
GXBB they appear to be only derived from fixed_pll.

Add support for these clock types so that they can be added to their
respective drivers.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson: add peripheral gate macro
Michael Turquette [Tue, 7 Jun 2016 23:00:55 +0000 (16:00 -0700)]
clk: meson: add peripheral gate macro

There are a series of peripheral and system gate clocks that fan out
from the clk81 signal. Add a helper macro to statically initialize these
gate clocks.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson: only build selected platforms
Michael Turquette [Mon, 23 May 2016 21:29:13 +0000 (14:29 -0700)]
clk: meson: only build selected platforms

Break the AmLogic clock code up so that only the necessary parts are
compiled and linked. The core code is selected by both arm and arm64
builds with COMMON_CLK_AMLOGIC. The individual drivers have their own
config options as well.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson8b: convert to platform_driver
Michael Turquette [Wed, 11 May 2016 18:11:18 +0000 (11:11 -0700)]
clk: meson8b: convert to platform_driver

This patch creates a proper platform_driver for the meson8b clock
controller. Use of CLK_OF_DECLARE is removed, and can be added back in
later if very early registration of some clocks is required.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson8b: clean up composite clocks
Michael Turquette [Thu, 28 Apr 2016 19:01:51 +0000 (12:01 -0700)]
clk: meson8b: clean up composite clocks

Remove the composite clock registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.

To preserve git bisect this patch also flips the switch and starts using
of_clk_add_hw_provider instead of the deprecated meson_clk_register_clks
method. As a byproduct clk.c can be deleted.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson8b: remove mali clk
Michael Turquette [Thu, 5 May 2016 14:56:42 +0000 (07:56 -0700)]
clk: meson8b: remove mali clk

This clock is undocumented and always orphaned. Get rid of it until we
have more complete clock tree documentation.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson8b: clean up cpu clocks
Michael Turquette [Sat, 30 Apr 2016 19:47:36 +0000 (12:47 -0700)]
clk: meson8b: clean up cpu clocks

Remove the cpu clock registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.

Ninja rename a5_clk to cpu_clk to better align with cpufreq convention.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson8b: clean up fixed factor clocks
Michael Turquette [Thu, 28 Apr 2016 19:01:58 +0000 (12:01 -0700)]
clk: meson8b: clean up fixed factor clocks

Remove the fixed factor registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson8b: clean up pll clocks
Michael Turquette [Thu, 28 Apr 2016 19:01:42 +0000 (12:01 -0700)]
clk: meson8b: clean up pll clocks

Remove the pll registration function and helpers. Replace unnecessary
configuration struct with static initialization of the desired clock
type.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson8b: clean up fixed rate clocks
Michael Turquette [Thu, 28 Apr 2016 19:00:52 +0000 (12:00 -0700)]
clk: meson8b: clean up fixed rate clocks

Remove the fixed_rate registration function and helpers from clkc.[ch].
Replace unnecessary configuration struct with static initialization of
the desired clock type.

While we're here, begin the transition to a proper platform_driver and
call of_clk_add_hw_provider with a shiny new struct clk_hw_onecell_data.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoclk: meson8b: rectify reg offsets with datasheet
Michael Turquette [Fri, 29 Apr 2016 00:18:52 +0000 (17:18 -0700)]
clk: meson8b: rectify reg offsets with datasheet

The register offsets in the data sheet are confusing. Document them more
thoroughly.

Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
8 years agoMerge tag 'clk-samsung-4.8' of git://linuxtv.org/snawrocki/samsung into clk-next
Stephen Boyd [Tue, 21 Jun 2016 01:00:16 +0000 (18:00 -0700)]
Merge tag 'clk-samsung-4.8' of git://linuxtv.org/snawrocki/samsung into clk-next

Merge changes from Sylwester Nawrocki for samsung clk drivers:

 - a fix for exynos7 to prevent gating some critical CMU clocks,
 - addition of CPU clocks for CPU frequency scaling on Exynos5433 SoCs,
 - additions for exynos5410 SoC required for Odroid XU board support,
 - register accessors fixes for kernels built for big endian operation
   (mostly exynos4 SoCs),
 - Exynos5433 clock definitions fixes required for suspend to RAM and
   the audio subsystem operation,
 - many cleanups changing attributes of the clock initializer data

* tag 'clk-samsung-4.8' of git://linuxtv.org/snawrocki/samsung: (41 commits)
  clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to PCIE device
  clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flags to avoid hang during S2R
  clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag for AUD UART
  clk: samsung: exynos4: fixup reg access on be
  clk: samsung: fixup endian in pll clk
  clk: samsung: exynos5410: Add WDT, ACLK266 and SSS clocks
  clk: samsung: exynos5433: add CPU clocks configuration data and instantiate CPU clocks
  clk: samsung: cpu: prepare for adding Exynos5433 CPU clocks
  clk: samsung: exynos5433: prepare for adding CPU clocks
  clk: samsung: Suppress unbinding to prevent theoretical attacks
  clk: samsung: exynos5420: Set ID for aclk333 gate clock
  clk: samsung: exynos5410: Add TMU clock
  clk: samsung: exynos5410: Add I2C, HSI2C and RTC clocks
  clk: samsung: exynos5410: Add serial3, USB and PWM clocks
  clk: samsung: exynos3250: Move PLL rates data to init section
  clk: samsung: Fully constify mux parent names
  clk: samsung: exynos5250: Move sleep init function to init section
  clk: samsung: exynos5420: Move sleep init function and PLL data to init section
  clk: samsung: exynos5433: Move PLL rates data to init section
  clk: samsung: exynos5433: Constify all clock initializers
  ...

8 years agoclk: correct comments for __clk_determine_rate
Peng Fan [Mon, 13 Jun 2016 11:34:21 +0000 (19:34 +0800)]
clk: correct comments for __clk_determine_rate

Correct comments for __clk_determine_rate.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoclk: vt8500: rework wm8650_find_pll_bits()
Roman Volkov [Tue, 7 Jun 2016 21:56:10 +0000 (00:56 +0300)]
clk: vt8500: rework wm8650_find_pll_bits()

PLL clock on WM8650 is calculated in the following way:

M * parent [O1] => / P [O2] => / D [O3]

Where O2 is 600MHz >= (M * parent) / P >= 300MHz.

Current algorithm does not met this requirement, so that the
function may return rates which are not supported by the hardware.

This patch fixes the algorithm and simplifies the code, reducing
the calculation time by ~10000 times (according to usermode app) by
removing the nested loops.

Signed-off-by: Roman Volkov <rvolkov@v1ros.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoclk: vt8500: fix gcc-4.9 warnings
Arnd Bergmann [Tue, 7 Jun 2016 21:56:09 +0000 (00:56 +0300)]
clk: vt8500: fix gcc-4.9 warnings

This fixes some false positive warnings we get with older compiler
versions:

clk-vt8500.c: In function ‘wm8650_find_pll_bits’:
clk-vt8500.c:430:12: ‘best_div2’ may be used uninitialized in this function
clk-vt8500.c:429:12: ‘best_div1’ may be used uninitialized in this function
clk-vt8500.c:428:14: ‘best_mul’ may be used uninitialized in this function
clk-vt8500.c: In function ‘wm8750_find_pll_bits’:
clk-vt8500.c:509:12: ‘best_div2’ may be used uninitialized in this function
clk-vt8500.c:508:12: ‘best_div1’ may be used uninitialized in this function
clk-vt8500.c:507:14: ‘best_mul’ may be used uninitialized in this function
clk-vt8500.c: In function ‘wm8850_find_pll_bits’:
clk-vt8500.c:560:12: ‘best_div2’ may be used uninitialized in this function
clk-vt8500.c:559:12: ‘best_div1’ may be used uninitialized in this function
clk-vt8500.c:558:14: ‘best_mul’ may be used uninitialized in this function

As the local variables are only use for temporaries, we can just
as well assign the final values directly, which also makes the
code slightly shorter.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Roman Volkov <rvolkov@v1ros.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoclk: Remove unused variable
Lee Jones [Tue, 7 Jun 2016 12:25:02 +0000 (13:25 +0100)]
clk: Remove unused variable

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoclk: hi6220: fix missing clk.h include
Ben Dooks [Tue, 7 Jun 2016 13:54:08 +0000 (14:54 +0100)]
clk: hi6220: fix missing clk.h include

Fix the warning from missing "clk.h" include which
defines hi6220_register_clkdiv() function.

drivers/clk/hisilicon/clkdivider-hi6220.c:102:12: warning: symbol 'hi6220_register_clkdiv' was not declared. Should it be static?

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoclk: iproc: fix missing include of clk-iproc.h
Ben Dooks [Tue, 7 Jun 2016 16:32:30 +0000 (17:32 +0100)]
clk: iproc: fix missing include of clk-iproc.h

Fix the implicit declaration of iproc_armpll_setup() by
including clk-iproc.h which defines it. Fixes the warning:

drivers/clk/bcm/clk-iproc-armpll.c:242:13: warning: symbol 'iproc_armpll_setup' was not declared. Should it be static?

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoclk: at91: make of_sama5d2_clk_generated_setup() static
Ben Dooks [Tue, 7 Jun 2016 16:38:09 +0000 (17:38 +0100)]
clk: at91: make of_sama5d2_clk_generated_setup() static

The of_sama5d2_clk_generated_setup() is not exported outside
of the driver, so make it static to fix the warning about it
being not static:

drivers/clk/at91/clk-generated.c:270:13: warning: symbol 'of_sama5d2_clk_generated_setup' was not declared. Should it be static?

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoMerge branch 'clk-fixes' into clk-next
Stephen Boyd [Tue, 21 Jun 2016 00:44:14 +0000 (17:44 -0700)]
Merge branch 'clk-fixes' into clk-next

* clk-fixes:
  clk: Fix return value check in oxnas_stdclk_probe()
  clk: rockchip: release io resource when failing to init clk on rk3399
  clk: rockchip: fix cpuclk registration error handling
  clk: rockchip: Revert "clk: rockchip: reset init state before mmc card initialization"
  clk: rockchip: fix incorrect parent for rk3399's {c,g}pll_aclk_perihp_src
  clk: rockchip: mark rk3399 GIC clocks as critical
  clk: rockchip: initialize flags of clk_init_data in mmc-phase clock

8 years agoMerge tag 'v4.7-rockchip-clk-fixes1' of git://git.kernel.org/pub/scm/linux/kernel...
Stephen Boyd [Tue, 21 Jun 2016 00:01:45 +0000 (17:01 -0700)]
Merge tag 'v4.7-rockchip-clk-fixes1' of git://git./linux/kernel/git/mmind/linux-rockchip into clk-fixes

A bunch of fixes. Some for the newly added rk3399 clock tree, some
concerning error handling and initialization and a revert of the
mmc-phase clock initialization, as this could conflict with the
bootloader setting of this clock and a real solution to initing
the phase correctly from dw_mmc went in as fix for 4.7 through
the mmc tree.

* tag 'v4.7-rockchip-clk-fixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  clk: rockchip: release io resource when failing to init clk on rk3399
  clk: rockchip: fix cpuclk registration error handling
  clk: rockchip: Revert "clk: rockchip: reset init state before mmc card initialization"
  clk: rockchip: fix incorrect parent for rk3399's {c,g}pll_aclk_perihp_src
  clk: rockchip: mark rk3399 GIC clocks as critical
  clk: rockchip: initialize flags of clk_init_data in mmc-phase clock

8 years agoclk: Fix return value check in oxnas_stdclk_probe()
Wei Yongjun [Fri, 17 Jun 2016 17:24:23 +0000 (17:24 +0000)]
clk: Fix return value check in oxnas_stdclk_probe()

In case of error, the function syscon_node_to_regmap() returns
ERR_PTR() and never returns NULL. The NULL test in the return
value check should be replaced with IS_ERR().

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Fixes: 0bbd72b4c64f ("clk: Add Oxford Semiconductor OXNAS Standard Clocks")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoclk: multiplier: Prevent the multiplier from under / over flowing
Maxime Ripard [Mon, 16 May 2016 12:47:02 +0000 (14:47 +0200)]
clk: multiplier: Prevent the multiplier from under / over flowing

In the current multiplier base clock implementation, if the
CLK_SET_RATE_PARENT flag isn't set, the code will not make sure that the
multiplier computed remains within the boundaries of our clock.

This means that if the clock we want to reach is below the parent rate,
or if the multiplier is above the maximum that we can reach, we will end up
with a completely bogus one that the clock cannot achieve.

Fixes: f2e0a53271a4 ("clk: Add a basic multiplier clock")
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1463402840-17062-3-git-send-email-maxime.ripard@free-electrons.com

8 years agoMerge commit 'f17a0dd1c2e0' into clk-next
Michael Turquette [Fri, 17 Jun 2016 05:07:08 +0000 (22:07 -0700)]
Merge commit 'f17a0dd1c2e0' into clk-next

8 years agoclk: Use _rcuidle suffix to allow clk_core_enable() to used from idle
Paul E. McKenney [Tue, 26 Apr 2016 21:02:23 +0000 (14:02 -0700)]
clk: Use _rcuidle suffix to allow clk_core_enable() to used from idle

This commit fixes the RCU use-from-idle bug corresponding the following
splat:

> [ INFO: suspicious RCU usage. ]
> 4.6.0-rc5-next-20160426+ #1127 Not tainted
> -------------------------------
> include/trace/events/clk.h:45 suspicious rcu_dereference_check() usage!
>
> other info that might help us debug this:
>
>
> RCU used illegally from idle CPU!
> rcu_scheduler_active = 1, debug_locks = 0
> RCU used illegally from extended quiescent state!
> 2 locks held by swapper/0/0:
>  #0:  (&oh->hwmod_key#30){......}, at: [<c0121afc>] omap_hwmod_enable+0x18/0x44
>  #1:  (enable_lock){......}, at: [<c0630684>] clk_enable_lock+0x18/0x124
>
> stack backtrace:
> CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.6.0-rc5-next-20160426+ #1127
> Hardware name: Generic OMAP36xx (Flattened Device Tree)
> [<c0110290>] (unwind_backtrace) from [<c010c3a8>] (show_stack+0x10/0x14)
> [<c010c3a8>] (show_stack) from [<c047fd68>] (dump_stack+0xb0/0xe4)
> [<c047fd68>] (dump_stack) from [<c06315c0>] (clk_core_enable+0x1e0/0x36c)
> [<c06315c0>] (clk_core_enable) from [<c0632298>] (clk_enable+0x1c/0x38)
> [<c0632298>] (clk_enable) from [<c01204e0>] (_enable_clocks+0x18/0x7c)
> [<c01204e0>] (_enable_clocks) from [<c012137c>] (_enable+0x114/0x2ec)
> [<c012137c>] (_enable) from [<c0121b08>] (omap_hwmod_enable+0x24/0x44)
> [<c0121b08>] (omap_hwmod_enable) from [<c0122ad0>] (omap_device_enable+0x3c/0x90)
> [<c0122ad0>] (omap_device_enable) from [<c0122b34>] (_od_runtime_resume+0x10/0x38)
> [<c0122b34>] (_od_runtime_resume) from [<c052cc00>] (__rpm_callback+0x2c/0x60)
> [<c052cc00>] (__rpm_callback) from [<c052cc54>] (rpm_callback+0x20/0x80)
> [<c052cc54>] (rpm_callback) from [<c052df7c>] (rpm_resume+0x3d0/0x6f0)
> [<c052df7c>] (rpm_resume) from [<c052e2e8>] (__pm_runtime_resume+0x4c/0x64)
> [<c052e2e8>] (__pm_runtime_resume) from [<c04bf2c4>] (omap2_gpio_resume_after_idle+0x54/0x68)
> [<c04bf2c4>] (omap2_gpio_resume_after_idle) from [<c01269dc>] (omap3_enter_idle_bm+0xfc/0x1ec)
> [<c01269dc>] (omap3_enter_idle_bm) from [<c0601888>] (cpuidle_enter_state+0x80/0x3d4)
> [<c0601888>] (cpuidle_enter_state) from [<c0183b08>] (cpu_startup_entry+0x198/0x3a0)
> [<c0183b08>] (cpu_startup_entry) from [<c0b00c0c>] (start_kernel+0x354/0x3c8)
> [<c0b00c0c>] (start_kernel) from [<8000807c>] (0x8000807c)

Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: <linux-omap@vger.kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: <linux-clk@vger.kernel.org>
8 years agoclk: Add _rcuidle tracepoints to allow clk_core_disable() use from idle
Paul E. McKenney [Tue, 26 Apr 2016 19:43:57 +0000 (12:43 -0700)]
clk: Add _rcuidle tracepoints to allow clk_core_disable() use from idle

This commit adds an _rcuidle suffix to a pair of trace events to
prevent the following splat:

> ===============================
> [ INFO: suspicious RCU usage. ]
> 4.6.0-rc5-next-20160426+ #1114 Not tainted
> -------------------------------
> include/trace/events/clk.h:59 suspicious rcu_dereference_check() usage!
>
> other info that might help us debug this:
>
>
> RCU used illegally from idle CPU!
> rcu_scheduler_active = 1, debug_locks = 0
> RCU used illegally from extended quiescent state!
> 2 locks held by swapper/0/0:
>  #0:  (&oh->hwmod_key#30){......}, at: [<c0121b40>] omap_hwmod_idle+0x18/0x44
>  #1:  (enable_lock){......}, at: [<c0630998>] clk_enable_lock+0x18/0x124
>
> stack backtrace:
> CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.6.0-rc5-next-20160426+ #1114
> Hardware name: Generic OMAP36xx (Flattened Device Tree)
> [<c0110290>] (unwind_backtrace) from [<c010c3a8>] (show_stack+0x10/0x14)
> [<c010c3a8>] (show_stack) from [<c047fd68>] (dump_stack+0xb0/0xe4)
> [<c047fd68>] (dump_stack) from [<c0631618>] (clk_core_disable+0x17c/0x348)
> [<c0631618>] (clk_core_disable) from [<c0632774>] (clk_disable+0x24/0x30)
> [<c0632774>] (clk_disable) from [<c0120590>] (_disable_clocks+0x18/0x7c)
> [<c0120590>] (_disable_clocks) from [<c0121680>] (_idle+0x12c/0x230)
> [<c0121680>] (_idle) from [<c0121b4c>] (omap_hwmod_idle+0x24/0x44)
> [<c0121b4c>] (omap_hwmod_idle) from [<c0122c24>] (omap_device_idle+0x3c/0x90)
> [<c0122c24>] (omap_device_idle) from [<c052cc00>] (__rpm_callback+0x2c/0x60)
> [<c052cc00>] (__rpm_callback) from [<c052cc54>] (rpm_callback+0x20/0x80)
> [<c052cc54>] (rpm_callback) from [<c052d150>] (rpm_suspend+0x100/0x768)
> [<c052d150>] (rpm_suspend) from [<c052ec58>] (__pm_runtime_suspend+0x64/0x84)
> [<c052ec58>] (__pm_runtime_suspend) from [<c04bf25c>] (omap2_gpio_prepare_for_idle+0x5c/0x70)
> [<c04bf25c>] (omap2_gpio_prepare_for_idle) from [<c0125568>] (omap_sram_idle+0x140/0x244)
> [<c0125568>] (omap_sram_idle) from [<c01269dc>] (omap3_enter_idle_bm+0xfc/0x1ec)
> [<c01269dc>] (omap3_enter_idle_bm) from [<c0601bdc>] (cpuidle_enter_state+0x80/0x3d4)
> [<c0601bdc>] (cpuidle_enter_state) from [<c0183b08>] (cpu_startup_entry+0x198/0x3a0)
> [<c0183b08>] (cpu_startup_entry) from [<c0b00c0c>] (start_kernel+0x354/0x3c8)
> [<c0b00c0c>] (start_kernel) from [<8000807c>] (0x8000807c)

Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: <linux-omap@vger.kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: <linux-clk@vger.kernel.org>
8 years agoclk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to PCIE device
Jaehoon Chung [Fri, 10 Jun 2016 04:56:32 +0000 (13:56 +0900)]
clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag to PCIE device

This patch adds the CLK_IGNORE_UNUSED flag for PCI Express's clocks
which need to remain enabled. The 'pcie' gate clock definition is
also added.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited the patch's summary]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flags to avoid hang during S2R
Jonghwa Lee [Fri, 10 Jun 2016 04:56:31 +0000 (13:56 +0900)]
clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flags to avoid hang during S2R

Some clocks are required to be unmasked during suspend to RAM. Otherwise
the PMU will stuck and the power down sequence will never be completed.

Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited the patch's summary]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag for AUD UART
Beomho Seo [Fri, 10 Jun 2016 04:56:30 +0000 (13:56 +0900)]
clk: samsung: exynos5433: Add CLK_IGNORE_UNUSED flag for AUD UART

This patch adds CLK_IGNORE_UNUSED flag for sclk_aud_uart gate
clock for uart3 operation.

Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
[s.nawrocki@samsung.com: edited the patch's summary]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos4: fixup reg access on be
Matthew Leach [Wed, 8 Jun 2016 18:30:58 +0000 (19:30 +0100)]
clk: samsung: exynos4: fixup reg access on be

Use the byte-order aware big endian accessors, allowing for kernels
running under big-endian.

Signed-off-by: Matthew Leach <matthew@mattleach.net>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: fixup endian in pll clk
Matthew Leach [Wed, 8 Jun 2016 18:30:56 +0000 (19:30 +0100)]
clk: samsung: fixup endian in pll clk

Fix the clk endian access code to deal with kernels built for big endian
operation.

Signed-off-by: Matthew Leach <matthew@mattleach.net>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: rockchip: release io resource when failing to init clk on rk3399
Shawn Lin [Fri, 3 Jun 2016 00:54:18 +0000 (08:54 +0800)]
clk: rockchip: release io resource when failing to init clk on rk3399

We should call iounmap to relase reg_base since it's not going
to be used any more if failing to init clk.

This was missing on the newly added rk3399 clock tree.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoclk: samsung: exynos5410: Add WDT, ACLK266 and SSS clocks
Krzysztof Kozlowski [Wed, 1 Jun 2016 09:45:50 +0000 (11:45 +0200)]
clk: samsung: exynos5410: Add WDT, ACLK266 and SSS clocks

Add clock hierarchy for Security SubSystem clock and watchdog.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5433: add CPU clocks configuration data and instantiate CPU clocks
Bartlomiej Zolnierkiewicz [Tue, 24 May 2016 13:19:17 +0000 (15:19 +0200)]
clk: samsung: exynos5433: add CPU clocks configuration data and instantiate CPU clocks

Add the CPU clocks configuration data and instantiate the CPU clocks
type for Exynos5433.

Cc: Kukjin Kim <kgene@kernel.org>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: cpu: prepare for adding Exynos5433 CPU clocks
Bartlomiej Zolnierkiewicz [Tue, 24 May 2016 13:19:16 +0000 (15:19 +0200)]
clk: samsung: cpu: prepare for adding Exynos5433 CPU clocks

Exynos5433 uses different register layout for CPU clock registers
than earlier SoCs so add new code for handling this layout.  Also
add new CLK_CPU_HAS_E5433_REGS_LAYOUT flag to request using it.

There should be no functional change resulting from this patch.

Cc: Kukjin Kim <kgene@kernel.org>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5433: prepare for adding CPU clocks
Bartlomiej Zolnierkiewicz [Tue, 24 May 2016 13:19:15 +0000 (15:19 +0200)]
clk: samsung: exynos5433: prepare for adding CPU clocks

Open-code samsung_cmu_register_one() calls for CMU_APOLLO and
CMU_ATLAS setup code as a preparation for adding CPU clocks
support for Exynos5433.

There should be no functional change resulting from this patch.

Cc: Kukjin Kim <kgene@kernel.org>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: Suppress unbinding to prevent theoretical attacks
Krzysztof Kozlowski [Tue, 17 May 2016 07:26:14 +0000 (09:26 +0200)]
clk: samsung: Suppress unbinding to prevent theoretical attacks

Although unbinding a driver requires root privileges but it still might
be used theoretically in certain attacks (by triggering NULL pointer
exception or memory corruption if driver does not provide proper remove
callbacks or core does not handle it).

Samsung clock drivers are essential for system operation so their
removal is not expected. More over, the Exynos3250 ISP clock driver does
not implement remove() driver callback and it is not buildable as
modules.

Suppress the unbind interface for Exynos3250 ISP and S3C2410 DCLK clock
drivers.

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5420: Set ID for aclk333 gate clock
Javier Martinez Canillas [Tue, 24 May 2016 17:41:01 +0000 (13:41 -0400)]
clk: samsung: exynos5420: Set ID for aclk333 gate clock

The aclk333 clock needs to be ungated during the MFC power domain switch,
so set the clock ID to allow the Exynos power domain logic to lookup this
clock if is defined in the MFC PD device tree node.

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5410: Add TMU clock
Krzysztof Kozlowski [Tue, 31 May 2016 18:39:01 +0000 (20:39 +0200)]
clk: samsung: exynos5410: Add TMU clock

Add clock for TMU to the Exynos5410 clock driver.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5410: Add I2C, HSI2C and RTC clocks
Krzysztof Kozlowski [Sat, 28 May 2016 09:54:30 +0000 (11:54 +0200)]
clk: samsung: exynos5410: Add I2C, HSI2C and RTC clocks

Add clocks for I2C, USI (HSI2C) and RTC to the Exynos5410 clock driver.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5410: Add serial3, USB and PWM clocks
Krzysztof Kozlowski [Sat, 28 May 2016 09:54:14 +0000 (11:54 +0200)]
clk: samsung: exynos5410: Add serial3, USB and PWM clocks

Just like other Exynos5 family SoCs, this one has four UARTs. Add
missing UART3 clocks to the Exynos5410 clock driver.

Add clocks for USB and PWM.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos3250: Move PLL rates data to init section
Krzysztof Kozlowski [Wed, 11 May 2016 12:12:16 +0000 (14:12 +0200)]
clk: samsung: exynos3250: Move PLL rates data to init section

The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: Fully constify mux parent names
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:14 +0000 (14:02 +0200)]
clk: samsung: Fully constify mux parent names

The PNAME macro defines array of strings for names of mux parents.
Although the strings itself were const but pointers to them were not thus
this data resided in initdata. Make this an array of const pointers to
const strings and move to initconst section.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5250: Move sleep init function to init section
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:13 +0000 (14:02 +0200)]
clk: samsung: exynos5250: Move sleep init function to init section

The exynos5250_clk_sleep_init() function can be moved to init section
because it is referenced only from other init-level calls.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5420: Move sleep init function and PLL data to init section
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:12 +0000 (14:02 +0200)]
clk: samsung: exynos5420: Move sleep init function and PLL data to init section

The exynos5420_clk_sleep_init() function and arrays with initialization
data of PLLs can be moved to init section because they are referenced
only from other init-level symbols.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5433: Move PLL rates data to init section
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:11 +0000 (14:02 +0200)]
clk: samsung: exynos5433: Move PLL rates data to init section

The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5433: Constify all clock initializers
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:10 +0000 (14:02 +0200)]
clk: samsung: exynos5433: Constify all clock initializers

All of initialization data can be made const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos7: Constify all clock initializers
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:09 +0000 (14:02 +0200)]
clk: samsung: exynos7: Constify all clock initializers

All of initialization data can be made const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5440: Constify all clock initializers
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:08 +0000 (14:02 +0200)]
clk: samsung: exynos5440: Constify all clock initializers

All of initialization data can be made const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5420: Constify all clock initializers
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:07 +0000 (14:02 +0200)]
clk: samsung: exynos5420: Constify all clock initializers

All of initialization data can be made const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5410: Constify all clock initializers
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:06 +0000 (14:02 +0200)]
clk: samsung: exynos5410: Constify all clock initializers

All of initialization data can be made const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5260: Constify all clock initializers
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:05 +0000 (14:02 +0200)]
clk: samsung: exynos5260: Constify all clock initializers

All of initialization data can be made const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos5250: Constify all clock initializers
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:04 +0000 (14:02 +0200)]
clk: samsung: exynos5250: Constify all clock initializers

All of initialization data can be made const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos4415: Move PLL rates data to init section
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:03 +0000 (14:02 +0200)]
clk: samsung: exynos4415: Move PLL rates data to init section

The arrays with initialization data of PLLs can be moved to initconst
section because they are referenced only from other initconst-level
symbols.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos4415: Constify all clock initializers
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:02 +0000 (14:02 +0200)]
clk: samsung: exynos4415: Constify all clock initializers

All of initialization data can be made const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos4: Constify all clock initializers
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:01 +0000 (14:02 +0200)]
clk: samsung: exynos4: Constify all clock initializers

All of initialization data can be made const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos4: Move local function to init section
Krzysztof Kozlowski [Wed, 11 May 2016 12:02:00 +0000 (14:02 +0200)]
clk: samsung: exynos4: Move local function to init section

The local exynos4_get_xom() function is referenced only from other
init-level functions.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos3250: Constify all clock initializers
Krzysztof Kozlowski [Wed, 11 May 2016 12:01:59 +0000 (14:01 +0200)]
clk: samsung: exynos3250: Constify all clock initializers

All of initialization data can be made const.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos3250: Move platform driver and of_device_id to init section
Krzysztof Kozlowski [Wed, 11 May 2016 12:01:58 +0000 (14:01 +0200)]
clk: samsung: exynos3250: Move platform driver and of_device_id to init section

The platform_driver and of_device_id structs can be moved to init
section because they are referenced only from subsys_initcall-level
function.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: Constify clock init data with clock arrays
Krzysztof Kozlowski [Wed, 11 May 2016 12:01:57 +0000 (14:01 +0200)]
clk: samsung: Constify clock init data with clock arrays

samsung_cmu_register_one() can accept pointer to const initialization
data: struct samsung_cmu_info. The members of the latter can also be
pointers to const data.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: clkout: Add support for Exynos5410
Krzysztof Kozlowski [Mon, 16 May 2016 08:26:47 +0000 (10:26 +0200)]
clk: samsung: clkout: Add support for Exynos5410

Add compatible for Exynos5410 so the PMU on this SoC would provide
CLKOUT.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: Remove useless check for return value of samsung_clk_init
Krzysztof Kozlowski [Mon, 9 May 2016 17:32:31 +0000 (19:32 +0200)]
clk: samsung: Remove useless check for return value of samsung_clk_init

The samsung_clk_init() cannot return NULL. Either it returns allocated
memory or it panics.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: samsung: exynos7: Don't gate CMU_{CCORE, FSYS0} blocks clock
Alim Akhtar [Thu, 14 Apr 2016 04:42:52 +0000 (10:12 +0530)]
clk: samsung: exynos7: Don't gate CMU_{CCORE, FSYS0} blocks clock

This patch adds CLK_IS_CRITICAL flag to ACLK_CCORE_133 and ACLK_FSYS0_200
clocks. These clocks are critical for accessing CMU_CCORE and CMU_FSYS0
blocks registers. Let these clocks to be enabled all the time.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agodt-bindings: clock: Add watchdog and SSS clock IDs to Exynos5410
Krzysztof Kozlowski [Wed, 1 Jun 2016 09:45:49 +0000 (11:45 +0200)]
dt-bindings: clock: Add watchdog and SSS clock IDs to Exynos5410

Add IDs for watchdog and Security SubSystem to Exynos5410.  Use the same
number as for Exynos5420 just in case in future these drivers were
merged.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: nxp: Select MFD_SYSCON for creg driver
Ezequiel Garcia [Mon, 16 May 2016 15:45:36 +0000 (12:45 -0300)]
clk: nxp: Select MFD_SYSCON for creg driver

Commit 378523d15003 ("clk: add lpc18xx creg clk driver")
added a new clock driver but missed the proper MFD_SYSCON select.
Fix it.

Fixes: 378523d15003 ("clk: add lpc18xx creg clk driver")
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Acked-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoMAINTAINERS: Add file patterns for clock device tree bindings
Geert Uytterhoeven [Sun, 22 May 2016 09:05:48 +0000 (11:05 +0200)]
MAINTAINERS: Add file patterns for clock device tree bindings

Submitters of device tree binding documentation may forget to CC
the subsystem maintainer if this is missing.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoclk: Remove CLK_IS_ROOT flag
Stephen Boyd [Wed, 1 Jun 2016 21:56:57 +0000 (14:56 -0700)]
clk: Remove CLK_IS_ROOT flag

Now that we've gotten rid of all the users of this flag we can
retire the number, leaving a slot open for a future flag user.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agoclk: microchip: Remove CLK_IS_ROOT
Stephen Boyd [Wed, 1 Jun 2016 21:52:54 +0000 (14:52 -0700)]
clk: microchip: Remove CLK_IS_ROOT

This flag is a no-op now (see commit 47b0eeb3dc8a "clk: Deprecate
CLK_IS_ROOT", 2016-02-02) so remove it.

Cc: Purna Chandra Mandal <purna.mandal@microchip.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: <linux-mips@linux-mips.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agopowerpc/512x: clk: Remove CLK_IS_ROOT
Stephen Boyd [Wed, 20 Apr 2016 01:31:12 +0000 (18:31 -0700)]
powerpc/512x: clk: Remove CLK_IS_ROOT

This flag is a no-op now (see commit 47b0eeb3dc8a "clk: Deprecate
CLK_IS_ROOT", 2016-02-02) so remove it.

Cc: Gerhard Sittig <gsi@denx.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agovexpress/spc: Remove CLK_IS_ROOT
Stephen Boyd [Wed, 20 Apr 2016 01:36:55 +0000 (18:36 -0700)]
vexpress/spc: Remove CLK_IS_ROOT

This flag is a no-op now (see commit 47b0eeb3dc8a "clk: Deprecate
CLK_IS_ROOT", 2016-02-02) so remove it.

Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
8 years agodt-bindings: clock: Add TMU clock ID to Exynos5410
Krzysztof Kozlowski [Tue, 31 May 2016 18:39:00 +0000 (20:39 +0200)]
dt-bindings: clock: Add TMU clock ID to Exynos5410

Add ID for TMU clock to Exynos5410. Use the same number as for
Exynos5420 just in case in future these drivers were merged.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agodt-bindings: clock: Add I2C, HSI2C and RTC clock IDs to Exynos5410
Krzysztof Kozlowski [Sat, 28 May 2016 09:54:29 +0000 (11:54 +0200)]
dt-bindings: clock: Add I2C, HSI2C and RTC clock IDs to Exynos5410

Add IDs for I2C, USI (HSI2C) and RTC clocks to Exynos5410. Use the same
number as for Exynos5420 just in case in future these drivers are merged.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agodt-bindings: clock: Add PWM and USB clock IDs to Exynos5410
Krzysztof Kozlowski [Sat, 28 May 2016 09:54:13 +0000 (11:54 +0200)]
dt-bindings: clock: Add PWM and USB clock IDs to Exynos5410

Add IDs for PWM and USB clocks to Exynos5410. Use the same number as for
Exynos5420 just in case in future these drivers were merged.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agodt-bindings: clock: Add license and reformat Exynos5410 clock IDs
Krzysztof Kozlowski [Sat, 28 May 2016 09:54:12 +0000 (11:54 +0200)]
dt-bindings: clock: Add license and reformat Exynos5410 clock IDs

Add license and copyrights (file introduced in 2014) to header with
Exynos5410 clock IDs. Additionally reformat it to improve readability.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
8 years agoclk: rockchip: fix cpuclk registration error handling
Xing Zheng [Thu, 26 May 2016 13:49:08 +0000 (21:49 +0800)]
clk: rockchip: fix cpuclk registration error handling

It maybe due to a copy-paste error the error handing should be
cclk not clk when checking if the cpuclk registration succeeded.

Reported-by: Lin Huang <lin.huang@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoclk: rockchip: Revert "clk: rockchip: reset init state before mmc card initialization"
Douglas Anderson [Thu, 12 May 2016 18:03:16 +0000 (11:03 -0700)]
clk: rockchip: Revert "clk: rockchip: reset init state before mmc card initialization"

This reverts commit 7a03fe6f48f3 ("clk: rockchip: reset init state
before mmc card initialization").

Though not totally obvious from the commit message nor from the source
code, that commit appears to be trying to reset the "_drv" MMC clocks to
90 degrees (note that the "_sample" MMC clocks have a shift of 0 so are
not touched).

The major problem here is that it doesn't properly reset things.  The
phase is a two bit field and the commit only touches one of the two
bits.  Thus the commit had the following affect:
- phase   0  => phase  90
- phase  90  => phase  90
- phase 180  => phase 270
- phase 270  => phase 270

Things get even weirder if you happen to have a bootloader that was
actually using delay elements (should be no reason to, but you never
know), since those are additional bits that weren't touched by the
original patch.

This is unlikely to be what we actually want.  Checking on rk3288-veyron
devices, I can see that the bootloader leaves these clocks as:
- emmc:  phase 180
- sdmmc: phase 90
- sdio0: phase 90

Thus on rk3288-veyron devices the commit we're reverting had the effect
of changing the eMMC clock to phase 270.  This probably explains the
scattered reports I've heard of eMMC devices not working on some veyron
devices when using the upstream kernel.

The original commit was presumably made because previously the kernel
didn't touch the "_drv" phase at all and relied on whatever value was
there when the kernel started.  If someone was using a bootloader that
touched the "_drv" phase then, indeed, we should have code in the kernel
to fix that.  ...and also, to get ideal timings, we should also have the
kernel change the phase depending on the speed mode.  In fact, that's
the subject of a recent patch I posted at
<https://patchwork.kernel.org/patch/9075141/>.

Ideally, we should take both the patch posted to dw_mmc and this
revert.  Since those will likely go through different trees, here I
describe behavior with the combos:

1. Just this revert: likely will fix rk3288-veyron eMMC on some devices
   + other cases; might break someone with a strange bootloader that
   sets the phase to 0 or one that uses delay elements (pretty
   unpredicable what would happen in that case).
2. Just dw_mmc patch: fixes everyone.  Effectly the dw_mmc patch will
   totally override the broken patch and fix everything.
3. Both patches: fixes everyone.  Once dw_mmc is initting properly then
   any defaults from the clock code doesn't mattery.

Fixes: 7a03fe6f48f3 ("clk: rockchip: reset init state before mmc card initialization")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
[emmc and sdmmc still work on all current boards in mainline after this
revert, so they should take precedence over any out-of-tree board that
will hopefully again get fixed with the better upcoming dw_mmc change.]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoclk: rockchip: fix incorrect parent for rk3399's {c,g}pll_aclk_perihp_src
Xing Zheng [Fri, 13 May 2016 18:42:17 +0000 (11:42 -0700)]
clk: rockchip: fix incorrect parent for rk3399's {c,g}pll_aclk_perihp_src

There was a typo, swapping 'c' <--> 'g'.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoclk: rockchip: mark rk3399 GIC clocks as critical
Brian Norris [Fri, 13 May 2016 18:42:16 +0000 (11:42 -0700)]
clk: rockchip: mark rk3399 GIC clocks as critical

We never want to kill the GIC.

Noticed when making other clock fixups, and seeing the newly-constructed
clock tree try to disable cpll, where we had this parent structure:

  aclk_gic <------\
                  |--- aclk_gic_pre <-- cpll <-- pll_cpll
  aclk_gic_noc <--/

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoclk: rockchip: initialize flags of clk_init_data in mmc-phase clock
Heiko Stuebner [Tue, 17 May 2016 18:57:50 +0000 (20:57 +0200)]
clk: rockchip: initialize flags of clk_init_data in mmc-phase clock

The flags element of clk_init_data was never initialized for mmc-
phase-clocks resulting in the element containing a random value
and thus possibly enabling unwanted clock flags.

Fixes: 89bf26cbc1a0 ("clk: rockchip: Add support for the mmc clock phases using the framework")
Cc: stable@vger.kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
8 years agoLinux 4.7-rc1
Linus Torvalds [Sun, 29 May 2016 16:29:24 +0000 (09:29 -0700)]
Linux 4.7-rc1

8 years agohash_string: Fix zero-length case for !DCACHE_WORD_ACCESS
George Spelvin [Sun, 29 May 2016 12:05:56 +0000 (08:05 -0400)]
hash_string: Fix zero-length case for !DCACHE_WORD_ACCESS

The self-test was updated to cover zero-length strings; the function
needs to be updated, too.

Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: George Spelvin <linux@sciencehorizons.net>
Fixes: fcfd2fbf22d2 ("fs/namei.c: Add hashlen_string() function")
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
8 years agoRename other copy of hash_string to hashlen_string
George Spelvin [Sun, 29 May 2016 05:26:41 +0000 (01:26 -0400)]
Rename other copy of hash_string to hashlen_string

The original name was simply hash_string(), but that conflicted with a
function with that name in drivers/base/power/trace.c, and I decided
that calling it "hashlen_" was better anyway.

But you have to do it in two places.

[ This caused build errors for architectures that don't define
  CONFIG_DCACHE_WORD_ACCESS   - Linus ]

Signed-off-by: George Spelvin <linux@sciencehorizons.net>
Reported-by: Guenter Roeck <linux@roeck-us.net>
Fixes: fcfd2fbf22d2 ("fs/namei.c: Add hashlen_string() function")
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
8 years agohpfs: implement the show_options method
Mikulas Patocka [Tue, 24 May 2016 20:49:18 +0000 (22:49 +0200)]
hpfs: implement the show_options method

The HPFS filesystem used generic_show_options to produce string that is
displayed in /proc/mounts.  However, there is a problem that the options
may disappear after remount.  If we mount the filesystem with option1
and then remount it with option2, /proc/mounts should show both option1
and option2, however it only shows option2 because the whole option
string is replaced with replace_mount_options in hpfs_remount_fs.

To fix this bug, implement the hpfs_show_options function that prints
options that are currently selected.

Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
8 years agoaffs: fix remount failure when there are no options changed
Mikulas Patocka [Tue, 24 May 2016 20:48:33 +0000 (22:48 +0200)]
affs: fix remount failure when there are no options changed

Commit c8f33d0bec99 ("affs: kstrdup() memory handling") checks if the
kstrdup function returns NULL due to out-of-memory condition.

However, if we are remounting a filesystem with no change to
filesystem-specific options, the parameter data is NULL.  In this case,
kstrdup returns NULL (because it was passed NULL parameter), although no
out of memory condition exists.  The mount syscall then fails with
ENOMEM.

This patch fixes the bug.  We fail with ENOMEM only if data is non-NULL.

The patch also changes the call to replace_mount_options - if we didn't
pass any filesystem-specific options, we don't call
replace_mount_options (thus we don't erase existing reported options).

Fixes: c8f33d0bec99 ("affs: kstrdup() memory handling")
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@vger.kernel.org # v4.1+
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
8 years agohpfs: fix remount failure when there are no options changed
Mikulas Patocka [Tue, 24 May 2016 20:47:00 +0000 (22:47 +0200)]
hpfs: fix remount failure when there are no options changed

Commit ce657611baf9 ("hpfs: kstrdup() out of memory handling") checks if
the kstrdup function returns NULL due to out-of-memory condition.

However, if we are remounting a filesystem with no change to
filesystem-specific options, the parameter data is NULL.  In this case,
kstrdup returns NULL (because it was passed NULL parameter), although no
out of memory condition exists.  The mount syscall then fails with
ENOMEM.

This patch fixes the bug.  We fail with ENOMEM only if data is non-NULL.

The patch also changes the call to replace_mount_options - if we didn't
pass any filesystem-specific options, we don't call
replace_mount_options (thus we don't erase existing reported options).

Fixes: ce657611baf9 ("hpfs: kstrdup() out of memory handling")
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
8 years agoMerge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Linus Torvalds [Sat, 28 May 2016 23:41:39 +0000 (16:41 -0700)]
Merge branch 'upstream' of git://git.linux-mips.org/ralf/upstream-linus

Pull more MIPS updates from Ralf Baechle:
 "This is the secondnd batch of MIPS patches for 4.7. Summary:

  CPS:
   - Copy EVA configuration when starting secondary VPs.

  EIC:
   - Clear Status IPL.

  Lasat:
   - Fix a few off by one bugs.

  lib:
   - Mark intrinsics notrace.  Not only are the intrinsics
     uninteresting, it would cause infinite recursion.

  MAINTAINERS:
   - Add file patterns for MIPS BRCM device tree bindings.
   - Add file patterns for mips device tree bindings.

  MT7628:
   - Fix MT7628 pinmux typos.
   - wled_an pinmux gpio.
   - EPHY LEDs pinmux support.

  Pistachio:
   - Enable KASLR

  VDSO:
   - Build microMIPS VDSO for microMIPS kernels.
   - Fix aliasing warning by building with `-fno-strict-aliasing' for
     debugging but also tracing them might result in recursion.

  Misc:
   - Add missing FROZEN hotplug notifier transitions.
   - Fix clk binding example for varioius PIC32 devices.
   - Fix cpu interrupt controller node-names in the DT files.
   - Fix XPA CPU feature separation.
   - Fix write_gc0_* macros when writing zero.
   - Add inline asm encoding helpers.
   - Add missing VZ accessor microMIPS encodings.
   - Fix little endian microMIPS MSA encodings.
   - Add 64-bit HTW fields and fix its configuration.
   - Fix sigreturn via VDSO on microMIPS kernel.
   - Lots of typo fixes.
   - Add definitions of SegCtl registers and use them"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (49 commits)
  MIPS: Add missing FROZEN hotplug notifier transitions
  MIPS: Build microMIPS VDSO for microMIPS kernels
  MIPS: Fix sigreturn via VDSO on microMIPS kernel
  MIPS: devicetree: fix cpu interrupt controller node-names
  MIPS: VDSO: Build with `-fno-strict-aliasing'
  MIPS: Pistachio: Enable KASLR
  MIPS: lib: Mark intrinsics notrace
  MIPS: Fix 64-bit HTW configuration
  MIPS: Add 64-bit HTW fields
  MAINTAINERS: Add file patterns for mips device tree bindings
  MAINTAINERS: Add file patterns for mips brcm device tree bindings
  MIPS: Simplify DSP instruction encoding macros
  MIPS: Add missing tlbinvf/XPA microMIPS encodings
  MIPS: Fix little endian microMIPS MSA encodings
  MIPS: Add missing VZ accessor microMIPS encodings
  MIPS: Add inline asm encoding helpers
  MIPS: Spelling fix lets -> let's
  MIPS: VR41xx: Fix typo
  MIPS: oprofile: Fix typo
  MIPS: math-emu: Fix typo
  ...

8 years agofs: fix binfmt_aout.c build error
Guenter Roeck [Sat, 28 May 2016 22:26:02 +0000 (15:26 -0700)]
fs: fix binfmt_aout.c build error

Various builds (such as i386:allmodconfig) fail with

  fs/binfmt_aout.c:133:2: error: expected identifier or '(' before 'return'
  fs/binfmt_aout.c:134:1: error: expected identifier or '(' before '}' token

[ Oops. My bad, I had stupidly thought that "allmodconfig" covered this
  on x86-64 too, but it obviously doesn't.  Egg on my face.  - Linus ]

Fixes: 5d22fc25d4fc ("mm: remove more IS_ERR_VALUE abuses")
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
8 years agoMerge branch 'hash' of git://ftp.sciencehorizons.net/linux
Linus Torvalds [Sat, 28 May 2016 23:15:25 +0000 (16:15 -0700)]
Merge branch 'hash' of git://ftp.sciencehorizons.net/linux

Pull string hash improvements from George Spelvin:
 "This series does several related things:

   - Makes the dcache hash (fs/namei.c) useful for general kernel use.

     (Thanks to Bruce for noticing the zero-length corner case)

   - Converts the string hashes in <linux/sunrpc/svcauth.h> to use the
     above.

   - Avoids 64-bit multiplies in hash_64() on 32-bit platforms.  Two
     32-bit multiplies will do well enough.

   - Rids the world of the bad hash multipliers in hash_32.

     This finishes the job started in commit 689de1d6ca95 ("Minimal
     fix-up of bad hashing behavior of hash_64()")

     The vast majority of Linux architectures have hardware support for
     32x32-bit multiply and so derive no benefit from "simplified"
     multipliers.

     The few processors that do not (68000, h8/300 and some models of
     Microblaze) have arch-specific implementations added.  Those
     patches are last in the series.

   - Overhauls the dcache hash mixing.

     The patch in commit 0fed3ac866ea ("namei: Improve hash mixing if
     CONFIG_DCACHE_WORD_ACCESS") was an off-the-cuff suggestion.
     Replaced with a much more careful design that's simultaneously
     faster and better.  (My own invention, as there was noting suitable
     in the literature I could find.  Comments welcome!)

   - Modify the hash_name() loop to skip the initial HASH_MIX().  This
     would let us salt the hash if we ever wanted to.

   - Sort out partial_name_hash().

     The hash function is declared as using a long state, even though
     it's truncated to 32 bits at the end and the extra internal state
     contributes nothing to the result.  And some callers do odd things:

      - fs/hfs/string.c only allocates 32 bits of state
      - fs/hfsplus/unicode.c uses it to hash 16-bit unicode symbols not bytes

   - Modify bytemask_from_count to handle inputs of 1..sizeof(long)
     rather than 0..sizeof(long)-1.  This would simplify users other
     than full_name_hash"

  Special thanks to Bruce Fields for testing and finding bugs in v1.  (I
  learned some humbling lessons about "obviously correct" code.)

  On the arch-specific front, the m68k assembly has been tested in a
  standalone test harness, I've been in contact with the Microblaze
  maintainers who mostly don't care, as the hardware multiplier is never
  omitted in real-world applications, and I haven't heard anything from
  the H8/300 world"

* 'hash' of git://ftp.sciencehorizons.net/linux:
  h8300: Add <asm/hash.h>
  microblaze: Add <asm/hash.h>
  m68k: Add <asm/hash.h>
  <linux/hash.h>: Add support for architecture-specific functions
  fs/namei.c: Improve dcache hash function
  Eliminate bad hash multipliers from hash_32() and  hash_64()
  Change hash_64() return value to 32 bits
  <linux/sunrpc/svcauth.h>: Define hash_str() in terms of hashlen_string()
  fs/namei.c: Add hashlen_string() function
  Pull out string hash to <linux/stringhash.h>

8 years agoh8300: Add <asm/hash.h>
George Spelvin [Wed, 25 May 2016 18:19:49 +0000 (14:19 -0400)]
h8300: Add <asm/hash.h>

This will improve the performance of hash_32() and hash_64(), but due
to complete lack of multi-bit shift instructions on H8, performance will
still be bad in surrounding code.

Designing H8-specific hash algorithms to work around that is a separate
project.  (But if the maintainers would like to get in touch...)

Signed-off-by: George Spelvin <linux@sciencehorizons.net>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: uclinux-h8-devel@lists.sourceforge.jp
8 years agomicroblaze: Add <asm/hash.h>
George Spelvin [Wed, 25 May 2016 15:06:09 +0000 (11:06 -0400)]
microblaze: Add <asm/hash.h>

Microblaze is an FPGA soft core that can be configured various ways.

If it is configured without a multiplier, the standard __hash_32()
will require a call to __mulsi3, which is a slow software loop.

Instead, use a shift-and-add sequence for the constant multiply.
GCC knows how to do this, but it's not as clever as some.

Signed-off-by: George Spelvin <linux@sciencehorizons.net>
Cc: Alistair Francis <alistair.francis@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
8 years agom68k: Add <asm/hash.h>
George Spelvin [Thu, 26 May 2016 15:36:19 +0000 (11:36 -0400)]
m68k: Add <asm/hash.h>

This provides a multiply by constant GOLDEN_RATIO_32 = 0x61C88647
for the original mc68000, which lacks a 32x32-bit multiply instruction.

Yes, the amount of optimization effort put in is excessive. :-)

Shift-add chain found by Yevgen Voronenko's Hcub algorithm at
http://spiral.ece.cmu.edu/mcm/gen.html

Signed-off-by: George Spelvin <linux@sciencehorizons.net>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Greg Ungerer <gerg@linux-m68k.org>
Cc: Andreas Schwab <schwab@linux-m68k.org>
Cc: Philippe De Muyter <phdm@macq.eu>
Cc: linux-m68k@lists.linux-m68k.org
8 years ago<linux/hash.h>: Add support for architecture-specific functions
George Spelvin [Fri, 27 May 2016 02:11:51 +0000 (22:11 -0400)]
<linux/hash.h>: Add support for architecture-specific functions

This is just the infrastructure; there are no users yet.

This is modelled on CONFIG_ARCH_RANDOM; a CONFIG_ symbol declares
the existence of <asm/hash.h>.

That file may define its own versions of various functions, and define
HAVE_* symbols (no CONFIG_ prefix!) to suppress the generic ones.

Included is a self-test (in lib/test_hash.c) that verifies the basics.
It is NOT in general required that the arch-specific functions compute
the same thing as the generic, but if a HAVE_* symbol is defined with
the value 1, then equality is tested.

Signed-off-by: George Spelvin <linux@sciencehorizons.net>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Greg Ungerer <gerg@linux-m68k.org>
Cc: Andreas Schwab <schwab@linux-m68k.org>
Cc: Philippe De Muyter <phdm@macq.eu>
Cc: linux-m68k@lists.linux-m68k.org
Cc: Alistair Francis <alistai@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: uclinux-h8-devel@lists.sourceforge.jp
8 years agofs/namei.c: Improve dcache hash function
George Spelvin [Mon, 23 May 2016 11:43:58 +0000 (07:43 -0400)]
fs/namei.c: Improve dcache hash function

Patch 0fed3ac866 improved the hash mixing, but the function is slower
than necessary; there's a 7-instruction dependency chain (10 on x86)
each loop iteration.

Word-at-a-time access is a very tight loop (which is good, because
link_path_walk() is one of the hottest code paths in the entire kernel),
and the hash mixing function must not have a longer latency to avoid
slowing it down.

There do not appear to be any published fast hash functions that:
1) Operate on the input a word at a time, and
2) Don't need to know the length of the input beforehand, and
3) Have a single iterated mixing function, not needing conditional
   branches or unrolling to distinguish different loop iterations.

One of the algorithms which comes closest is Yann Collet's xxHash, but
that's two dependent multiplies per word, which is too much.

The key insights in this design are:

1) Barring expensive ops like multiplies, to diffuse one input bit
   across 64 bits of hash state takes at least log2(64) = 6 sequentially
   dependent instructions.  That is more cycles than we'd like.
2) An operation like "hash ^= hash << 13" requires a second temporary
   register anyway, and on a 2-operand machine like x86, it's three
   instructions.
3) A better use of a second register is to hold a two-word hash state.
   With careful design, no temporaries are needed at all, so it doesn't
   increase register pressure.  And this gets rid of register copying
   on 2-operand machines, so the code is smaller and faster.
4) Using two words of state weakens the requirement for one-round mixing;
   we now have two rounds of mixing before cancellation is possible.
5) A two-word hash state also allows operations on both halves to be
   done in parallel, so on a superscalar processor we get more mixing
   in fewer cycles.

I ended up using a mixing function inspired by the ChaCha and Speck
round functions.  It is 6 simple instructions and 3 cycles per iteration
(assuming multiply by 9 can be done by an "lea" instruction):

x ^= *input++;
y ^= x; x = ROL(x, K1);
x += y; y = ROL(y, K2);
y *= 9;

Not only is this reversible, two consecutive rounds are reversible:
if you are given the initial and final states, but not the intermediate
state, it is possible to compute both input words.  This means that at
least 3 words of input are required to create a collision.

(It also has the property, used by hash_name() to avoid a branch, that
it hashes all-zero to all-zero.)

The rotate constants K1 and K2 were found by experiment.  The search took
a sample of random initial states (I used 1023) and considered the effect
of flipping each of the 64 input bits on each of the 128 output bits two
rounds later.  Each of the 8192 pairs can be considered a biased coin, and
adding up the Shannon entropy of all of them produces a score.

The best-scoring shifts also did well in other tests (flipping bits in y,
trying 3 or 4 rounds of mixing, flipping all 64*63/2 pairs of input bits),
so the choice was made with the additional constraint that the sum of the
shifts is odd and not too close to the word size.

The final state is then folded into a 32-bit hash value by a less carefully
optimized multiply-based scheme.  This also has to be fast, as pathname
components tend to be short (the most common case is one iteration!), but
there's some room for latency, as there is a fair bit of intervening logic
before the hash value is used for anything.

(Performance verified with "bonnie++ -s 0 -n 1536:-2" on tmpfs.  I need
a better benchmark; the numbers seem to show a slight dip in performance
between 4.6.0 and this patch, but they're too noisy to quote.)

Special thanks to Bruce fields for diligent testing which uncovered a
nasty fencepost error in an earlier version of this patch.

[checkpatch.pl formatting complaints noted and respectfully disagreed with.]

Signed-off-by: George Spelvin <linux@sciencehorizons.net>
Tested-by: J. Bruce Fields <bfields@redhat.com>
8 years agoEliminate bad hash multipliers from hash_32() and hash_64()
George Spelvin [Fri, 27 May 2016 03:00:23 +0000 (23:00 -0400)]
Eliminate bad hash multipliers from hash_32() and  hash_64()

The "simplified" prime multipliers made very bad hash functions, so get rid
of them.  This completes the work of 689de1d6ca.

To avoid the inefficiency which was the motivation for the "simplified"
multipliers, hash_64() on 32-bit systems is changed to use a different
algorithm.  It makes two calls to hash_32() instead.

drivers/media/usb/dvb-usb-v2/af9015.c uses the old GOLDEN_RATIO_PRIME_32
for some horrible reason, so it inherits a copy of the old definition.

Signed-off-by: George Spelvin <linux@sciencehorizons.net>
Cc: Antti Palosaari <crope@iki.fi>
Cc: Mauro Carvalho Chehab <m.chehab@samsung.com>
8 years agoChange hash_64() return value to 32 bits
George Spelvin [Fri, 27 May 2016 02:22:01 +0000 (22:22 -0400)]
Change hash_64() return value to 32 bits

That's all that's ever asked for, and it makes the return
type of hash_long() consistent.

It also allows (upcoming patch) an optimized implementation
of hash_64 on 32-bit machines.

I tried adding a BUILD_BUG_ON to ensure the number of bits requested
was never more than 32 (most callers use a compile-time constant), but
adding <linux/bug.h> to <linux/hash.h> breaks the tools/perf compiler
unless tools/perf/MANIFEST is updated, and understanding that code base
well enough to update it is too much trouble.  I did the rest of an
allyesconfig build with such a check, and nothing tripped.

Signed-off-by: George Spelvin <linux@sciencehorizons.net>
8 years ago<linux/sunrpc/svcauth.h>: Define hash_str() in terms of hashlen_string()
George Spelvin [Fri, 20 May 2016 17:31:33 +0000 (13:31 -0400)]
<linux/sunrpc/svcauth.h>: Define hash_str() in terms of hashlen_string()

Finally, the first use of previous two patches: eliminate the
separate ad-hoc string hash functions in the sunrpc code.

Now hash_str() is a wrapper around hash_string(), and hash_mem() is
likewise a wrapper around full_name_hash().

Note that sunrpc code *does* call hash_mem() with a zero length, which
is why the previous patch needed to handle that in full_name_hash().
(Thanks, Bruce, for finding that!)

This also eliminates the only caller of hash_long which asks for
more than 32 bits of output.

The comment about the quality of hashlen_string() and full_name_hash()
is jumping the gun by a few patches; they aren't very impressive now,
but will be improved greatly later in the series.

Signed-off-by: George Spelvin <linux@sciencehorizons.net>
Tested-by: J. Bruce Fields <bfields@redhat.com>
Acked-by: J. Bruce Fields <bfields@redhat.com>
Cc: Jeff Layton <jlayton@poochiereds.net>
Cc: linux-nfs@vger.kernel.org