binqi.zhang [Tue, 31 Jul 2018 09:02:59 +0000 (17:02 +0800)]
gpu: use buffer's usage as the filter instead of width&height
PD# NONE
prevent potential risk
Change-Id: Ib1a8cdf58bdefdc06baa6ba977ce038d3dfb428e
Jiyu Yang [Wed, 29 Aug 2018 05:34:21 +0000 (13:34 +0800)]
gpu:disable platform power down macro
PD#173105: gpu:disable platform power down macro
Change-Id: I545cad6b5fe064a10b6a566f1acf071806498073
tao zeng [Thu, 30 Aug 2018 06:08:18 +0000 (14:08 +0800)]
kasan: fix bug report in mali driver
PD#172700
When kasan enabled, following bug will report:
==================================================================
BUG: KASAN: use-after-free in mali_allocation_unref+0x1b8/0x350 [mali]
Read of size 8 at addr
ffffffc04c0b6378 by task BootAnimation/3034
CPU: 3 PID: 3034 Comm: BootAnimation Tainted: G B O 4.9.113 #5
Hardware name: Amlogic (DT)
Call trace:
[<
ffffff900908ecc0>] dump_backtrace+0x0/0x368
[<
ffffff900908f0cc>] show_stack+0x24/0x30
[<
ffffff900963bdb0>] dump_stack+0xa0/0xc8
[<
ffffff90092ba140>] print_address_description+0x68/0x258
[<
ffffff90092ba694>] kasan_report+0x264/0x338
[<
ffffff90092b8cd4>] __asan_load8+0x84/0x98
[<
ffffff900260bce8>] mali_allocation_unref+0x1b8/0x350 [mali]
[<
ffffff900260ab74>] _mali_ukk_mem_free+0xcc/0x190 [mali]
[<
ffffff900260e4a0>] mem_free_wrapper+0x110/0x1c0 [mali]
[<
ffffff90026129c0>] mali_ioctl+0x210/0x4b8 [mali]
[<
ffffff900935c8d8>] compat_SyS_ioctl+0xe0/0x1218
[<
ffffff9009083f00>] el0_svc_naked+0x34/0x38
Allocated by task 3034:
save_stack_trace_tsk+0x0/0x268
save_stack_trace+0x24/0x30
kasan_kmalloc+0xd8/0x188
kasan_slab_alloc+0x14/0x20
kmem_cache_alloc+0x118/0x258
mmap_region+0x390/0x7a8
do_mmap+0x308/0x470
vm_mmap_pgoff+0x140/0x168
SyS_mmap_pgoff+0x98/0x118
el0_svc_naked+0x34/0x38
Freed by task 3034:
save_stack_trace_tsk+0x0/0x268
save_stack_trace+0x24/0x30
kasan_slab_free+0x88/0x188
kmem_cache_free+0x68/0x268
remove_vma+0x94/0xa8
do_munmap+0x340/0x500
SyS_munmap+0x58/0x80
el0_svc_naked+0x34/0x38
The buggy address belongs to the object at
ffffffc04c0b62d0
which belongs to the cache vm_area_struct of size 176
The buggy address is located 168 bytes inside of
176-byte region [
ffffffc04c0b62d0,
ffffffc04c0b6380)
The buggy address belongs to the page:
page:
ffffffbf01302d80 count:1 mapcount:0 mapping: (null) index:0x0
flags: 0x851af00000080(slab)
page dumped because: kasan: bad access detected
Memory state around the buggy address:
ffffffc04c0b6200: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ffffffc04c0b6280: 00 00 fc fc fc fc fc fc fc fc fb fb fb fb fb fb
>
ffffffc04c0b6300: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
^
ffffffc04c0b6380: fc fc fc fc fc fc fc fc fb fb fb fb fb fb fb fb
ffffffc04c0b6400: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fc fc
==================================================================
Once UI have any update, this report will print. It is because
cpu_mapping.vma not cleared in mali_mem_vma_close hook and used
in mali_allocation_unref function.
Change-Id: Ic6319b6e6c6255324736d82cf0d386b6f61a39b8
Signed-off-by: tao zeng <tao.zeng@amlogic.com>
Ao Xu [Tue, 28 Aug 2018 08:09:39 +0000 (16:09 +0800)]
gpu: fix mk build when rm tdk [1/2]
PD#171503: gpu: fix mk build when rm tdk
Change-Id: If70ae3a8af8bba7f6fd7e1259e17a5c95cba5943
Signed-off-by: Ao Xu <ao.xu@amlogic.com>
Jiyu Yang [Mon, 30 Jul 2018 12:01:10 +0000 (20:01 +0800)]
use sync_file instead of the mali_internal_sync_fence [2/3]
PD#170298: use sync_file instead of the mali_internal_sync_fence
this is only a minimal change.
Change-Id: I848fc202dbcebbb46ce6908b41b02cf2b0404e97
Jiyu Yang [Tue, 17 Jul 2018 10:48:02 +0000 (18:48 +0800)]
enable --strip-debug to reduce module size
Change-Id: I494faba45e38226b94d46187f1b9be52c0d8e2db
binqi.zhang [Tue, 24 Jul 2018 13:40:04 +0000 (21:40 +0800)]
gpu: fix img's crop_bottom&crop_right value when playing 4k2k video
PD# 162923
Change-Id: I02f2151561b74e6f6680e29830e4c392861e3cfd
Jiyu Yang [Fri, 6 Jul 2018 10:49:42 +0000 (18:49 +0800)]
gpu: add libOpenCL symbol link under Android
PD#168676: add libOpenCL symbol link under Android
Change-Id: Ibbad735a3786d7b8dab7c1d5261c73fc185dd354
binqi.zhang [Wed, 20 Jun 2018 11:36:16 +0000 (19:36 +0800)]
gpu: update some mali patches
PD# 164260
1. when texture is created with a null pointer, utgatd DDK doesn’t clear the new buffer
2.fix mali null point issue
Change-Id: I66f60ff227de8b9ae66bea7ddc685e3ca76a618f
Jiyu Yang [Wed, 20 Jun 2018 03:54:43 +0000 (11:54 +0800)]
add r12p0 driver to support g12b [1/3]
PD#168674: add r12p0 driver
Change-Id: I9c83ec80c7f2e9da6f8ff7bf22211ba850bf4442
sky zhou [Mon, 28 May 2018 07:01:37 +0000 (15:01 +0800)]
mem: remove NORETRY flag, and fix possible deadlock.
PD#168336
For low ram device, gpu may failed to alloc memory
with NORETRY flag.
Without NORETRY flag, allocation may be meet deadlock
when OOM killer triggered.
Change-Id: Ia93c16d387d524e4f9f078df1156da96800cc49a
Jiyu Yang [Mon, 23 Apr 2018 12:28:47 +0000 (20:28 +0800)]
add check node for slt[1/3]
PD#NONE
Change-Id: Iabe5491ca2f6be5130566bda703dc16920acce13
Jiyu Yang [Thu, 12 Apr 2018 12:00:37 +0000 (20:00 +0800)]
Fixed mem leak of fence on 4.9.68 and newer
PD#163966
Relevant kernel commits:
30cd85dd6edc86ea8d8589efb813f1fad41ef233 for v4.10 (master)
3a83421d482e7d7c6f4251dcd825548e5262c054 for v4.9.68
Change-Id: I30870fbeeaebd6e84e4a2929ac22a7d065beb20b
Huan Biao [Fri, 23 Mar 2018 09:00:00 +0000 (17:00 +0800)]
cooldev: fix gpu cooldev.
PD#160967: cooldev: add g12a gpu cooling devices.
Change-Id: I9f3b4c4e3af74f9dab75e47517e4e011dc0a5778
Signed-off-by: Huan Biao <huan.biao@amlogic.com>
Huan Biao [Fri, 23 Mar 2018 11:24:13 +0000 (19:24 +0800)]
PD#161216: cooldev: fix k49 and k314 config change.
Change-Id: I58fddf3ea8c12b8e4589b2bd95eef2d26d9ca348
Signed-off-by: Huan Biao <huan.biao@amlogic.com>
Jiyu Yang [Thu, 8 Mar 2018 06:41:48 +0000 (14:41 +0800)]
update different prebuilt so for different gralloc[1/1]
PD#161903
Change-Id: Ia68ecd73c9f270b4904540bef9096fea9af51374
Simon Zheng [Mon, 19 Mar 2018 14:54:08 +0000 (07:54 -0700)]
Merge "gpu: update so since gralloc usage has been changed [2/4]" into r6p1
binqi.zhang [Fri, 16 Mar 2018 15:28:51 +0000 (23:28 +0800)]
gpu: update so since gralloc usage has been changed [2/4]
PD#162471
Change-Id: Iaa31a1eef903a3bdb91f8252c6c8be52ea1b96ed
Jiyu Yang [Tue, 13 Mar 2018 03:33:03 +0000 (11:33 +0800)]
gpu: mali internal fence wait signaled when return -ENOENT
PD#160990
Note that the callback can be called from an atomic context. If
fence is already signaled, this function will return -ENOENT (and
*not* call the callback)
Change-Id: I347e082b7b7639f8122f65734467977494a53445
Jiyu Yang [Thu, 8 Mar 2018 08:25:56 +0000 (16:25 +0800)]
set gp0 clock to the proper rate when init
Change-Id: I5976fdacf485822212fd85ab7f2b04635ff9e4ad
Jiyu Yang [Mon, 22 Jan 2018 06:18:03 +0000 (14:18 +0800)]
gpu: fixed hiu bus addr on 4.9 kernel[1/2]
PD#159303: this may cause the suspend to ram crash at mali modules
Change-Id: Ic328f8abca4a39bdb1321f379fbfc63626f6e875
Jiyu Yang [Thu, 11 Jan 2018 04:53:06 +0000 (12:53 +0800)]
gpu: fixed the fence struct since 4.9.68
PD#151803
Change-Id: I265692a3c6fa4ad3ea4dda8b79c6dcd28f8a4ac5
Jiyu Yang [Tue, 6 Mar 2018 07:52:44 +0000 (15:52 +0800)]
dvalin: change the default boost index
PD#161518
Change-Id: Ia2136bc006e28e1c9426dbd277440ab44479c43a
Jiyu Yang [Tue, 27 Feb 2018 09:06:43 +0000 (17:06 +0800)]
gpu: dvalin bringup based on amlogic-pd-156734 [2/5]
PD#156734
Change-Id: Id9da6f8728af76738955f456c5b312a5d305567a
Jiyu Yang [Tue, 5 Dec 2017 08:25:04 +0000 (16:25 +0800)]
gralloc1: update for gralloc1 [1/5]
PD#154776
Change-Id: Iec0fd7b51dfbaa42db7ddda96641a12ceff47439
binqi.zhang [Thu, 25 Jan 2018 11:58:11 +0000 (19:58 +0800)]
gpu: fix GL 0x505 issue for utgard r8p0
PD#157391
Change-Id: I3a9138667fe0f55083915c561115a665919eb620
Jiyu Yang [Thu, 4 Jan 2018 06:32:28 +0000 (14:32 +0800)]
PD#133451 add l2_max_reads for custom
/sys/class/mpgpu/l2_max_reads
AX_READ Register bit assignments
Bits Name Function
[31:5] - Reserved, read as zero
[4:0] Max_Reads Limit the number of outstanding read transactions to this amount
Change-Id: Idae8fa0a8e85f90749a62f6972b5bbe176008cd2
Jiyu Yang [Wed, 20 Dec 2017 08:31:48 +0000 (16:31 +0800)]
mv to vendor/amlogic [2/5]
PD#157243
Change-Id: I11d11f89ad58d0e65a10686f7895e4f91393deb4
Jiyu Yang [Fri, 5 Jan 2018 02:44:01 +0000 (10:44 +0800)]
gpu: fixed the fence struct since 4.9.68
PD#151803
Change-Id: I5617acd8880666cf4ad24812ab248b904de58e52
binqi.zhang [Fri, 1 Dec 2017 12:46:06 +0000 (20:46 +0800)]
gpu: update midgard r21p0 kernel driver
PD#156681
TX041-BU-00000-r21p0-01rel0
Change-Id: I141ffc605a294b0234b4e533b1a80f43e2aa2d94
binqi.zhang [Fri, 8 Dec 2017 06:35:55 +0000 (14:35 +0800)]
Revert "sync: fix dEQP-EGL*get_frame_timestamps* "
This reverts commit
2b2fcd586ad75743cca351105a8e98c8ad094deb.
Change-Id: I9228249130e3fd4185d0509c3339f9c9503b3cd6
Jiyu Yang [Tue, 5 Dec 2017 12:58:47 +0000 (20:58 +0800)]
gpu: update t83x prebuilt so
Change-Id: I9c3a323e131b8fcffc3387f4b498430613aa4da7
binqi.zhang [Thu, 30 Nov 2017 12:13:52 +0000 (20:13 +0800)]
sync: fix dEQP-EGL*get_frame_timestamps* [3/3]
PD#153134
kept/used no matter the fence is signaled or not
Change-Id: I6302426681728c3ad9ca87700e257f2df33d764e
Simon Zheng [Wed, 29 Nov 2017 14:59:20 +0000 (06:59 -0800)]
Merge "sync: fix ui issue [1/1]" into r6p1
binqi.zhang [Fri, 17 Nov 2017 07:54:18 +0000 (15:54 +0800)]
sync: fix ui issue [1/1]
PD#154866
revert fix_null_draw_call patch
Change-Id: I0603a3b0807ee37b9c14bcc4f573bd46f5ce49f5
sky zhou [Fri, 10 Nov 2017 07:58:22 +0000 (15:58 +0800)]
gpu: use _mali_osk_time_mstoticks instead of using raw jiffies [1/1]
PD #150542: use mali internal api to convert ms to jiffies.
Change-Id: Ic59c319cea9413160eacf937792957653519e0a5
binqi.zhang [Fri, 17 Nov 2017 03:26:59 +0000 (11:26 +0800)]
gpu: update EGL_KHR_wait_sync
PD#153134
Change-Id: I0c1cd43f5984b2f4b85cf7a5a0b146c2150cb1af
binqi.zhang [Thu, 9 Nov 2017 07:32:22 +0000 (15:32 +0800)]
gpu: fix mali null drawcall
PD#153134
deqp cases -- get_frame_timestampsRendering* report error "complete times not monotonic"
Change-Id: If0fbbb6f5183de9df6055c696ea7f4fc197a0155
sky zhou [Mon, 13 Nov 2017 07:59:28 +0000 (15:59 +0800)]
gpu: remove sync_pt_list non-empty warn when release mali fence.
PD#154231: remove sync_pt_list non-empty warning.
When fence is not signaled, the sync_pt_list is not empty.
So the sync_pt_list non-empty is legal, don't need to warn it.
Change-Id: I6b50292fe0939e8d7397983b566481aa6f1ceeac
binqi.zhang [Fri, 3 Nov 2017 05:53:14 +0000 (13:53 +0800)]
gpu: mali will report GL OOM to hwui when alloc_page fail [1/1]
PD# 152678
add GFP_KERNEL flag to alloc_page if alloc_page fail and try alloc again
Change-Id: I9bc87ed2e00c9525231eb2aaa3b3971cf0ac8ed8
Jiyu Yang [Wed, 1 Nov 2017 08:20:26 +0000 (16:20 +0800)]
gpu: check def_clk when probe
PD#152825:
Change-Id: I9fb943fb13a0c3644d9247ce63eb394a0bcd1dbf
Signed-off-by: Jiyu Yang <jiyu.yang@amlogic.com>
Simon Zheng [Tue, 31 Oct 2017 11:55:31 +0000 (04:55 -0700)]
Merge "gpu: seperately set gp0_pll before changed to 744M" into r6p1
Jiyu Yang [Thu, 26 Oct 2017 07:24:45 +0000 (15:24 +0800)]
gpu: update EGL_KHR_wait_sync
PD#153119
add EGL_KHR_wait_sync and remove EGL_KHR_reusable_sync
EGL_KHR_wait_sync which Server-side waits and reusable syncs are
mutually exclusive in the Mali Linux DDK, you
can only enable one at a time.
Change-Id: Id16f5403090337b5966a8c4ef0def733af8d4e07
Jiyu Yang [Sat, 28 Oct 2017 09:44:03 +0000 (17:44 +0800)]
gpu: seperately set gp0_pll before changed to 744M
PD#151164: seperately set gp0_pll before changed to 744M
Change-Id: I1550f2e5a3d2b0eea84770eacb36e81fe3a99248
Signed-off-by: Jiyu Yang <Jiyu.Yang@amlogic.com>
Jiyu Yang [Thu, 21 Sep 2017 10:06:33 +0000 (18:06 +0800)]
gpu: add null check for mali session memtrack [1/1]
use default value if null
Change-Id: Ia725afb83c9fa33a3a8c3e9e487273aeeb245f7c
Jiyu Yang [Wed, 27 Sep 2017 11:42:17 +0000 (19:42 +0800)]
gpu: fixed sync leak in AOSP common kernel or LTS kernel 4.10
PD#151104
Change-Id: I1d1b1481b4579be486525c44378205326c372dd4
Jiyu Yang [Wed, 20 Sep 2017 03:56:17 +0000 (11:56 +0800)]
gpu: r8p0-01rel0 release
PD#151266
also add treble support
Change-Id: Ia1a1ba8bf5083d195e9095f7d62bbbbf271b8bb7
Simon Zheng [Thu, 21 Sep 2017 05:17:00 +0000 (22:17 -0700)]
Merge "gpu: limit the dump function due to kernel version [1/1]" into r6p1
binqi.zhang [Tue, 22 Aug 2017 09:19:09 +0000 (17:19 +0800)]
gpu: limit the dump function due to kernel version [1/1]
PD# NONE
limit debug function
Change-Id: I3e294967436e024752b517454416b66ce9009f69
binqi.zhang [Thu, 14 Sep 2017 06:02:58 +0000 (14:02 +0800)]
gpu:optimize the GPU performance [1/1]
PD# 150352
mv hw_get_module function out of eglCreateImageKHR
Change-Id: I53639a66ac74f359d8717f14edba0080f85aad14
Jiyu Yang [Thu, 7 Sep 2017 03:15:42 +0000 (11:15 +0800)]
gpu:replace the magic number with msecs_to_jiffies [1/1]
PD#150542:replace the magic number with msecs_to_jiffies.
Change-Id: I6c5859ddcd487cf458acd3219d7469d13f6dd78e
Jiyu Yang [Tue, 5 Sep 2017 11:22:05 +0000 (19:22 +0800)]
sync: add sync_file patch [2/3]
PD#149525
Change-Id: Iaec0450be6ef4094665b9d3d2477be417a5cf374
Jiyu Yang [Mon, 4 Sep 2017 08:58:57 +0000 (16:58 +0800)]
gpu: mv gpu lib and mod to vendor [1/2]
PD#NONE
default path is system/lib if GPU_MOD_OUT not set
Change-Id: Ic300f7c8eee06251aec6b88781c144c1e894f49b
Jiyu Yang [Thu, 31 Aug 2017 13:57:24 +0000 (21:57 +0800)]
gpu: update r8p0 patch [6/7]
PD#149525
Change-Id: Ia207984ef4b84dbf6dd3f251f824b04ed7dc8414
Jiyu Yang [Thu, 17 Aug 2017 09:11:00 +0000 (17:11 +0800)]
gpu: dump meminfo when mali can't alloc memory [1/1]
PD# NONE
add debug info
Change-Id: I342dcd3e0600afdf7c77c118430252b0a49ef6b0
Jiyu Yang [Fri, 11 Aug 2017 02:17:56 +0000 (10:17 +0800)]
gpu: mali r8p0-00dev0 release [2/2]
PD#148957
Change-Id: Idce52b46293f2947c342f846f015c0a78b97e69f
Jiyu Yang [Fri, 11 Aug 2017 14:55:58 +0000 (22:55 +0800)]
NEEDLEPLAT-3051: map the scaled videobuffer instead of allocated. [1/1]
PD#148923
[Problem]
AIV started with jittery playbak and then video froze (with audio running)
this problem was introduced in NEEDLEPLAT-1097.
[Solution]
map the scaled video buffer instead of the previous skip map which caused
the mali_mem growing larger and lead to the create EGLImage fail
[Platform]
needle, stark
Change-Id: I8ddbe51698bbec51e5a53afb43c5a9383df6a9db
stark li [Tue, 1 Aug 2017 18:19:21 +0000 (11:19 -0700)]
NEEDLEPLAT-2845: Coordinate SF and app rendering, Prevent SF grab gpu source. [1/1]
PD#148617
[Problem]
IAP purchase dialog gets stuck and unable to make IAP purchases.
[Solution]
Coordinate SF and app rendering, Prevent SF grab gpu source.
[Platform]
needle, stark
Change-Id: I742e9ce825617fe7c1a149f79d66d24c9194b32c
Jiyu Yang [Tue, 20 Jun 2017 05:49:13 +0000 (13:49 +0800)]
gpu: fixed o-pdk compile error on r6p1
PD#147955
Change-Id: I0088c737927b7901aba37c70e80dbe71e6c65fdf
Simon Zheng [Fri, 21 Jul 2017 07:33:33 +0000 (00:33 -0700)]
Merge "gpu: fixed min_state of thermal" into r6p1
Simon Zheng [Thu, 20 Jul 2017 12:30:20 +0000 (05:30 -0700)]
Merge "use HAL_PIXEL_FORMAT_YCrCb_420_SP for HAL_PIXEL_FORMAT_YCbCr_420_888" into r6p1
Jiyu Yang [Tue, 18 Jul 2017 11:12:30 +0000 (19:12 +0800)]
gpu: fixed min_state of thermal
PD#143724 fixed error in m8b m8m2 driver
Change-Id: I6666ec1da1711225701e323d29fc2fc8c71df3d1
Jiyu Yang [Fri, 14 Jul 2017 05:38:47 +0000 (13:38 +0800)]
use HAL_PIXEL_FORMAT_YCrCb_420_SP for HAL_PIXEL_FORMAT_YCbCr_420_888
PD#146294
use HAL_PIXEL_FORMAT_YCrCb_420_SP for HAL_PIXEL_FORMAT_YCbCr_420_888
(Android flexible YCbCr 4:2:0 formats)
This format allows platforms to use an efficient YCbCr/YCrCb 4:2:0
buffer layout, while still describing the general format in a
layout-independent manner. While called YCbCr, it can be
used to describe formats with either chromatic ordering, as well as
whole planar or semiplanar layouts.
struct android_ycbcr (below) is the the struct used to describe it.
This format must be accepted by the gralloc module when
USAGE_SW_WRITE_* or USAGE_SW_READ_* are set.
This format is locked for use by gralloc's (*lock_ycbcr) method, and
locking with the (*lock) method will return an error.
When used with ANativeWindow, the dataSpace field describes the color
space of the buffer.
Change-Id: I1167c091350f17f8f6e4477841d0ab485e57954d
Signed-off-by: Jiyu Yang <jiyu.yang@amlogic.com>
Jiyu Yang [Wed, 21 Jun 2017 04:08:21 +0000 (12:08 +0800)]
gpu: update the license [1/1]
PD#146719 license clean up
Change-Id: Ib93afab3a19b29ac89cfc6ec964912efb51095d4
Jiyu Yang [Tue, 9 May 2017 11:03:19 +0000 (19:03 +0800)]
PD#141398 r7p0 for m8b board
Change-Id: Ib4a6ad69a24aa3ef46ad168db35f1b6ed61f2c03
Jiyu Yang [Tue, 13 Jun 2017 11:49:08 +0000 (19:49 +0800)]
PD#142871 gpu: add mali for kitkat
Change-Id: Ife80a228181bce52597987c2ae24c753e3fe177f
wenbiao.zhang [Wed, 3 May 2017 07:43:31 +0000 (15:43 +0800)]
PD#143724: fixed min_state of thermal
for stark dvfs tbl is 125, 285, 400, 500, 666, 744.
so get_mali_freq_level should report min_state for STARK below
744 -> 0
666 -> 1
500 -> 2
400 -> 3
285 -> 4
125 -> 5
Change-Id: Iad17b56e8f22a29064a432f5c1810b1cb26cc79b
Jiyu Yang [Wed, 26 Apr 2017 13:35:07 +0000 (21:35 +0800)]
PD#139269 platform overlay buffer allocation
Change-Id: Ib6e62cc004eb1ca2444c59b0cb5addf3890896c9
Jiyu Yang [Fri, 24 Mar 2017 07:19:19 +0000 (15:19 +0800)]
PD#141500 midgard r16p0 release
Change-Id: Id03df3256c49740cc517f63723101ab0cf98664a
Jiyu Yang [Tue, 7 Mar 2017 10:42:37 +0000 (18:42 +0800)]
mm, fs: get rid of PAGE_CACHE_* and page_cache_{get,release} macros
PD#138714 kernel 4.9 bringup
PAGE_CACHE_{SIZE,SHIFT,MASK,ALIGN} macros were introduced *long* time
ago with promise that one day it will be possible to implement page
cache with bigger chunks than PAGE_SIZE.
This promise never materialized. And unlikely will.
We have many places where PAGE_CACHE_SIZE assumed to be equal to
PAGE_SIZE. And it's constant source of confusion on whether
PAGE_CACHE_* or PAGE_* constant should be used in a particular case,
especially on the border between fs and mm.
Global switching to PAGE_CACHE_SIZE != PAGE_SIZE would cause to much
breakage to be doable.
Let's stop pretending that pages in page cache are special. They are
not.
The changes are pretty straight-forward:
- <foo> << (PAGE_CACHE_SHIFT - PAGE_SHIFT) -> <foo>;
- <foo> >> (PAGE_CACHE_SHIFT - PAGE_SHIFT) -> <foo>;
- PAGE_CACHE_{SIZE,SHIFT,MASK,ALIGN} -> PAGE_{SIZE,SHIFT,MASK,ALIGN};
- page_cache_get() -> get_page();
- page_cache_release() -> put_page();
This patch contains automated changes generated with coccinelle using
script below. For some reason, coccinelle doesn't patch header files.
I've called spatch for them manually.
The only adjustment after coccinelle is revert of changes to
PAGE_CAHCE_ALIGN definition: we are going to drop it later.
There are few places in the code where coccinelle didn't reach. I'll
fix them manually in a separate patch. Comments and documentation also
will be addressed with the separate patch.
virtual patch
@@
expression E;
@@
- E << (PAGE_CACHE_SHIFT - PAGE_SHIFT)
+ E
@@
expression E;
@@
- E >> (PAGE_CACHE_SHIFT - PAGE_SHIFT)
+ E
@@
@@
- PAGE_CACHE_SHIFT
+ PAGE_SHIFT
@@
@@
- PAGE_CACHE_SIZE
+ PAGE_SIZE
@@
@@
- PAGE_CACHE_MASK
+ PAGE_MASK
@@
expression E;
@@
- PAGE_CACHE_ALIGN(E)
+ PAGE_ALIGN(E)
@@
expression E;
@@
- page_cache_get(E)
+ get_page(E)
@@
expression E;
@@
- page_cache_release(E)
+ put_page(E)
Change-Id: I139b5a4aab2622a3813233b1c224c02f0df9a621
Jiyu Yang [Tue, 7 Mar 2017 10:23:46 +0000 (18:23 +0800)]
dma-mapping: use unsigned long for dma_attrs
PD#138714 kernel 4.9 bringup
The dma-mapping core and the implementations do not change the DMA
attributes passed by pointer. Thus the pointer can point to const data.
However the attributes do not have to be a bitfield. Instead unsigned
long will do fine:
1. This is just simpler. Both in terms of reading the code and setting
attributes. Instead of initializing local attributes on the stack
and passing pointer to it to dma_set_attr(), just set the bits.
2. It brings safeness and checking for const correctness because the
attributes are passed by value.
Semantic patches for this change (at least most of them):
virtual patch
virtual context
@r@
identifier f, attrs;
@@
f(...,
- struct dma_attrs *attrs
+ unsigned long attrs
, ...)
{
...
}
@@
identifier r.f;
@@
f(...,
- NULL
+ 0
)
and
// Options: --all-includes
virtual patch
virtual context
@r@
identifier f, attrs;
type t;
@@
t f(..., struct dma_attrs *attrs);
@@
identifier r.f;
@@
f(...,
- NULL
+ 0
)
Link: http://lkml.kernel.org/r/1468399300-5399-2-git-send-email-k.kozlowski@samsung.com
Change-Id: I570e4dc3f2bc898d0dffa65d6e85b2767bc33832
Jiyu Yang [Thu, 23 Feb 2017 10:35:03 +0000 (18:35 +0800)]
PD#138881 disable state tracing when release
Change-Id: Id2dd5a708f7b7f34ab5131053cacb98b5e8c0d6d
Tao Zeng [Tue, 21 Feb 2017 06:27:45 +0000 (14:27 +0800)]
thermal compile ok for kernel 4.4
PD#131267 kernel 4.4 bringup
Change-Id: I3601e6eed68e6843669d472154a2f422a753771d
Jiyu Yang [Wed, 8 Feb 2017 12:53:31 +0000 (20:53 +0800)]
PD#139356 add NV12 support
Change-Id: Ic4ec13fe0534d30decc026082f4b0b25cb6abebd
Jiyu Yang [Fri, 10 Feb 2017 03:04:54 +0000 (11:04 +0800)]
temp disable gp pll request on 4.4
PD#131267 kernel 4.4 bringup
Change-Id: I791702b5b479b52738e869bbcb17b7d2f8a82bbd
Jiyu Yang [Mon, 21 Nov 2016 11:58:08 +0000 (19:58 +0800)]
gpu compile for 4.4
PD#131267 kernel 4.4
gpu compile ok, still have t83x themal can't be compiled.
Change-Id: Icbf7c75959c80166142194d4dc3cd9da9ebf4607
Jiyu Yang [Fri, 20 Jan 2017 08:59:58 +0000 (16:59 +0800)]
PD#132693 fixed Bad frame in CtsMediaTestCases
this happened when run the below cmd:
run cts -m CtsMediaTestCases
-t android.media.cts.EncodeDecodeTest#
testEncodeDecodeVideoFromPersistentSurfaceToSurface720p
Change-Id: I535d00fe395b9893ddf7a6de5c52744c9fe0e3d0
Jiyu Yang [Thu, 5 Jan 2017 05:31:56 +0000 (13:31 +0800)]
PD#132693 fixed libGLES_mali crash
this crash happened when run the below cmd:
run cts -m CtsMediaTestCases
-t android.media.cts.EncodeDecodeTest#testEncodeDecodeVideoFromPersistentSurfaceToSurface720p
Change-Id: I0073cb730ee6aeec4f29af94371f76d9cd0dbf45
Jiyu Yang [Thu, 22 Dec 2016 11:44:20 +0000 (19:44 +0800)]
PD#132695 fixed dEQP failed
Change-Id: I5eaaec1ce4c3cac02d5561f9189cd54be749e51e
Jiyu Yang [Tue, 18 Oct 2016 08:44:38 +0000 (16:44 +0800)]
update mali450 library for Android N
1. fixed video layer couldnot display
2. compile in Android N
Change-Id: Idcab239c15e1fcfc31e73627008641b9a5107d91
Jiyu Yang [Tue, 11 Oct 2016 05:35:50 +0000 (13:35 +0800)]
update r7p0 ddk for mali450
Change-Id: I7cb4b41bc017bd1048b06c0e00a96239f4d55f07
Jiyu Yang [Wed, 22 Jun 2016 09:19:02 +0000 (17:19 +0800)]
PD#128039 update 64bit so for t83x and t82x
Change-Id: Ie05521f8acd9cd381e68c76de2dcf33e480c6ffd
Lawrence Mok [Wed, 13 Jul 2016 01:19:59 +0000 (18:19 -0700)]
re-enable --strip-debug to reduce mali.ko size
from 7.6MB to 560KB
Change-Id: I86ff99724dea265657165e529892920fddf81d65
Jiyu Yang [Tue, 7 Jun 2016 06:47:30 +0000 (14:47 +0800)]
PD#126286 rm max pp and min pp for midgard
Change-Id: Idfb467f2172a54aa65133c858a2717d4ff111749
Jiyu Yang [Tue, 21 Jun 2016 13:20:06 +0000 (21:20 +0800)]
PD#126286 fix soft reset on midgard
The driver will ensure that the GPU is idle
before requesting power down. The power down request
will be made only when all jobs on all slots
have completed (all jobs flush and invalidate
on completion meaning the L2 cache will be empty).
The power down requests of the shader cores,
the tiler and the L2 cache are deferred to the system code
that will disable the clock(TODO) and power-off the whole GPU.
By bypassing the shader cores and core group power down sequences, and power
off the whole GPU instead, allows to this workaround to avoid the beginning of
any spurious transaction.
ter suspend
Change-Id: I048370dc83cb92762217f61b21a0ef3db2da457e
Ao Xu [Thu, 2 Jun 2016 02:46:48 +0000 (10:46 +0800)]
PD#126400: mali: move mali.ko to /system/lib
Change-Id: I9a38eff9eab1cd75a1d12c1fcdad7484469ab271
Jiyu Yang [Mon, 30 May 2016 10:04:49 +0000 (18:04 +0800)]
PD#125571 fixed compile for customer dir
Change-Id: I675c79ed3485293f3b321a1a5b7daef2af8326b1
Jiyu Yang [Thu, 26 May 2016 12:13:03 +0000 (20:13 +0800)]
PD#125963 gpu lib: fix yuv align to 32
this bug was imported in PD#125571
Change-Id: If2b92384d86f42db66c85a78942ddea16208c4fd
Simon Zheng [Tue, 24 May 2016 10:33:14 +0000 (03:33 -0700)]
Merge "PD#125571 midgard r11p0 rel for t82x and t83x" into r6p1
Jiyu Yang [Mon, 23 May 2016 08:16:30 +0000 (16:16 +0800)]
PD#125571 midgard r11p0 rel for t82x and t83x
commit
d28e5a582d83c19eafe00bc5e27f378ad67d82d0
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Tue May 24 16:03:58 2016 +0800
PD125571 update t82x t83x lib for android L
Change-Id: If605b9f9e98dfb571698363fe1c306771b3536a7
commit
a835f407444207c4110c40bb3d9c0be2192bc1e2
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Mon May 23 20:56:27 2016 +0800
PD#125571 add HAL_PIXEL_FORMAT_YCrCb_420_SP
this will be removed when android N
Change-Id: If23ba5d863b8f9d207b2923e82753949cbd0af55
commit
398ec136c3f1af79f6aa9c2c00912738cd66aed5
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Mon May 23 13:00:51 2016 +0800
PD#125571 update library for t82x and t83x
Change-Id: Id16041676497fa91072a9af0586d968420c16536
commit
b61cc518957e374975abe11ce743c792261b770a
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Fri May 20 14:43:04 2016 +0800
TX041-SW-99002-r11p0-00rel0
Change-Id: I6d18ef50fad81b939cf3bff21b108456258e63de
commit
210fd8146e5b64a83ba674abdfb8edbd53b22097
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Fri May 20 14:39:56 2016 +0800
TX041-SW-99002-r10p0-00rel0
Change-Id: I9d6aad092a3e69236c38f078ab6633d029a07997
commit
017572cb09550913ecd52e43ff2eb0754c5115c3
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Fri May 20 14:37:31 2016 +0800
TX041-SW-99002-r9p0-05rel0
Change-Id: Iab5b27d200621612c36deec6d1fef049af65db19
commit
4e9d6a0f22046d717c7f2599d5c89816e37d35d9
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Fri May 20 14:36:15 2016 +0800
TX041-SW-99002-r8p0-02rel0
Change-Id: Ic59759da9c59a5055595d96f9826ec1f98bdf8ce
Change-Id: I95c443fdc26dd1143ee90b2debdb40f94905e61c
Jiyu Yang [Thu, 19 May 2016 14:51:38 +0000 (22:51 +0800)]
PD#125571 gpu: update mk
Change-Id: I96c5f6b4162c5eebef0f4b91535a6781e8eb3baa
Simon Zheng [Wed, 18 May 2016 03:09:33 +0000 (20:09 -0700)]
Merge "PD#125292 gpu:dont set gp pll twice" into r6p1
Jiyu Yang [Tue, 17 May 2016 07:22:03 +0000 (15:22 +0800)]
PD#125292 gpu:dont set gp pll twice
Change-Id: I4ac6a6f15b7f19f5dc4d7f9565754f53d641d58b
Jiyu Yang [Sun, 15 May 2016 07:27:29 +0000 (15:27 +0800)]
PD#124800 add t82x support
Change-Id: I15a1198c0a39a81c10613f2b8da3e0ec3cc4600e
Tao Zeng [Wed, 20 Apr 2016 04:49:06 +0000 (12:49 +0800)]
PD#114881: add macro to control ipa
using CONFIG_DEVFREQ_THERMAL macro to control ipa
Change-Id: I54748b04015b00ac3476a16e3bdaeaac97481cb9
Jiyu Yang [Mon, 18 Apr 2016 13:59:39 +0000 (21:59 +0800)]
PD#123871 gpu lib: update so for different android version
Change-Id: I75d64ffdbaeb753e399e8ffbb50bd750217ee30c
Jiyu Yang [Sat, 26 Mar 2016 09:15:18 +0000 (17:15 +0800)]
PD#121797 r6p1 01rel0 mali450
commit
d8ca016baa66c77207970f93eba3d7b6290eb362
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Thu Mar 24 13:14:10 2016 +0800
PD#121797 r6p1 01rel0 mali450
Change-Id: I789de0b5999738fb938960c4466307a0b58d3f7c
commit
de5869e1564802896a8ab733bbacf6096dbfbe47
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Wed Mar 23 15:49:39 2016 +0800
PD#121797 r6p0 01rel1 mali450
Change-Id: I784e085317b8065c5a1e592b6b12d12cd910c70b
commit
9d995f3cab7114fe5672db15473f56e2073b1767
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Wed Mar 23 15:44:59 2016 +0800
PD#121797 r6p0 01rel0 mali450
Change-Id: I42ab3ba82b26c8258e8d8d5ae926e93f52fb62cf
commit
94925203b73e294c6839430433517a74c5db4261
Author: Jiyu Yang <jiyu.yang@amlogic.com>
Date: Tue Sep 1 20:15:13 2015 +0800
PD#121797 add mali r5p2
(cherry picked from commit
a87100bd8c10c4e5990cb956a97c60ce6a8de104)
Change-Id: Icfffa60966ccbceac9bf5fc6a7d2ed92327c40d0
Change-Id: I3ac9aa3364938f01efa97d161b816747d43c81b8
Simon Zheng [Wed, 16 Mar 2016 03:34:53 +0000 (20:34 -0700)]
Merge "PD#119939 add array check for dvfs table" into r5p1-3.14-dev
Jiyu Yang [Fri, 11 Mar 2016 06:34:02 +0000 (14:34 +0800)]
PD#119939 add array check for dvfs table for mali450
Change-Id: I9f6b40f28f6ad779c65fffae70d41987a01ab10e
Jiyu Yang [Tue, 8 Mar 2016 10:14:41 +0000 (18:14 +0800)]
PD#119939 add array check for dvfs table
Change-Id: I6c0ab76284a5b60073259b7817de20f38434d92d