Olof Johansson [Mon, 30 Jan 2017 01:05:23 +0000 (17:05 -0800)]
Merge tag 'davinci-for-v4.11/dt' of git://git./linux/kernel/git/nsekhar/linux-davinci into next/dt
Device tree updates for DaVinci DA850
* GPIO keys on DA850 LCDK
* LCDC display on DA850 LCDK
* USB OHCI on DA850 LCDK
* VPIF (video input) on DA850 LCDK
* Add a DA8xx specific compatible for UARTs
* Introduce support for Lego Mindstorms EV3
* tag 'davinci-for-v4.11/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: Add LEGO MINDSTORMS EV3 dts
dt-bindings: add "microchip,24c128" compatible string
dt-bindings: Add LEGO MINDSTORMS EV3 compatible specification
dt-bindings: Add vendor prefix for LEGO
ARM: dts: da850: Add ti,da830-uart compatible for serial ports
ARM: dts: davinci: da850-lcdk: enable VPIF
ARM: dts: davinci: da850-evm: enable VPIF
ARM: dts: davinci: da850: VPIF: add node and muxing
ARM: dts: da850-lcdk: Enable ohci for omapl138 lcdk
ARM: dts: da850: Add usb device node
ARM: dts: da850: specify the maximum pixel clock rate for tilcdc
ARM: dts: da850-lcdk: add the vga-bridge node
ARM: dts: da850: rename the display node label
ARM: dts: da850-lcdk: add gpio-keys
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Mon, 30 Jan 2017 00:09:01 +0000 (16:09 -0800)]
Merge tag 'qcom-dts-for-4.11' of git://git./linux/kernel/git/agross/linux into next/dt
Qualcomm Device Tree Changes for v4.11
* Add Coresight components for APQ8064
* Fixup PM8058 nodes
* Add APQ8060 gyro and accel support
* Enable SD600 HDMI support
* Add RIVA supprort for Sony Yuga and SD600
* Add PM8821 support
* Add MSM8974 ADSP, USB gadget, SMD, and SMP2P support
* Fix IPQ8064 clock frequencies
* tag 'qcom-dts-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: qcom: Add apq8064 CoreSight components
ARM: dts: Add gyro and accel to APQ8060 Dragonboard
ARM: dts: reference PM8058 as IRQ parent
ARM: dts: rename MSM8660/APQ8060 pmicintc to pm8058
ARM: dts: sd-600eval: enable 1.8v regulator on LS expansion
ARM: dts: sd-600eval: add hdmi support
ARM: dts: move hdmi pinctrl out of board file.
ARM: dts: qcom: sd600eval: Enable riva-pil
ARM: dts: qcom: sd600-eval: pm8921_s2 regulator properties
ARM: dts: qcom: apq8064-sony-yuga: Enable riva-pil
ARM: dts: qcom: apq8064: Add riva-pil node
ARM: dts: apq8064: add support to pm8821
arm: dts: qcom: Fix ipq board clock rates
ARM: dts: msm8974: Remove "unused" reserved region
ARM: dts: msm8974: Add ADSP PIL node
ARM: dts: msm8974: Add ADSP smp2p and smd nodes
ARM: dts: qcom: msm8974: Add USB gadget nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sun, 29 Jan 2017 22:47:53 +0000 (14:47 -0800)]
Merge tag 'uniphier-dt-v4.11' of git://git./linux/kernel/git/masahiroy/linux-uniphier into next/dt
UniPhier ARM SoC DT updates for v4.11
- Add eMMC, SD pin-mux nodes
* tag 'uniphier-dt-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
ARM: dts: uniphier: add SD pin-mux node
ARM: dts: uniphier: add eMMC pin-mux node
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sun, 29 Jan 2017 22:45:17 +0000 (14:45 -0800)]
Merge tag 'keystone_dts_for_4.11' of git://git./linux/kernel/git/ssantosh/linux-keystone into next/dt
ARM: Keystone DTS update for 4.11
Brief:
- MSM RAM node support for the Keystone 2 SOCs.
- PSC node & reset controller node support for keystone 2 SOCs.
- da830 UART node support.
* tag 'keystone_dts_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone-k2e: Add PSC reset controller node
ARM: dts: keystone-k2l: Add PSC reset controller node
ARM: dts: keystone-k2hk: Add PSC reset controller node
ARM: dts: keystone: Add PSC node
ARM: keystone: dts: fix netcp clocks and add names
ARM: dts: keystone-k2g: Reserve MSM RAM for boot monitor
ARM: dts: keystone-k2e: Reserve MSM RAM for boot monitor
ARM: dts: keystone-k2l: Reserve MSM RAM for boot monitor
ARM: dts: keystone-k2hk: Reserve MSM RAM for boot monitor
ARM: dts: keystone-k2g: Add MSM RAM node
ARM: dts: keystone-k2e: Add MSM RAM node
ARM: dts: keystone-k2l: Add MSM RAM node
ARM: dts: keystone-k2hk: Add MSM RAM node
ARM: dts: keystone: Add "ti,da830-uart" compatible string
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sun, 29 Jan 2017 22:42:05 +0000 (14:42 -0800)]
Merge tag 'v4.11-rockchip-dts32-1' of git://git./linux/kernel/git/mmind/linux-rockchip into next/dt
Bit of cleanup for the cortex-a9 uarts to have that soc-specific
spare-compatible as all others have, conversion to gpio constants
and addition of rk3288 qos nodes that need to be saved before a
power-domain gets turned off.
* tag 'v4.11-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add soc-specific uart compatibles for rk3066/rk3188
ARM: dts: rockchip: use pin constants to describe gpios
ARM: dts: rockchip: add qos node for rk3288
Signed-off-by: Olof Johansson <olof@lixom.net>
Masahiro Yamada [Sun, 22 Jan 2017 12:46:49 +0000 (21:46 +0900)]
ARM: dts: uniphier: add SD pin-mux node
The Pro4 SoC has 2 slots of SD controllers, so 2 pin-mux nodes
(SD and SD1) are needed. The other SoCs have only 1 SD slot.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 22 Jan 2017 12:46:49 +0000 (21:46 +0900)]
ARM: dts: uniphier: add eMMC pin-mux node
All UniPhier SoCs support an eMMC controller.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
David Lechner [Fri, 13 Jan 2017 19:03:42 +0000 (13:03 -0600)]
ARM: dts: Add LEGO MINDSTORMS EV3 dts
This adds a device tree definition file for LEGO MINDSTORMS EV3.
What is working:
* Pin muxing
* Pinconf
* GPIOs
* MicroSD card reader
* UART on input port 1
* Buttons
* LEDs
* Poweroff/reset
* Flash memory
* EEPROM
* USB host port
* USB peripheral port
What is not working/to be added later:
* Speaker - have patch submitted to get pwm-beeper working - maybe someday
it will have a real sound driver that uses PRU
* A/DC chip - have driver submitted and accepted - waiting for ack on
device tree bindings
* Display - waiting for "simple DRM" to be mainlined
* Bluetooth - needs new driver for sequencing power/enable/clock
* Input and output ports - need some sort of new phy or extcon driver as
well as PRU UART and PRU I2C drivers
* Battery indication - needs new power supply driver
Note on flash partitions:
These partitions are based on the official EV3 firmware from LEGO. It is
expected that most users of the mainline kernel on EV3 will be booting from
an SD card while retaining the official firmware in the flash memory.
Furthermore, the official firmware uses an ancient U-Boot (2009) that has
no device tree support. So, it makes sense to have this partition table in
the EV3 device tree file. In the unlikely case that anyone does create
their own firmware image with different partitioning, they can use a modern
U-Boot in their own firmware image that modifies the device tree with the
custom partitions.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
David Lechner [Fri, 13 Jan 2017 19:03:41 +0000 (13:03 -0600)]
dt-bindings: add "microchip,24c128" compatible string
This adds "microchip,24c128" to the list of compatible strings for i2c
eeproms.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
David Lechner [Fri, 13 Jan 2017 19:03:40 +0000 (13:03 -0600)]
dt-bindings: Add LEGO MINDSTORMS EV3 compatible specification
This adds the board level device tree specification for LEGO MINDSTORMS EV3
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
David Lechner [Fri, 13 Jan 2017 19:03:39 +0000 (13:03 -0600)]
dt-bindings: Add vendor prefix for LEGO
Add a vendor prefix for LEGO Systems A/S
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Olof Johansson [Fri, 20 Jan 2017 00:25:07 +0000 (16:25 -0800)]
Merge tag 'arm-soc/for-4.11/devicetree' of github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.11,
please pull the following changes:
- Rafal enables the UART by default on all BCM5301x, BCM4708, BCM4709 since
every device found out there has it enabled by default. He also fixes the
LED definitions for the Luxul XWR-3100 device, enables USB controllers and
their respective PHY devices, specifies the correct GPIO to power on USB
HUBs, adds the additional RAM bank for somes devices, and finally sets the
correct 5Ghz frequency limits on the Netgear R8000
- Jon does a number of Norsthar Plus SoC cleanups, fixes NAND partitions unit
addresses, adds QSPI support to a bunch of boards, adds Ethernet switch ports
to the BCM958625K reference board, enables 3rd Ethernet MAC instance to
relevant DTSes, enables Ethernet on the XMC board, and finally adds SD/MMC
support to the XMC board
- Boris adds the Video Encoder nodes to the Raspberry Pi DTS include files
ands enables it on the relevant boards
- Dan adds support for two new Luxul devices: XAP-1410 and XWR-1200, both
BCM47081 based SoCs
* tag 'arm-soc/for-4.11/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: bcm283x: Enable the VEC IP on all RaspberryPi boards
ARM: dts: bcm283x: Add VEC node in bcm283x.dtsi
ARM: dts: BCM5301X: Add DT for Luxul XWR-1200
ARM: dts: BCM5301X: Add DT for Luxul XAP-1410
ARM: dts: BCM5301X: Set 5 GHz wireless frequency limits on Netgear R8000
ARM: dts: NSP: Add SD/MMC support
ARM: dts: NSP: Add Ethernet to NSP XMC
ARM: dts: NSP: Add and enable amac2
ARM: dts: NSP: Add BCM958625K switch ports
ARM: dts: NSP: Add QSPI support to missing boards
ARM: dts: NSP: Correct NAND partition unit address
ARM: dts: NSP: DT Clean-ups
ARM: dts: BCM53573: Specify USB ports of on-SoC controllers
ARM: dts: BCM5301X: Specify all RAM by including an extra block
ARM: dts: BCM5301X: Set GPIO enabling USB power on Netgear R7000
ARM: dts: BCM5301X: Specify USB controllers in DT
ARM: dts: BCM5301X: Fix LAN LED labels for Luxul XWR-3100
ARM: dts: BCM5301X: Enable UART by default for BCM4708(1), BCM4709(4) & BCM53012
Signed-off-by: Olof Johansson <olof@lixom.net>
Marc Gonzalez [Thu, 19 Jan 2017 14:59:04 +0000 (15:59 +0100)]
ARM: dts: tango4: Import USB nodes
Tango4 provides 2 USB 2.0 controllers.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Marc Gonzalez [Thu, 19 Jan 2017 14:57:54 +0000 (15:57 +0100)]
ARM: dts: tango4: Import MMC nodes
Tango4 provides 2 SD/SDIO/eMMC controllers.
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Marc Gonzalez [Thu, 19 Jan 2017 14:52:04 +0000 (15:52 +0100)]
ARM: dts: tango4: Add alias for eth0
http://elinux.org/Device_Tree_Usage#aliases_Node
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Suman Anna [Thu, 19 Jan 2017 17:44:11 +0000 (09:44 -0800)]
ARM: dts: keystone-k2e: Add PSC reset controller node
The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.
Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2E SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Suman Anna [Thu, 19 Jan 2017 17:44:11 +0000 (09:44 -0800)]
ARM: dts: keystone-k2l: Add PSC reset controller node
The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.
Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2L SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Suman Anna [Thu, 19 Jan 2017 17:44:11 +0000 (09:44 -0800)]
ARM: dts: keystone-k2hk: Add PSC reset controller node
The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.
Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2H SoCs.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Suman Anna [Thu, 19 Jan 2017 17:44:11 +0000 (09:44 -0800)]
ARM: dts: keystone: Add PSC node
The Power Sleep Controller (PSC) module is responsible
for the power and clock management for each of the peripherals
present on the SoC. Represent this as a syscon node so that
multiple users can leverage it for various functionalities.
Signed-off-by: Suman Anna <s-anna@ti.com>
[afd@ti.com: add simple-mfd compatible]
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Murali Karicheri [Thu, 19 Jan 2017 17:31:48 +0000 (09:31 -0800)]
ARM: keystone: dts: fix netcp clocks and add names
Fix the pa clock to point to the clkpa which has clock rate of 1/3 of PA
PLL clock and add clock names.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Heiko Stuebner [Thu, 19 Jan 2017 16:04:44 +0000 (17:04 +0100)]
ARM: dts: rockchip: add soc-specific uart compatibles for rk3066/rk3188
The serial IPs in Rockchip socs are based on Designware uarts and thus
bind against the snps,dw-apb-uart compatible.
On all newer socs we also carry around per-soc compatibles that allow
us to have more specific drivers in the future - if needed.
The cortex-a9 socs rk3066 and rk3188 that were added first don't have
those yet, so add them for completenes sake.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Florian Fainelli [Wed, 18 Jan 2017 01:10:32 +0000 (17:10 -0800)]
Merge tag 'bcm2835-dt-next-2017-01-17' into devicetree/next
This pull request brings in the DT changes for VEC (TV-out) on
Raspberry Pi.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Boris Brezillon [Fri, 2 Dec 2016 13:48:13 +0000 (14:48 +0100)]
ARM: dts: bcm283x: Enable the VEC IP on all RaspberryPi boards
Enable the VEC IP on all RaspberryPi boards.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Boris Brezillon [Fri, 2 Dec 2016 13:48:12 +0000 (14:48 +0100)]
ARM: dts: bcm283x: Add VEC node in bcm283x.dtsi
Add the VEC (Video EnCoder) node definition in bcm283x.dtsi.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Dan Haab [Sun, 15 Jan 2017 02:29:28 +0000 (19:29 -0700)]
ARM: dts: BCM5301X: Add DT for Luxul XWR-1200
Luxul XWR-1200 in a dual-band router based on BCM47081. It uses serial
flash (for bootloader and NVRAM) and NAND flash (for firmware).
Signed-off-by: Dan Haab <dhaab@luxul.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Dan Haab [Sun, 15 Jan 2017 02:29:27 +0000 (19:29 -0700)]
ARM: dts: BCM5301X: Add DT for Luxul XAP-1410
Luxul XAP-1410 in a dual-band access point device based on BCM47081 with
serial flash. It has 3 LEDs and just one (reset) button.
Signed-off-by: Dan Haab <dhaab@luxul.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Fri, 13 Jan 2017 23:58:57 +0000 (00:58 +0100)]
ARM: dts: BCM5301X: Set 5 GHz wireless frequency limits on Netgear R8000
Netgear R8000 is a tri-band home router. It has three BCM43602 chipsets
two of them for 5 GHz band. Both seem the same and their firmwares
report the same set of channels. The problem is due to hardware / board
design there are extra limitations that should be respected.
First PHY should be used for U-NII-2 and U-NII-3. Third PHY should be
used for U-NII-1. Using them in a different way may result in wireless
not working or in noticeably reduced performance. Basic version of this
info was provided by Broadcom employee, then it has been verified by me
using original vendor firmware (which has limitations hardcoded in UI).
This patch uses recently introduced ieee80211-freq-limit property to
describe these limitations at DT level.
Referencing PCIe devices in DT required specifying all related bridges.
Below you can see (a bit complex) PCI tree from R8000 that explains all
entries that I needed to put in DT.
0000:00:00.0 14e4:8012 Bridge Device
└─ 0000:01:00.0 14e4:aa52 Network Controller
0001:00:00.0 14e4:8012 Bridge Device
└─ 0001:01:00.0 10b5:8603 Bridge Device
├─ 0001:02:01.0 10b5:8603 Bridge Device
│ └─ 0001:03:00.0 14e4:aa52 Network Controller
├─ 0001:02:02.0 10b5:8603 Bridge Device
│ └─ 0001:04:00.0 14e4:aa52 Network Controller
├─ 0001:02:03.0 000d:0000 0x000000
├─ 0001:02:04.0 000d:0000 0x000000
├─ 0001:02:05.0 000d:0000 0x000000
├─ 0001:02:06.0 000d:0000 0x000000
├─ (...)
├─ 0001:02:1d.0 000d:0000 0x000000
├─ 0001:02:1e.0 000d:0000 0x000000
└─ 0001:02:1f.0 000d:0000 0x000000
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Jon Mason [Tue, 13 Dec 2016 18:13:51 +0000 (13:13 -0500)]
ARM: dts: NSP: Add SD/MMC support
Add SD/MMC support to the Broadcom NSP SVK and XMC.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Jon Mason [Tue, 13 Dec 2016 18:13:50 +0000 (13:13 -0500)]
ARM: dts: NSP: Add Ethernet to NSP XMC
Enable the ethernet in the NSP XMC (bcm958525xmc) device tree
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Jon Mason [Tue, 13 Dec 2016 18:13:49 +0000 (13:13 -0500)]
ARM: dts: NSP: Add and enable amac2
Add and enable the third AMAC ethernet interface in the device trees for
the platforms where it is present. Also, enable amac1 on some of the
platforms where that was missing.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Jon Mason [Tue, 13 Dec 2016 18:13:48 +0000 (13:13 -0500)]
ARM: dts: NSP: Add BCM958625K switch ports
Add the layout of the switch ports found on the BCM958625K reference
board. The CPU port is hooked up to the AMAC0 Ethernet controller
adapter.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Jon Mason [Tue, 13 Dec 2016 18:13:47 +0000 (13:13 -0500)]
ARM: dts: NSP: Add QSPI support to missing boards
QSPI device tree entries are present in bcm958625k, but missing from
bcm958522er, bcm958525er, bcm958525xmc, bcm958622hr, bcm958623hr,
bcm958625hr, and bcm988312hr. Duplicate the entry in bcm958625k for
all of those that are missing it (as they are identical).
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Jon Mason [Tue, 13 Dec 2016 18:13:46 +0000 (13:13 -0500)]
ARM: dts: NSP: Correct NAND partition unit address
The NAND partition unit address does not match the other NSP device tree
files. This change makes them uniform.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Jon Mason [Tue, 13 Dec 2016 18:13:45 +0000 (13:13 -0500)]
ARM: dts: NSP: DT Clean-ups
The QSPI entry was added out of the sequental order that the rest of the
DTSI file is in. Move it to make it fit in properly. Also, some other
entries have been added in a non-alphabetical order in the DTS files,
making them different from the other NSP DTS files. Move the relevant
peices to make it match. Finally, remove errant new lines.
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Wed, 7 Dec 2016 07:56:55 +0000 (08:56 +0100)]
ARM: dts: BCM53573: Specify USB ports of on-SoC controllers
Broadcom OHCI and EHCI controllers always have 2 ports each on the root
hub. Describe them in DT to allow specifying extra info or referencing
port nodes.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Wed, 7 Dec 2016 07:56:54 +0000 (08:56 +0100)]
ARM: dts: BCM5301X: Specify all RAM by including an extra block
The first 128 MiB of RAM can be accessed using an alias at address 0x0.
In theory we could access whole RAM using 0x80000000 - 0xbfffffff range
(up to 1 GiB) but it doesn't seem to work on Northstar. For some reason
(hardware setup left by the bootloader maybe?) 0x80000000 - 0x87ffffff
range can't be used. I reproduced this problem on:
1) Buffalo WZR-600DHP2 (BCM47081)
2) Netgear R6250 (BCM4708)
3) D-Link DIR-885L (BCM47094)
So it seems we're forced to access first 128 MiB using alias at 0x0 and
the rest using real base address + 128 MiB offset which is 0x88000000.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Wed, 7 Dec 2016 07:56:53 +0000 (08:56 +0100)]
ARM: dts: BCM5301X: Set GPIO enabling USB power on Netgear R7000
There is one GPIO controlling power for both USB ports.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Wed, 7 Dec 2016 07:56:52 +0000 (08:56 +0100)]
ARM: dts: BCM5301X: Specify USB controllers in DT
There are 3 separated controllers, one per USB /standard/. With PHY
drivers in place they can be simply supported with generic drivers.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Wed, 7 Dec 2016 07:56:51 +0000 (08:56 +0100)]
ARM: dts: BCM5301X: Fix LAN LED labels for Luxul XWR-3100
They were named incorrectly most likely due to copy & paste mistake.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Rafał Miłecki [Thu, 1 Dec 2016 17:40:51 +0000 (18:40 +0100)]
ARM: dts: BCM5301X: Enable UART by default for BCM4708(1), BCM4709(4) & BCM53012
Every device tested so far got UART0 (at 0x18000300) working as serial
console. It's most likely part of reference design and all vendors use
it that way.
It seems to be easier to enable it by default and just disable it if we
ever see a device with different hardware design.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Olof Johansson [Thu, 19 Jan 2017 00:25:03 +0000 (16:25 -0800)]
Merge tag 'aspeed-4.11-devicetree' of git://git./linux/kernel/git/joel/aspeed into next/dt
Aspeed devicetree updates for 4.11
This introduces the first OpenPower Power9 BMC system, Romulus. Romulus is
based on the ast2500 SoC from Aspeed.
These commits also add newly upstreamed drivers to the Palmetto BMC and ast2500
eval board. We now have working network, ipmi bt, gpio and pinmux on all platforms.
* tag 'aspeed-4.11-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add Romulus BMC platform
ARM: dts: aspeed: Add ftgmac100 to g4 and g5 platforms
ARM: dts: aspeed: Correct palmetto device tree
ARM: dts: aspeed: Reserve framebuffer memory
ARM: dts: aspeed-g5: Add gpio controller to devicetree
ARM: dts: aspeed-g5: Add syscon and pin controller nodes
ARM: dts: aspeed-g5: Add LPC Controller node
ARM: dts: aspeed-g5: Add SoC Display Controller node
ARM: dts: aspeed-g4: Add gpio controller to devicetree
ARM: dts: aspeed-g4: Add syscon and pin controller nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Thu, 19 Jan 2017 00:17:26 +0000 (16:17 -0800)]
Merge tag 'at91-ab-4.11-dt' of git://git./linux/kernel/git/abelloni/linux into next/dt
DT for 4.11:
- New boards: Axentia TSE-850, sama5d36ek CMP
- new device definitions for sama5d2
- Fix DMA allocation on sama5d4 for secure peripherals
* tag 'at91-ab-4.11-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
ARM: dts: at91: add devicetree for the Axentia TSE-850
ARM: dts: at91: add dts file for sama5d36ek CMP board
ARM: dts: at91: sama5d2: add ssc0 definition
ARM: dts: at91: sama5d2 Xplained: use DMA for UART3
ARM: dts: at91: sama5d2: move UART3 to DMA1
ARM: dts: at91: add dma1 definition to sama5d2
ARM: dts: at91: sama5d4 Xplained: enable UART1 node with DMA
ARM: dts: at91: sama5d4: change DMA allocation for secure peripherals
ARM: dts: at91: sama5d3_uart: fix reg sizes to match documentation
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 17 Jan 2017 06:47:51 +0000 (22:47 -0800)]
Merge tag 'stm32-dt-for-v4.11-1' of git://git./linux/kernel/git/atorgue/stm32 into next/dt
STM32 DT updates for v4.11, round 1.
Highlights:
----------
- ADD RTC support on STM32F429 MCU
- Enable RTC on STM32F469and STM32F429 boards
- ADD ADC support on STM32F429 MCU
- Enable ADC on STM32F429 Eval board
- Add I2S external clock
- Fix memory size for STM32F429 Disco
Note:
-----
First patch "clk: stm32f4: Update DT bindings documentation")
has already been merged in clock tree.
* tag 'stm32-dt-for-v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: enable RTC on stm32429i-eval
ARM: dts: stm32: enable RTC on stm32f469-disco
ARM: dts: stm32: enable RTC on stm32f429-disco
ARM: dts: stm32: Add RTC support for STM32F429 MCU
ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f429
ARM: dts: stm32: Include auxiliary stm32fx clock definition
ARM: dts: stm32: Add external I2S clock on stm32f429 MCU
ARM: dts: stm32: enable ADC on stm32f429i-eval board
ARM: dts: stm32: Add ADC support to stm32f429
ARM: dts: stm32: Add missing USART3 pin config to stm32f469-disco board
ARM: dts: stm32: Fix memory size from 8MB to 16MB on stm32f469-disco board
clk: stm32f4: Update DT bindings documentation
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 17 Jan 2017 06:44:16 +0000 (22:44 -0800)]
Merge tag 'mvebu-dt-4.11-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.11 (part 1)
- Add support for the ethernet switch on the Turris Omnia board
- Clean up and improvement for ClearFog boards
- Correct license text which was mangled when switching to dual license
* tag 'mvebu-dt-4.11-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: turris-omnia: add support for ethernet switch
ARM: dts: armada388-clearfog: move uart nodes
ARM: dts: armada388-clearfog: move ethernet related nodes
ARM: dts: armada388-clearfog: move I2C nodes
ARM: dts: armada388-clearfog: move device specific pinctrl nodes
ARM: dts: armada388-clearfog: add pro model DTS file
ARM: dts: armada388-clearfog: add base model DTS file
ARM: dts: armada388-clearfog: move rear button
ARM: dts: armada388-clearfog: move SPI CS1
ARM: dts: armada388-clearfog: move second PCIe port
ARM: dts: armada388-clearfog: move DSA switch
ARM: dts: armada388-clearfog: split clearfog DTS file
ARM: dts: armada388-clearfog: move sdhci pinctrl node to microsom
ARM: dts: armada388-clearfog: move SPI flash into microsom
ARM: dts: armada388-clearfog: fix SPI flash #size-cells
ARM: dts: mvebu: Correct license text
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 17 Jan 2017 06:30:21 +0000 (22:30 -0800)]
Merge tag 'samsung-dt-4.11' of git://git./linux/kernel/git/krzk/linux into next/dt
Samsung DeviceTree update for v4.11:
1. Fixes for initial audio clocks configuration.
2. Enable sound on Odroid-X board.
3. Enable DMA for UART modules on Exynos5 SoCs.
4. Add CPU OPPs for Exynos4412 Prime (newer version of Exynos4412). This pulls
necessary change in the clocks.
5. Remove Exynos4212. We do not have any mainline boards with it. This will
simplify few bits later.
* tag 'samsung-dt-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: remove Exynos4212 support (dead code)
ARM: dts: exynos: Add CPU OPPs for Exynos4412 Prime
clk: samsung: Add CPU clk configuration data for Exynos4412 Prime
ARM: dts: exynos: Enable DMA support for UART modules on Exynos5 SoCs
ARM: dts: exynos: Cleanup Odroid-X2 and enable sound on Odroid-X
ARM: dts: exynos: Fix initial audio clocks configuration on Exynos4 boards
ARM: dts: exynos: Correct clocks for Exynos4 I2S module
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 17 Jan 2017 06:28:12 +0000 (22:28 -0800)]
Merge tag 'sti-dt-for-v4.11' of git://git./linux/kernel/git/pchotard/sti into next/dt
STi dts update:
Enable High Quality Video Data Plane (HQVDP) DT entry
Add DELTA V4L2 video decoder DT entry
Disable unused fdma instances
Fix sti-display-subsystem wrong clock parent's value
Cleanup and update DT entries related to remoteproc
* tag 'sti-dt-for-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti:
ARM: dts: STiH407-family: Supply Mailbox properties to delta RProc
ARM: dts: STiH407-family: Supply mailbox properties to GP0 RProc
ARM: dts: STiH407-family: update dmu remoteproc node
ARM: dts: STiH407-family: remove gp1 remoteproc node
ARM: dts: STiH407-family: remove audio remoteproc node
ARM: dts: STiH407-family: update gp0_reserved memory region
ARM: dts: STiH410-family: fix wrong parent clock frequency
ARM: dts: STiH410: add DELTA dt node
ARM: dts: STiH407-family: disable fdma1 and fdma2
ARM: dts: STiH410: add hqvdp node
ARM: dts: STiH410-B2120: enable sti-hda at board level
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Tue, 17 Jan 2017 06:25:07 +0000 (22:25 -0800)]
Merge tag 'socfpga_dts_for_v4.11_part_1' of git://git./linux/kernel/git/dinguyen/linux into next/dt
SoCFPGA DTS updates for v4.11, part 1
- Adds FPGA manager bits
- Enable I2C on Cyclone5 and Arria5 devkits
- Adds LED support on C5/A5 devkits
- Enables CAN on C5 devkit
- Enables watchdog
- Add NAND on Arria10
- Add the LTC2977 Power Monitor on Arria10 devkit
* tag 'socfpga_dts_for_v4.11_part_1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: add missing compatible string for SDRAM controller
ARM: dts: socfpga: add fpga region support on Arria10
ARM: dts: socfpga: add base fpga region and fpga bridges
ARM: dts: socfpga: fpga manager data is 32 bits
ARM: dts: socfpga: Add NAND device tree for Arria10
ARM: dts: socfpga: add fpga-manager node for Arria10
ARM: dts: socfpga: add the LTC2977 power monitor on Arria10 devkit
ARM: dts: socfpga: enable watchdog timer on Arria5 and Arria10
ARM: dts: socfpga: enable CAN on Cyclone5 devkit
ARM: dts: socfpga: Add Rohm DH2228FV DAC
ARM: dts: socfpga: set desired i2c clock on Cyclone5 and Arria5 devkits
ARM: dts: socfpga: enable GPIO and LEDs for Cyclone5 and Arria5 devkits
Signed-off-by: Olof Johansson <olof@lixom.net>
Amelie Delaunay [Mon, 16 Jan 2017 13:29:00 +0000 (14:29 +0100)]
ARM: dts: stm32: enable RTC on stm32429i-eval
This patch enables RTC on stm32429i-eval with default LSE clock source.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Amelie Delaunay [Mon, 16 Jan 2017 13:29:00 +0000 (14:29 +0100)]
ARM: dts: stm32: enable RTC on stm32f469-disco
This patch enables RTC on stm32f469-disco with default LSE clock source.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Amelie Delaunay [Mon, 16 Jan 2017 13:29:00 +0000 (14:29 +0100)]
ARM: dts: stm32: enable RTC on stm32f429-disco
This patch enables RTC on stm32f429-disco with LSI as clock source because
X2 crystal for LSE is not fitted by default.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Amelie Delaunay [Mon, 16 Jan 2017 13:29:00 +0000 (14:29 +0100)]
ARM: dts: stm32: Add RTC support for STM32F429 MCU
This patch adds STM32 RTC bindings for STM32F429.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Amelie Delaunay [Mon, 16 Jan 2017 13:29:00 +0000 (14:29 +0100)]
ARM: dts: stm32: set HSE_RTC clock frequency to 1 MHz on stm32f429
This patch set HSE_RTC clock frequency to 1 MHz, as the clock supplied to
the RTC must be 1 MHz.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
Ivan T. Ivanov [Wed, 11 Jan 2017 15:50:21 +0000 (17:50 +0200)]
ARM: dts: qcom: Add apq8064 CoreSight components
Add initial set of CoreSight components found on Qualcomm apq8064 based
platforms, including the IFC6410 board.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Linus Walleij [Thu, 5 Jan 2017 15:13:36 +0000 (16:13 +0100)]
ARM: dts: Add gyro and accel to APQ8060 Dragonboard
This adds the MPU-3050 gyroscope and the KXSD9 accelerometer to
the Qualcomm APQ8060 Dragonboard. The KXSD9 is mounted beyond the
MPU-3050 and appear as a subdevice beyond it. We set up the
required GPIO and interrupt lines to make the devices work.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Linus Walleij [Thu, 5 Jan 2017 15:13:35 +0000 (16:13 +0100)]
ARM: dts: reference PM8058 as IRQ parent
Some nodes are referencing the pm8058_gpio as IRQ parent, but
the HW IRQ offset they are supplying is actually that for the
parent to that controller: the PM8058 itself. Since that is the
proper parent, reference it directly.
We can switch this to the pm8058_gpio and the proper offset
once we have fixed the SSBI GPIO driver to properly deal with
the hierarchical IRQ domain and get proper local offset
translation.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Linus Walleij [Thu, 5 Jan 2017 15:13:34 +0000 (16:13 +0100)]
ARM: dts: rename MSM8660/APQ8060 pmicintc to pm8058
The name "pmicintc" is ambiguous: there is a second power
management IC named PM8901 on these systems, and it is also
an interrupt controller. To make things clear, just name the
node alias "pm8058", this in unambigous and has all information
we need.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Srinivas Kandagatla [Wed, 4 Jan 2017 13:34:13 +0000 (13:34 +0000)]
ARM: dts: sd-600eval: enable 1.8v regulator on LS expansion
This patch enables 1.8v regulator on LS expansion, which should be
always on according to 96boards spec.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Srinivas Kandagatla [Wed, 4 Jan 2017 13:34:12 +0000 (13:34 +0000)]
ARM: dts: sd-600eval: add hdmi support
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Srinivas Kandagatla [Wed, 4 Jan 2017 13:34:11 +0000 (13:34 +0000)]
ARM: dts: move hdmi pinctrl out of board file.
This patch moves hdmi pinctrl defination from board file to soc level
pinctrl file. If not this pinctrl setup will be duplicated across all
the apq8064 based board files.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bjorn Andersson [Wed, 21 Dec 2016 11:49:39 +0000 (03:49 -0800)]
ARM: dts: qcom: sd600eval: Enable riva-pil
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bjorn Andersson [Wed, 21 Dec 2016 11:49:38 +0000 (03:49 -0800)]
ARM: dts: qcom: sd600-eval: pm8921_s2 regulator properties
Add the missing properties for pm8921 smps2.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bjorn Andersson [Wed, 21 Dec 2016 11:49:37 +0000 (03:49 -0800)]
ARM: dts: qcom: apq8064-sony-yuga: Enable riva-pil
Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bjorn Andersson [Wed, 21 Dec 2016 11:49:36 +0000 (03:49 -0800)]
ARM: dts: qcom: apq8064: Add riva-pil node
Add nodes for the Riva PIL, IRIS RF module, BT and WiFI services exposed
by the Riva firmware and the related memory reserve.
Also provides pinctrl nodes for devices enabling the riva-pil.
Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Srinivas Kandagatla [Tue, 15 Nov 2016 12:01:52 +0000 (12:01 +0000)]
ARM: dts: apq8064: add support to pm8821
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Stephen Boyd [Thu, 10 Nov 2016 01:13:57 +0000 (17:13 -0800)]
arm: dts: qcom: Fix ipq board clock rates
The ipq board has these rates as 25MHz, and not 19.2 and 27. I
copy/pasted from other boards that have those rates but forgot
to fix the rates here.
Fixes:
30fc4212d541 ("arm: dts: qcom: Add more board clocks")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Stephen Boyd [Thu, 27 Oct 2016 23:23:06 +0000 (16:23 -0700)]
ARM: dts: msm8974: Remove "unused" reserved region
sources for msm8974, this isn't actually a reserved region.
Instead it's marked as "unused" for reserved regions. Let's
remove it so we get back a good chunk of memory.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bjorn Andersson [Tue, 23 Aug 2016 05:57:46 +0000 (22:57 -0700)]
ARM: dts: msm8974: Add ADSP PIL node
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bjorn Andersson [Tue, 23 Aug 2016 05:57:45 +0000 (22:57 -0700)]
ARM: dts: msm8974: Add ADSP smp2p and smd nodes
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bjorn Andersson [Tue, 29 Mar 2016 01:32:36 +0000 (18:32 -0700)]
ARM: dts: qcom: msm8974: Add USB gadget nodes
Add the necessary nodes for USB gadget on MSM8974 and enable these for
Honami.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
David Lechner [Thu, 5 Jan 2017 18:54:19 +0000 (12:54 -0600)]
ARM: dts: da850: Add ti,da830-uart compatible for serial ports
TI DA8xx/OMAPL13x/AM17xx/AM18xx SoCs have extra UART registers beyond
the standard 8250 registers, so we need a new compatible string to
indicate this. Also, at least one of these registers uses the full 32
bits, so we need to specify reg-io-width in addition to reg-shift.
"ns16550a" is left in the compatible specification since it does work
as long as the bootloader configures the SoC UART power management
registers.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Patrice Chotard [Thu, 12 Jan 2017 13:19:39 +0000 (14:19 +0100)]
ARM: dts: STiH407-family: Supply Mailbox properties to delta RProc
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 12 Jan 2017 13:17:35 +0000 (14:17 +0100)]
ARM: dts: STiH407-family: Supply mailbox properties to GP0 RProc
Signed-off-by: Loic Pallardy <loic.pallardy.chotard@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 12 Jan 2017 13:15:21 +0000 (14:15 +0100)]
ARM: dts: STiH407-family: update dmu remoteproc node
Rename dmu_reserved to delta_reserved
Rename st231_dmu to st231_delta
Update the delta_reserved memory region start address
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 12 Jan 2017 13:11:58 +0000 (14:11 +0100)]
ARM: dts: STiH407-family: remove gp1 remoteproc node
This node is unused, remove it
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 12 Jan 2017 11:02:35 +0000 (12:02 +0100)]
ARM: dts: STiH407-family: remove audio remoteproc node
This node is unused, remove it
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 12 Jan 2017 10:59:01 +0000 (11:59 +0100)]
ARM: dts: STiH407-family: update gp0_reserved memory region
Update the start address of gp0_reserved memory region
and enable it
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 6 Jan 2017 13:30:21 +0000 (14:30 +0100)]
ARM: dts: STiH410-family: fix wrong parent clock frequency
The clock parent was lower than child clock which is not correct.
In some use case, it leads to division by zero.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Hugues Fruchet [Mon, 5 Dec 2016 17:11:00 +0000 (18:11 +0100)]
ARM: dts: STiH410: add DELTA dt node
This patch adds DT node for STMicroelectronics
DELTA V4L2 video decoder
Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Patrice Chotard [Thu, 8 Dec 2016 16:04:44 +0000 (17:04 +0100)]
ARM: dts: STiH407-family: disable fdma1 and fdma2
Only fdma0 instance is used for audio, so disable the
2 others instances.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Wed, 7 Dec 2016 09:51:31 +0000 (10:51 +0100)]
ARM: dts: STiH410: add hqvdp node
Enable High Quality Video Data Plane which is
an hardware IP dedicated to video rendering.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Wed, 7 Dec 2016 09:49:51 +0000 (10:49 +0100)]
ARM: dts: STiH410-B2120: enable sti-hda at board level
As sti-hda is only available on STiH410-B2120,
disable it in STiH410.dtsi and enable it at board level.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Marek Szyprowski [Wed, 11 Jan 2017 07:44:28 +0000 (08:44 +0100)]
ARM: dts: exynos: remove Exynos4212 support (dead code)
There are no Exynos4212 based boards in mainline, so there is no need to
keep additional files for SoCs, which are never used. This patch removes
support for Exynos4212 SoCs and moves previously shared Exynos4412
definitions to a single file to simplify future maintenance.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Peter Rosin [Tue, 10 Jan 2017 13:18:33 +0000 (14:18 +0100)]
ARM: dts: at91: add devicetree for the Axentia TSE-850
The Axentia TSE-850 is a SAMA5D3-based device designed to generate
FM subcarrier signals.
Signed-off-by: Peter Rosin <peda@axentia.se>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Wenyou Yang [Mon, 21 Nov 2016 05:14:42 +0000 (13:14 +0800)]
ARM: dts: at91: add dts file for sama5d36ek CMP board
The sama5d36ek CMP board is the variant of sama5d3xek board.
It is equipped with the low-power DDR2 SDRAM, PMIC ACT8865 and
some power rail. Its main purpose is used to measure the power
consumption.
The difference of the sama5d36ek CMP dts from sama5d36ek dts is
listed as below.
1. The USB host nodes are removed, that is, the USB host is disabled.
2. The gpio_keys node is added to wake up from the sleep.
3. The LCD isn't supported due to the pins for LCD are conflicted
with gpio_keys.
4. The adc0 node support the pinctrl sleep state to fix the over
consumption on VDDANA.
As said in errata, "When the USB host ports are used in high speed
mode (EHCI), it is not possible to suspend the ports if no device is
attached on each port. This leads to increased power consumption even
if the system is in a low power mode." That is why the the USB host
is disabled.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Alex [Sun, 4 Dec 2016 14:03:56 +0000 (16:03 +0200)]
ARM: dts: at91: sama5d2: add ssc0 definition
The sama5d2 SoC has Synchronous Serial Controller which provides
synchronous communication link with external devices.
It's generally used in audio and telecom applications such as
I2S, Short Frame Sync, Long Frame Sync.
Signed-off-by: Alex Gershgorin <alex.gershgorin@qcore.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Nicolas Ferre [Thu, 1 Dec 2016 10:49:49 +0000 (11:49 +0100)]
ARM: dts: at91: sama5d2 Xplained: use DMA for UART3
Use DMA for UART3 as we have enough channels and to show how to
specify DMA use with serial nodes.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Nicolas Ferre [Thu, 1 Dec 2016 10:49:48 +0000 (11:49 +0100)]
ARM: dts: at91: sama5d2: move UART3 to DMA1
Now that DMA1 is defined, use it to distribute channel usage among the two
controllers.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Nicolas Ferre [Thu, 1 Dec 2016 10:49:47 +0000 (11:49 +0100)]
ARM: dts: at91: add dma1 definition to sama5d2
The sama5d2 SoC has a second DMA controller and can be used just like DMA0.
By default both DMA controllers are configured as "Secure" in
MATRIX_SPSELR so we can use whichever we want in a "single Secure World"
configuration.
Surprisingly the DMA1 has a lower address than DMA0. To avoid confusion
place it after DMA0 node anyway.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Nicolas Ferre [Wed, 30 Nov 2016 17:36:30 +0000 (18:36 +0100)]
ARM: dts: at91: sama5d4 Xplained: enable UART1 node with DMA
Enable UART1 and use DMA configuration with it.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Nicolas Ferre [Wed, 30 Nov 2016 17:36:29 +0000 (18:36 +0100)]
ARM: dts: at91: sama5d4: change DMA allocation for secure peripherals
Some peripherals are "Programmable Secure" but left as "Secure" by default.
If tried to be connected to Non-Secure DMA controller, the possibility to
leak secure data is prevented so using these peripherals with DMA1 is not
possible with this default configuration (MATRIX_SPSELR registers setup by
bootloader).
Move them to DMA0 which is an "Always-Secure" DMA controller.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Peter Rosin [Thu, 10 Nov 2016 07:46:40 +0000 (08:46 +0100)]
ARM: dts: at91: sama5d3_uart: fix reg sizes to match documentation
The new size (0x100) also matches the size given in sama5d3.dtsi
Documentation reference: section 43.6 "Universal Asynchronous
Receiver Transmitter (UART) User Interface", table 43-4 "Register
Mapping" in [1].
[1] Atmel-11121F-ATARM-SAMA5D3-Series-Datasheet_02-Feb-16
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Joel Stanley [Wed, 4 Jan 2017 06:01:28 +0000 (17:01 +1100)]
ARM: dts: aspeed: Add Romulus BMC platform
Romulus is an OpenPower machine with an ast2500 BMC. It has NCSI
networking and 512MB of RAM.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Joel Stanley [Wed, 4 Jan 2017 05:30:34 +0000 (16:30 +1100)]
ARM: dts: aspeed: Add ftgmac100 to g4 and g5 platforms
Signed-off-by: Joel Stanley <joel@jms.id.au>
Cyril Bur [Tue, 13 Dec 2016 03:39:38 +0000 (14:39 +1100)]
ARM: dts: aspeed: Correct palmetto device tree
Palmettos have 512MB of memory as opposed to the previously thought
256MB. Update the device trees accordingly.
We run the uart at 115200.
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Cyril Bur [Tue, 13 Dec 2016 04:14:15 +0000 (15:14 +1100)]
ARM: dts: aspeed: Reserve framebuffer memory
When used as a BMC, the host expects to be able to use 16MB of
framebuffer memory at the top of RAM.
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Andrew Jeffery [Tue, 6 Dec 2016 03:53:48 +0000 (14:53 +1100)]
ARM: dts: aspeed-g5: Add gpio controller to devicetree
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Andrew Jeffery [Tue, 6 Dec 2016 03:53:47 +0000 (14:53 +1100)]
ARM: dts: aspeed-g5: Add syscon and pin controller nodes
The pin controller's child nodes expose the functions currently
implemented in the g5 pin controller driver.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Andrew Jeffery [Tue, 6 Dec 2016 03:53:46 +0000 (14:53 +1100)]
ARM: dts: aspeed-g5: Add LPC Controller node
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Andrew Jeffery [Tue, 6 Dec 2016 03:53:45 +0000 (14:53 +1100)]
ARM: dts: aspeed-g5: Add SoC Display Controller node
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Andrew Jeffery [Tue, 6 Dec 2016 03:53:44 +0000 (14:53 +1100)]
ARM: dts: aspeed-g4: Add gpio controller to devicetree
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>