GitHub/moto-9609/android_kernel_motorola_exynos9610.git
10 years agoMIPS: Kill CONFIG_MTD_PARTITIONS
Eunbong Song [Wed, 27 Nov 2013 00:29:16 +0000 (00:29 +0000)]
MIPS: Kill CONFIG_MTD_PARTITIONS

This patch removes CONFIG_MTD_PARTITIONS in config files for MIPS.
 Because CONFIG_MTD_PARTITIONS was removed by commit 6a8a98b22b10f1560d5f90aded4a54234b9b2724.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6162/
Signed-off-by: Eunbong Song <eunb.song@samsung.com>
10 years agoMIPS: replace open-coded init_dsp
Paul Burton [Tue, 19 Nov 2013 17:30:38 +0000 (17:30 +0000)]
MIPS: replace open-coded init_dsp

There is already an init_dsp function which checks cpu_has_dsp & calls
__init_dsp if it does. Make use of it instead of duplicating the same
code.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6148/

10 years agoMIPS: clean up resume declaration
Paul Burton [Tue, 19 Nov 2013 17:30:37 +0000 (17:30 +0000)]
MIPS: clean up resume declaration

This patch cleans up the declaration of the resume function by replacing
void pointers with their correct types. The irrelevant & incorrect
comment preceeding the resume function is replaced by one documenting
its function.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6146/

10 years agoMIPS: qi_lb60: add defconfig for Ben NanoNote
Apelete Seketeli [Wed, 18 Dec 2013 21:36:59 +0000 (22:36 +0100)]
MIPS: qi_lb60: add defconfig for Ben NanoNote

Add defconfig for the Ben NanoNote handheld computer which is built
around QI_LB60 board and Ingenic JZ4740 MIPS SoC.

Signed-off-by: Apelete Seketeli <apelete@seketeli.net>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6257/

10 years agobcma: gpio: add own IRQ domain
Rafał Miłecki [Thu, 12 Dec 2013 12:46:03 +0000 (13:46 +0100)]
bcma: gpio: add own IRQ domain

Input GPIO changes can generate interrupts, but we need kind of ACK for
them by changing IRQ polarity. This is required to stop hardware from
keep generating interrupts and generate another one on the next GPIO
state change.
This code allows using GPIOs with standard interrupts and add for
example GPIO buttons support.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6216/

10 years agoMIPS: include linux/types.h
Qais Yousef [Mon, 9 Dec 2013 09:49:45 +0000 (09:49 +0000)]
MIPS: include linux/types.h

The file uses u16 type but doesn't include its definition explicitly

I was getting this error when including this header in my driver:

  arch/mips/include/asm/mipsregs.h:644:33: error: unknown type name ‘u16’

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
Reviewed-by: Steven J. Hill <Steven.Hill@imgtec.com>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6212/

10 years agoMIPS: sead3: use unflatten_and_copy_device_tree()
Qais Yousef [Fri, 6 Dec 2013 11:00:45 +0000 (11:00 +0000)]
MIPS: sead3: use unflatten_and_copy_device_tree()

we want the device tree to be unflattened into non init memory so it can be
accessed later by, for example, a probing function of a driver module.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6210/

10 years agoMIPS: sead3: populate platform devices from device tree
Qais Yousef [Fri, 6 Dec 2013 11:00:44 +0000 (11:00 +0000)]
MIPS: sead3: populate platform devices from device tree

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6209/

10 years agoMIPS: sead3: remove chosen node
Qais Yousef [Fri, 6 Dec 2013 11:00:43 +0000 (11:00 +0000)]
MIPS: sead3: remove chosen node

The defaults are not always applicable and it makes it hard for the bootloader
to override them. By removing it we give the bootloader full control over what
command line parameters to pass.

Without this change we will need to modify the built-in dtb to add bootloader
cmd line parameters or do some work to append them after we unflatten the device
tree.

Sead3 is a development board, that's why we want to be able to change boot
parameters on the fly from the bootloader.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6208/

10 years agoMIPS: sead3: allow cmdline/env to change memory size using memsize param
Qais Yousef [Fri, 6 Dec 2013 11:00:42 +0000 (11:00 +0000)]
MIPS: sead3: allow cmdline/env to change memory size using memsize param

if the user sets memsize parameter in commandline or bootloader
environment, we use it to modify the built-in dtb memory size

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6207/

10 years agoMIPS: BCM63XX: use linux/serial_bcm63xx.h
Florian Fainelli [Fri, 6 Dec 2013 02:26:08 +0000 (18:26 -0800)]
MIPS: BCM63XX: use linux/serial_bcm63xx.h

Update the early_printk code to include linux/serial_bcm63xx.h which
provides the definitions for the UART block registers. While at it,
remove the inclusion of serial_bcm63xx.h which was just there to allow
smooth transition.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6203/

10 years agotty: serial: bcm63xx_uart: use linux/serial_bcm63xx.h
Florian Fainelli [Fri, 6 Dec 2013 02:26:07 +0000 (18:26 -0800)]
tty: serial: bcm63xx_uart: use linux/serial_bcm63xx.h

Now that the UART block defines have been moved to a separate file,
include that one and do not longer rely on the MIPS-specific
bcm63xx_regs.h header file.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6204/

10 years agoMIPS: BCM63XX: move UART register definitions
Florian Fainelli [Fri, 6 Dec 2013 02:26:06 +0000 (18:26 -0800)]
MIPS: BCM63XX: move UART register definitions

Move the BCM63XX UART driver definitions to
include/linux/serial_bcm63xx.h such that we do not rely on the MIPS
BCM63XX code to provide these for us.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6202/

10 years agotty: serial: bcm63xx_uart: drop bcm_{readl,writel} macros
Florian Fainelli [Fri, 6 Dec 2013 02:26:05 +0000 (18:26 -0800)]
tty: serial: bcm63xx_uart: drop bcm_{readl,writel} macros

bcm_{readl,writel} macros expand to __raw_{readl,writel}, use these
directly such that we do not rely on the platform to provide these for
us. As a result, we no longer use bcm63xx_io.h, so remove that inclusion
too.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6201/

10 years agotty: serial: bcm63xx_uart: remove unused inclusion
Florian Fainelli [Fri, 6 Dec 2013 02:26:04 +0000 (18:26 -0800)]
tty: serial: bcm63xx_uart: remove unused inclusion

bcm63xx_irqs.h is included but we are not using anything from it, drop
that include.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6205/

10 years agoMIPS: microMIPS: Remove unsupported compiler flag.
Steven J. Hill [Thu, 5 Dec 2013 17:37:49 +0000 (11:37 -0600)]
MIPS: microMIPS: Remove unsupported compiler flag.

Remove usage of -mno-jals compiler flag when building a pure
microMIPS kernel. The -mno-jals flag only ever existed within
Mentor toolchains. Dropping this flag allows all FSF toolchains
to work.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6200/

10 years agoMIPS: OCTEON: Supply OCTEON+ USB nodes in internal device trees.
David Daney [Tue, 3 Dec 2013 19:46:51 +0000 (11:46 -0800)]
MIPS: OCTEON: Supply OCTEON+ USB nodes in internal device trees.

This will be needed by the next patch to use said nodes for probing
via the device tree.

Signed-off-by: David Daney <david.daney@cavium.com>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6185/

10 years agoMIPS: Malta: use generic 8250 early console
Paul Burton [Mon, 2 Dec 2013 16:48:38 +0000 (16:48 +0000)]
MIPS: Malta: use generic 8250 early console

This patch switches Malta from using the MIPS implementation of early
printk with Malta's prom_putchar to using the generic 8250_early
implementation. This offers a couple of advantages:

  - We duplicate less generic code.

  - The UART can be initialised rather than being reliant upon
    inheriting a valid setup from the bootloader.

The Malta console_config function is extended to initialise the early
console if no earlycon= kernel parameter is provided, inheriting the
modetty0 bootloader environment if present and falling back to a
default 38400n8r setup if not. This matches the behaviour used for the
regular console= parameter.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6183/

10 years agoMIPS: Malta: mux & enable SERIRQ interrupt
Paul Burton [Mon, 2 Dec 2013 16:48:37 +0000 (16:48 +0000)]
MIPS: Malta: mux & enable SERIRQ interrupt

This patch causes the kernel to mux the SERIRQ interrupt to the SERIRQ
pin of the PIIX4 and to enable that interrupt. The kernel depends upon
the interrupt when using the SuperIO UARTs (ttyS0 & ttyS1) but
previously would not configure it, instead relying upon the bootloader
having done so. If that is not the case then the typical result is that
the system appears to hang once it reaches userland as no output is
displayed on the UART.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6182/

10 years agoMIPS: Malta: initialise the RTC at boot
Paul Burton [Mon, 2 Dec 2013 16:48:36 +0000 (16:48 +0000)]
MIPS: Malta: initialise the RTC at boot

The RTC is used on Malta to estimate the clock frequency of the CPU &
optionally the GIC. However the kernel previously did not initialise the
RTC, instead relying upon the bootloader having done so. In order to
minimise dependencies which the kernel has upon the bootloader this
patch causes the kernel to initialise the RTC itself prior to making use
of it.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6184/

10 years agoMIPS: sead3: remove unused cpu_khz variable
Paul Burton [Fri, 29 Nov 2013 17:07:14 +0000 (17:07 +0000)]
MIPS: sead3: remove unused cpu_khz variable

This variable seems to have been copied from Malta when SEAD3 support
was introduced, but is likewise unused. Remove it.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6172/

10 years agoMIPS: Malta: remove unused cpu_khz variable
Paul Burton [Fri, 29 Nov 2013 17:07:13 +0000 (17:07 +0000)]
MIPS: Malta: remove unused cpu_khz variable

This variable was introduced by commit 96348c8f (of Ralf's historic
Linux/MIPS repository) "Remaining fixes for MIPS's eval boards." but
I don't see any use of it either then or now. Remove it.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Markos Chandras <markos.chandras@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6171/

10 years agoMIPS: cavium-octeon: export symbols needed by octeon-ethernet
Aaro Koskinen [Wed, 27 Nov 2013 22:11:44 +0000 (00:11 +0200)]
MIPS: cavium-octeon: export symbols needed by octeon-ethernet

Export symbols needed by the octeon-ethernet driver. The patch fixes a
build failure with CONFIG_OCTEON_ETHERNET=m.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6166/

10 years agoMIPS: Fix build error seen in some configurations
Guenter Roeck [Mon, 25 Nov 2013 23:21:00 +0000 (15:21 -0800)]
MIPS: Fix build error seen in some configurations

The following build error is seen if CONFIG_32BIT is undefined,
CONFIG_64BIT is defined, and CONFIG_MIPS32_O32 is undefined.

asm/syscall.h: In function 'mips_get_syscall_arg':
arch/mips/include/asm/syscall.h:32:16: error: unused variable 'usp' [-Werror=unused-variable]
cc1: all warnings being treated as errors

Fixes: c0ff3c53d4f9 ('MIPS: Enable HAVE_ARCH_TRACEHOOK')
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6160/

10 years agoMIPS: cavium-octeon: fix early boot hang on EBH5600 board
Aaro Koskinen [Fri, 1 Nov 2013 15:06:04 +0000 (17:06 +0200)]
MIPS: cavium-octeon: fix early boot hang on EBH5600 board

The boot hangs early on EBH5600 board when octeon_fdt_pip_iface() is
trying enumerate a non-existant interface. The actual hang happens in
cvmx_helper_interface_get_mode():

mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));

when interface == 4. We can avoid this situation by first checking that
the interface exists in the DTB.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6101/

10 years agoMIPS: cavium-octeon: fix out-of-bounds array access
Aaro Koskinen [Fri, 1 Nov 2013 15:06:03 +0000 (17:06 +0200)]
MIPS: cavium-octeon: fix out-of-bounds array access

When booting with in-kernel DTBs, the pruning code will enumerate
interfaces 0-4. However, there is memory reserved only for 4 so some
other data will get overwritten by cvmx_helper_interface_enumerate().

Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6102/

10 years agoMIPS: JZ4740: reuse UART0 address macro for vmlinuz debug port
Antony Pavlov [Sat, 28 Sep 2013 15:49:34 +0000 (19:49 +0400)]
MIPS: JZ4740: reuse UART0 address macro for vmlinuz debug port

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5927/

10 years agoMIPS: improve checks for noncoherent DMA
Felix Fietkau [Fri, 27 Sep 2013 12:41:44 +0000 (14:41 +0200)]
MIPS: improve checks for noncoherent DMA

Only one MIPS development board actually supports enabling/disabling DMA
coherency at runtime, so it's not a good idea to push the overhead of
checking that configuration setting onto every other supported target as
well.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5912/

10 years agoMIPS: APRP: Code formatting clean-ups.
Steven J. Hill [Wed, 1 Jan 2014 15:35:32 +0000 (16:35 +0100)]
MIPS: APRP: Code formatting clean-ups.

Clean-up code according to the 'checkpatch.pl' script.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/6097/
Reviewed-by: John Crispin <blogic@openwrt.org>
10 years agoMIPS: APRP: Add support for Malta CMP platform.
Deng-Cheng Zhu [Wed, 30 Oct 2013 20:52:10 +0000 (15:52 -0500)]
MIPS: APRP: Add support for Malta CMP platform.

Malta with multi-core CM platforms can now use APRP functionality.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6096/

10 years agoMIPS: APRP: Add RTLX API support for CMP platforms.
Deng-Cheng Zhu [Wed, 1 Jan 2014 15:29:03 +0000 (16:29 +0100)]
MIPS: APRP: Add RTLX API support for CMP platforms.

This patch adds RTLX API support for platforms having a CMP.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/6095/
Reviewed-by: John Crispin <blogic@openwrt.org>
10 years agoMIPS: APRP: Split RTLX support into separate files.
Deng-Cheng Zhu [Wed, 1 Jan 2014 15:26:46 +0000 (16:26 +0100)]
MIPS: APRP: Split RTLX support into separate files.

Split the RTLX functionality in preparation for adding support for CMP
platforms. Common functions remain in the original file and a new file
contains code specific to platforms that do not have a CMP.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/6093/
Reviewed-by: John Crispin <blogic@openwrt.org>
10 years agoMIPS: APRP: Add VPE loader support for CMP platforms.
Deng-Cheng Zhu [Wed, 30 Oct 2013 20:52:07 +0000 (15:52 -0500)]
MIPS: APRP: Add VPE loader support for CMP platforms.

This patch adds VPE loader support for platforms having a CMP.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6092/

10 years agoMIPS: APRP: Split VPE loader into separate files.
Deng-Cheng Zhu [Wed, 30 Oct 2013 20:52:06 +0000 (15:52 -0500)]
MIPS: APRP: Split VPE loader into separate files.

Split the VPE functionality in preparation for adding support
for CMP platforms. Common functions remain in the original file
and a new file contains code specific to platforms that do not
have a CMP present.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Reviewed-by: Qais Yousef <Qais.Yousef@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6094/

10 years agoMIPS: Clean up MIPS MT and CMP configuration options.
Steven J. Hill [Fri, 4 Oct 2013 21:23:28 +0000 (16:23 -0500)]
MIPS: Clean up MIPS MT and CMP configuration options.

This patch accomplishes the following:

  * Clean up wording on all MIPS MT configuration menu items.
  * Simplify and neaten up options selected by MIPS_MT_SMP.
  * Make MIPS_MT_SMTC support as deprecated.
  * Make MIPS_CMP support to depend on MIPS_MT_SMP also.
  * Remove redundant options selected by MIPS_CMP.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6019/

10 years agoMIPS: kernel: cpu-probe: Add support for probing interAptiv cores
Leonid Yegoshin [Wed, 20 Nov 2013 10:46:02 +0000 (10:46 +0000)]
MIPS: kernel: cpu-probe: Add support for probing interAptiv cores

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6152/

10 years agoMIPS: Add support for interAptiv cores
Leonid Yegoshin [Wed, 27 Nov 2013 10:07:53 +0000 (10:07 +0000)]
MIPS: Add support for interAptiv cores

The interAptiv is a power-efficient multi-core microprocessor
for use in system-on-chip (SoC) applications. The interAptiv combines
a multi-threading pipeline with a coherence manager to deliver improved
computational throughput and power efficiency. The interAptiv can
contain one to four MIPS32R3 interAptiv cores, system level
coherence manager with L2 cache, optional coherent I/O port,
and optional floating point unit.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6163/

10 years agoMIPS: Add processor identifiers for the interAptiv processors
Leonid Yegoshin [Wed, 20 Nov 2013 10:46:00 +0000 (10:46 +0000)]
MIPS: Add processor identifiers for the interAptiv processors

Add processor identifiers for UP and MT interAptiv processors.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6151/

10 years agoMIPS: Add debugfs file to print the segmentation control registers
Steven J. Hill [Thu, 14 Nov 2013 16:12:32 +0000 (16:12 +0000)]
MIPS: Add debugfs file to print the segmentation control registers

Add a new mips/segments debugfs file to print the 6 segmentation
control registers for supported cores. A sample from a proAptiv core
is given below:

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6137/
Segment   Virtual    Size   Access Mode   Physical   Caching   EU
-------   -------    ----   -----------   --------   -------   --
   0      e0000000   512M      MK           UND         U       0
   1      c0000000   512M      MSK          UND         U       0
   2      a0000000   512M      UK           000         2       0
   3      80000000   512M      UK           000         3       0
   4      40000000    1G       MUSK         UND         U       1
   5      00000000    1G       MUSK         UND         U       1

Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
10 years agoMIPS: Add support for FTLBs
Leonid Yegoshin [Thu, 14 Nov 2013 16:12:31 +0000 (16:12 +0000)]
MIPS: Add support for FTLBs

The Fixed Page Size TLB (FTLB) is a set-associative dual entry TLB. Its
purpose is to reduce the number of TLB misses by increasing the effective
TLB size and keep the implementation complexity to minimum levels.
A supported core can have both VTLB and FTLB.

Reviewed-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6139/

10 years agoMIPS: mm: Use the TLBINVF instruction to flush the VTLB
Leonid Yegoshin [Thu, 14 Nov 2013 16:12:30 +0000 (16:12 +0000)]
MIPS: mm: Use the TLBINVF instruction to flush the VTLB

The TLBINVF instruction can be used to flush the entire VTLB.
This eliminates the need for the TLBWI loop and improves performance.

Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6138/

10 years agoMIPS: Add function for flushing the TLB using the TLBINV instruction
Leonid Yegoshin [Thu, 14 Nov 2013 16:12:29 +0000 (16:12 +0000)]
MIPS: Add function for flushing the TLB using the TLBINV instruction

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6136/

10 years agoMIPS: kernel: cpu-probe: Add support for probing proAptiv cores
Leonid Yegoshin [Thu, 14 Nov 2013 16:12:28 +0000 (16:12 +0000)]
MIPS: kernel: cpu-probe: Add support for probing proAptiv cores

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6135/

10 years agoMIPS: Add support for the proAptiv cores
Leonid Yegoshin [Thu, 14 Nov 2013 16:12:27 +0000 (16:12 +0000)]
MIPS: Add support for the proAptiv cores

The proAptiv Multiprocessing System is a power efficient multi-core
microprocessor for use in system-on-chip (SoC) applications.
The proAptiv Multiprocessing System combines a deep pipeline
with multi-issue out of order execution for improved computational
throughput. The proAptiv Multiprocessing System can contain one to
six MIPS32r3 proAptiv cores, system level coherence
manager with L2 cache, optional coherent I/O port, and optional
floating point unit.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6134/

10 years agoMIPS: Add processor identifiers for the proAptiv processors
Leonid Yegoshin [Thu, 14 Nov 2013 16:12:26 +0000 (16:12 +0000)]
MIPS: Add processor identifiers for the proAptiv processors

Add processor identifiers for single core and multi-core
proAptiv processors.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6133/

10 years agoMIPS: tlb: Set the EHINV bit for TLBINVF cores when invalidating the TLB
Leonid Yegoshin [Thu, 14 Nov 2013 16:12:25 +0000 (16:12 +0000)]
MIPS: tlb: Set the EHINV bit for TLBINVF cores when invalidating the TLB

For MIPS32R3 supported cores, the EHINV bit needs to be set when
invalidating the TLB. This is necessary because the legacy software
method of representing an invalid TLB entry using an unmapped address
value is not guaranteed to work.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6132/

10 years agoMIPS: features: Add initial support for Segmentation Control registers
Steven J. Hill [Thu, 14 Nov 2013 16:12:24 +0000 (16:12 +0000)]
MIPS: features: Add initial support for Segmentation Control registers

MIPS32R3 introduced a new set of Segmentation Control registers which
increase the flexibility of the segmented-based memory scheme.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6131/

10 years agoMIPS: features: Add initial support for TLBINVF capable cores
Leonid Yegoshin [Thu, 14 Nov 2013 16:12:23 +0000 (16:12 +0000)]
MIPS: features: Add initial support for TLBINVF capable cores

New Aptiv cores support the TLBINVF instruction for flushing
the VTLB.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6130/

10 years agoMIPS: mm: Move UNIQUE_ENTRYHI macro to a header file
Markos Chandras [Thu, 14 Nov 2013 16:12:22 +0000 (16:12 +0000)]
MIPS: mm: Move UNIQUE_ENTRYHI macro to a header file

The UNIQUE_ENTRYHI definition was duplicated whenever there
was the need to flush the TLB entries. We move this common
definition to a header file.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6129/

10 years agoMIPS: Add missing bits for Config registers
Leonid Yegoshin [Thu, 14 Nov 2013 16:12:21 +0000 (16:12 +0000)]
MIPS: Add missing bits for Config registers

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6128/

10 years agoMIPS: MT: proc: Add support for printing VPE and TC ids
Markos Chandras [Tue, 15 Oct 2013 14:13:02 +0000 (15:13 +0100)]
MIPS: MT: proc: Add support for printing VPE and TC ids

Add support for including VPE and TC ids in /proc/cpuinfo output as
appropriate when MT/SMTC is enabled.

Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6065/

10 years agoMIPS: Malta: Remove ttyS2 serial for CMP platforms
Leonid Yegoshin [Mon, 14 Oct 2013 08:49:25 +0000 (09:49 +0100)]
MIPS: Malta: Remove ttyS2 serial for CMP platforms

Commit 225ae5fd9a320e22841410049c3bdb6cf14a5841
"MIPS: Malta: Fix interupt number of CBUS UART"

fixed the IRQ number for the ttyS2 CBUS UART. However, this now
conflicts with the GIC IPI1 interrupt in CMP platforms. The Malta
interrupt code arbitrarily binds IPIs to INT2 and INT3 and since
ttyS2 uses the INT2 IRQ line, closing the device disables the
INT2 interrupt and this effectively disables the IPI1 interrupt
as well. This patch is mainly a workaround until the Malta code
is fixed properly.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6045/

10 years agoMIPS: Add printing of ES bit for Imgtec cores when cache error occurs.
Leonid Yegoshin [Thu, 10 Oct 2013 08:58:59 +0000 (09:58 +0100)]
MIPS: Add printing of ES bit for Imgtec cores when cache error occurs.

The cacheer register is always implemented in the same way in the
MIPS32r2 Imgtec cores so print the ES bit when an cache error
occurs.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6041/

10 years agoMIPS: GIC: Send IPIs using the GIC
Steven J. Hill [Wed, 9 Oct 2013 15:47:23 +0000 (16:47 +0100)]
MIPS: GIC: Send IPIs using the GIC

If GIC is present, then use it to send IPIs between the cores.
Using GIC for IPIs is simpler and is usable for multicore
systems compared to the existing way of doing IPIs where all VPEs
had to be disabled for another VPE to access the Cause register
in one of the TCs and enable all the VPEs back.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6040/

10 years agoMIPS: MT: Mark existing TCs as present
Markos Chandras [Wed, 9 Oct 2013 15:16:25 +0000 (16:16 +0100)]
MIPS: MT: Mark existing TCs as present

According to Documentation/cpu-hotplug.txt, the cpu_present_mask should
contain all the CPUs which are present in the system. Therefore, all the TCs
currently present in the system should be marked as 'present' even if they
will never be brought online.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6039/

10 years agoMIPS: mm: c-r4k: Panic if IL or DL fields have a reserved value
Markos Chandras [Thu, 19 Sep 2013 17:18:41 +0000 (18:18 +0100)]
MIPS: mm: c-r4k: Panic if IL or DL fields have a reserved value

According to MIPS32 and MIPS64 PRA documents,
a value of 7 in IL and DL fields is marked as "Reserved"
so panic if the core uses this value in the config1 register.
Also simplify the code a little bit.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5861/

10 years agoMIPS: kernel: smp-cmp: MIPS MT code needs CONFIG_MIPS_MT
Markos Chandras [Thu, 19 Sep 2013 17:00:29 +0000 (18:00 +0100)]
MIPS: kernel: smp-cmp: MIPS MT code needs CONFIG_MIPS_MT

The mips_mt_* symbols are only built and exported if
CONFIG_MIPS_MT is enabled.

Fixes the following build problem when CONFIG_SMP is enabled
but CONFIG_MIPS_MT is not.

arch/mips/built-in.o: In function `cmp_prepare_cpus':
arch/mips/kernel/smp-cmp.c:197:
undefined reference to `mips_mt_set_cpuoptions'

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5860/

10 years agoMIPS: BCM47XX: Fix some very confused types and data corruption
Ilia Mirkin [Fri, 6 Dec 2013 23:56:53 +0000 (18:56 -0500)]
MIPS: BCM47XX: Fix some very confused types and data corruption

Fix nvram_read_alpha2 copying too many bytes over the ssb_sprom
structure. Also fix the arguments of the read_macaddr, although the code
was technically not wrong before due to an extra dereference.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6211/

10 years agoMIPS: BCM47XX: add vectored interrupt support
Hauke Mehrtens [Sun, 22 Dec 2013 13:36:32 +0000 (14:36 +0100)]
MIPS: BCM47XX: add vectored interrupt support

This adds support for vectored interrupt which is supported by the SoC
using a MIPS 74K CPU like the BCM4716 and BCM4706.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6290/

10 years agoMIPS: BCM47XX: add cpu-feature-overrides.h
Hauke Mehrtens [Sun, 22 Dec 2013 13:36:31 +0000 (14:36 +0100)]
MIPS: BCM47XX: add cpu-feature-overrides.h

The BCM47XX SoC code missed a cpu-feature-overrides.h header file, this
patch adds it. This code supports a long line of SoCs with different
features so for some features we still have to rely on the runtime
detection.

This was crated by checking the features of a BCM4712, BCM4704,
BCM5354, BCM4716 and BCM4706 SoC and then tested on these SoCs. There
are some SoCs missing but I hope they do not have any more or less
features.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6289/

10 years agoMIPS: BCM47XX: move constant array from stack
Hauke Mehrtens [Sun, 13 Oct 2013 20:56:50 +0000 (22:56 +0200)]
MIPS: BCM47XX: move constant array from stack

Move the possible nvram sizes from the stack into the data segment

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6044/

10 years agoMIPS: BCM47XX: add asmlinkage to plat_irq_dispatch()
Hauke Mehrtens [Sun, 13 Oct 2013 20:55:58 +0000 (22:55 +0200)]
MIPS: BCM47XX: add asmlinkage to plat_irq_dispatch()

plat_irq_dispatch() is called from asm code, add asmlinkage.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6043/

10 years agoMIPS: BCM47XX: update defconfig
Hauke Mehrtens [Sat, 28 Sep 2013 22:15:48 +0000 (00:15 +0200)]
MIPS: BCM47XX: update defconfig

The defconfig for bcm47xx contained lots of driver which are not
special for these SoCs and missed on the other side some some drivers
for parts essential for these SoC and only found on here. The flash,
usb and some Ethernet driver were missing.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5930/

10 years agoMIPS: BCM47XX: add EARLY_PRINTK_8250 support
Hauke Mehrtens [Tue, 24 Sep 2013 22:36:56 +0000 (00:36 +0200)]
MIPS: BCM47XX: add EARLY_PRINTK_8250 support

The BCM47xx SoCs have a 8250 serial compatible console at address
0x18000300 and an other at 0x18000400. On most devices 0x18000300 is
wired to some pins on the board, we should use that.
This is the smae for the AI (bcma) and the SB (ssb) bus, this is some
offset on the chip common core.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5889/

10 years agoMIPS: BCM47XX: Remove CFE support
Hauke Mehrtens [Tue, 24 Sep 2013 22:36:55 +0000 (00:36 +0200)]
MIPS: BCM47XX: Remove CFE support

bcm47xx only uses the CFE code for early print to a console, but that
is also possible with a early print serial 8250 driver.

The CFE api init causes hangs somewhere in prom_init_cfe() on some
devices like the Buffalo WHR-HP-G54 and the Asus WL-520GU.
This was reported in https://dev.openwrt.org/ticket/4061 and
https://forum.openwrt.org/viewtopic.php?id=17063

This will remove all the CFE handling code from bcm47xx.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5888/

10 years agoMIPS: BCM47XX: only print SoC name in system type in cpuinfo
Hauke Mehrtens [Thu, 19 Sep 2013 21:40:09 +0000 (23:40 +0200)]
MIPS: BCM47XX: only print SoC name in system type in cpuinfo

Recently the output of "system type" in  /proc/cpuinfo was changed to
Broadcom BCM4730 (Some sample board), but it is better to just print
the SoC name in the "system type" entry. The board name will be added
in the machine entry later.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5865/

10 years agoMIPS: BCM63XX: drop SYS_HAS_CPU_MIPS32R1
Jonas Gorski [Wed, 18 Dec 2013 13:12:11 +0000 (14:12 +0100)]
MIPS: BCM63XX: drop SYS_HAS_CPU_MIPS32R1

All MIPS cores on BCM63XX identify as Broadcom, not MIPS, so no need
to support non-broadcom MIPS CPUs. This also ensures that CPU_BMIPS
is always selected.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6246/

10 years agoMIPS: cpu-type: guard BMIPS variants with SYS_HAS_CPU_BMIPS*
Jonas Gorski [Wed, 18 Dec 2013 13:12:10 +0000 (14:12 +0100)]
MIPS: cpu-type: guard BMIPS variants with SYS_HAS_CPU_BMIPS*

BMIPS32 and  BMIPS3300 also need to be available for MIPS32R1, as
bcm47xx might not select BMIPS.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6245/

10 years agoMIPS: BCM47XX: select BMIPS CPUs for BCM47XX_SSB
Jonas Gorski [Wed, 18 Dec 2013 13:12:09 +0000 (14:12 +0100)]
MIPS: BCM47XX: select BMIPS CPUs for BCM47XX_SSB

Let BCM47XX_SSB select the appropriate BMIPS CPUs enountered on those
systems.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6244/

10 years agoMIPS: BCM63XX: let the individual SoCs select the appropriate CPUs
Jonas Gorski [Wed, 18 Dec 2013 13:12:08 +0000 (14:12 +0100)]
MIPS: BCM63XX: let the individual SoCs select the appropriate CPUs

Let each supported chip select the appropirate SYS_HAS_CPU_BMIPS*
option for its embedded processor, so support will be conditionally
included.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6250/

10 years agoMIPS: BCM63XX: always register bmips smp ops
Jonas Gorski [Wed, 18 Dec 2013 13:12:07 +0000 (14:12 +0100)]
MIPS: BCM63XX: always register bmips smp ops

Use the return value for guarding further SMP setup.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6249/

10 years agoMIPS: BMIPS: add a smp ops registration helper
Jonas Gorski [Wed, 18 Dec 2013 13:12:06 +0000 (14:12 +0100)]
MIPS: BMIPS: add a smp ops registration helper

Add a helper similar to the generic register_XXX_smp_ops() for bmips.
Register SMP UP ops in case of BMIPS32/3300.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6248/

10 years agoMIPS: BMIPS: extend BMIPS3300 to include BMIPS32
Jonas Gorski [Wed, 18 Dec 2013 13:12:05 +0000 (14:12 +0100)]
MIPS: BMIPS: extend BMIPS3300 to include BMIPS32

Codewise there is no difference between these two, so it does not make
sense to treat them differently. Also chip families having one of these
tend to have the other.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6247/

10 years agoMIPS: BMIPS: select CPU_HAS_PREFETCH
Jonas Gorski [Wed, 18 Dec 2013 13:12:04 +0000 (14:12 +0100)]
MIPS: BMIPS: select CPU_HAS_PREFETCH

As they are MIPS32 CPUs they do support the prefetch opcode.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6243/

10 years agoMIPS: BMIPS: select CPU_SUPPORTS_HIGHMEM
Jonas Gorski [Wed, 18 Dec 2013 13:12:03 +0000 (14:12 +0100)]
MIPS: BMIPS: select CPU_SUPPORTS_HIGHMEM

All BMIPS CPUs support HIGHMEM, so it should be selected by CPU_BMIPS.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6242/

10 years agoMIPS: BMIPS: merge CPU options into one option
Jonas Gorski [Wed, 18 Dec 2013 13:12:02 +0000 (14:12 +0100)]
MIPS: BMIPS: merge CPU options into one option

Instead of treating each flavour as an exclusive CPU to select, make
BMIPS the only option and let SYS_HAS_CPU_BMIPS* decide for which
flavours to include support.

Run tested on BMIPS3300 and BMIPS4350, only build tested for BMIPS4380
and BMIPS5000.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6240/

10 years agoMIPS: BMIPS: change compile time checks to runtime checks
Jonas Gorski [Wed, 18 Dec 2013 13:12:01 +0000 (14:12 +0100)]
MIPS: BMIPS: change compile time checks to runtime checks

Allow building for all bmips cpus at the same time by changing ifdefs
to checks for the cpu type, or adding appropriate checks to the
assembly.

Since BMIPS43XX and BMIPS5000 require different IPI implementations,
split the SMP ops into one for each, so the runtime overhead is only
at registration time for them.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6241/

10 years agoMIPS: allow asm/cpu.h to be included from assembly
Jonas Gorski [Wed, 18 Dec 2013 13:12:00 +0000 (14:12 +0100)]
MIPS: allow asm/cpu.h to be included from assembly

Add guards around the enum to allow including cpu.h from assembly.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6238/

10 years agoMIPS: BCM63XX: disable SMP also on BCM3368
Jonas Gorski [Wed, 18 Dec 2013 13:11:59 +0000 (14:11 +0100)]
MIPS: BCM63XX: disable SMP also on BCM3368

BCM3368 has the same shared TLB as BCM6358.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6239/

10 years agoMIPS: BCM63XX: add HSSPI platform device and register it
Jonas Gorski [Sat, 30 Nov 2013 11:42:05 +0000 (12:42 +0100)]
MIPS: BCM63XX: add HSSPI platform device and register it

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6180/

10 years agoMIPS: BCM63XX: add HSSPI IRQ and register offsets
Jonas Gorski [Sat, 30 Nov 2013 11:42:04 +0000 (12:42 +0100)]
MIPS: BCM63XX: add HSSPI IRQ and register offsets

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6179/

10 years agoMIPS: BCM63XX: setup the HSSPI clock rate
Jonas Gorski [Sat, 30 Nov 2013 11:42:03 +0000 (12:42 +0100)]
MIPS: BCM63XX: setup the HSSPI clock rate

Properly set up the HSSPI clock rate depending on the SoC's PLL rate.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6177/

10 years agoMIPS: BCM63XX: expose the HSSPI clock
Jonas Gorski [Sat, 30 Nov 2013 11:42:02 +0000 (12:42 +0100)]
MIPS: BCM63XX: expose the HSSPI clock

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/6178/

10 years agoMIPS: Support for 64-bit FP with O32 binaries
Paul Burton [Fri, 22 Nov 2013 13:12:07 +0000 (13:12 +0000)]
MIPS: Support for 64-bit FP with O32 binaries

CPUs implementing MIPS32 R2 may include a 64-bit FPU, just as MIPS64 CPUs
do. In order to preserve backwards compatibility a 64-bit FPU will act
like a 32-bit FPU (by accessing doubles from the least significant 32
bits of an even-odd pair of FP registers) when the Status.FR bit is
zero, again just like a mips64 CPU. The standard O32 ABI is defined
expecting a 32-bit FPU, however recent toolchains support use of a
64-bit FPU from an O32 MIPS32 executable. When an ELF executable is
built to use a 64-bit FPU a new flag (EF_MIPS_FP64) is set in the ELF
header.

With this patch the kernel will check the EF_MIPS_FP64 flag when
executing an O32 binary, and set Status.FR accordingly. The addition
of O32 64-bit FP support lessens the opportunity for optimisation in
the FPU emulator, so a CONFIG_MIPS_O32_FP64_SUPPORT Kconfig option is
introduced to allow this support to be disabled for those that don't
require it.

Inspired by an earlier patch by Leonid Yegoshin, but implemented more
cleanly & correctly.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Paul Burton <paul.burton@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/6154/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
10 years agoMIPS: Remove unused {en,dis}able_fpu macros
Paul Burton [Thu, 7 Nov 2013 12:48:30 +0000 (12:48 +0000)]
MIPS: Remove unused {en,dis}able_fpu macros

These macros are not used anywhere in the kernel. Remove them.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6111/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
10 years agoMIPS: microMIPS: mfhc1 & mthc1 support for the FPU emulator
Steven J. Hill [Thu, 7 Nov 2013 12:48:29 +0000 (12:48 +0000)]
MIPS: microMIPS: mfhc1 & mthc1 support for the FPU emulator

This patch adds support for microMIPS encodings of the mfhc1 & mthc1
instructions introduced in release 2 of the mips32 & mips64
architectures, converting them to their mips32 equivalents for the FPU
emulator.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6110/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
10 years agoMIPS: math-emu: Add mfhc1 & mthc1 support.
Leonid Yegoshin [Thu, 7 Nov 2013 12:48:28 +0000 (12:48 +0000)]
MIPS: math-emu: Add mfhc1 & mthc1 support.

This patch adds support for the mfhc1 & mthc1 instructions to the FPU
emulator. These instructions were introduced in release 2 of the MIPS32
& MIPS64 architectures and allow access to the most significant 32 bits
of a 64-bit FP register.

[ralf@linux-mips.org: Fix ifdef hell added by original patch.]

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6112/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
10 years agoLinux 3.13-rc8
Linus Torvalds [Sun, 12 Jan 2014 10:04:18 +0000 (17:04 +0700)]
Linux 3.13-rc8

10 years agoSELinux: Fix possible NULL pointer dereference in selinux_inode_permission()
Steven Rostedt [Fri, 10 Jan 2014 02:46:34 +0000 (21:46 -0500)]
SELinux: Fix possible NULL pointer dereference in selinux_inode_permission()

While running stress tests on adding and deleting ftrace instances I hit
this bug:

  BUG: unable to handle kernel NULL pointer dereference at 0000000000000020
  IP: selinux_inode_permission+0x85/0x160
  PGD 63681067 PUD 7ddbe067 PMD 0
  Oops: 0000 [#1] PREEMPT
  CPU: 0 PID: 5634 Comm: ftrace-test-mki Not tainted 3.13.0-rc4-test-00033-gd2a6dde-dirty #20
  Hardware name:                  /DG965MQ, BIOS MQ96510J.86A.0372.2006.0605.1717 06/05/2006
  task: ffff880078375800 ti: ffff88007ddb0000 task.ti: ffff88007ddb0000
  RIP: 0010:[<ffffffff812d8bc5>]  [<ffffffff812d8bc5>] selinux_inode_permission+0x85/0x160
  RSP: 0018:ffff88007ddb1c48  EFLAGS: 00010246
  RAX: 0000000000000000 RBX: 0000000000800000 RCX: ffff88006dd43840
  RDX: 0000000000000001 RSI: 0000000000000081 RDI: ffff88006ee46000
  RBP: ffff88007ddb1c88 R08: 0000000000000000 R09: ffff88007ddb1c54
  R10: 6e6576652f6f6f66 R11: 0000000000000003 R12: 0000000000000000
  R13: 0000000000000081 R14: ffff88006ee46000 R15: 0000000000000000
  FS:  00007f217b5b6700(0000) GS:ffffffff81e21000(0000) knlGS:0000000000000000
  CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033^M
  CR2: 0000000000000020 CR3: 000000006a0fe000 CR4: 00000000000007f0
  Call Trace:
    security_inode_permission+0x1c/0x30
    __inode_permission+0x41/0xa0
    inode_permission+0x18/0x50
    link_path_walk+0x66/0x920
    path_openat+0xa6/0x6c0
    do_filp_open+0x43/0xa0
    do_sys_open+0x146/0x240
    SyS_open+0x1e/0x20
    system_call_fastpath+0x16/0x1b
  Code: 84 a1 00 00 00 81 e3 00 20 00 00 89 d8 83 c8 02 40 f6 c6 04 0f 45 d8 40 f6 c6 08 74 71 80 cf 02 49 8b 46 38 4c 8d 4d cc 45 31 c0 <0f> b7 50 20 8b 70 1c 48 8b 41 70 89 d9 8b 78 04 e8 36 cf ff ff
  RIP  selinux_inode_permission+0x85/0x160
  CR2: 0000000000000020

Investigating, I found that the inode->i_security was NULL, and the
dereference of it caused the oops.

in selinux_inode_permission():

isec = inode->i_security;

rc = avc_has_perm_noaudit(sid, isec->sid, isec->sclass, perms, 0, &avd);

Note, the crash came from stressing the deletion and reading of debugfs
files.  I was not able to recreate this via normal files.  But I'm not
sure they are safe.  It may just be that the race window is much harder
to hit.

What seems to have happened (and what I have traced), is the file is
being opened at the same time the file or directory is being deleted.
As the dentry and inode locks are not held during the path walk, nor is
the inodes ref counts being incremented, there is nothing saving these
structures from being discarded except for an rcu_read_lock().

The rcu_read_lock() protects against freeing of the inode, but it does
not protect freeing of the inode_security_struct.  Now if the freeing of
the i_security happens with a call_rcu(), and the i_security field of
the inode is not changed (it gets freed as the inode gets freed) then
there will be no issue here.  (Linus Torvalds suggested not setting the
field to NULL such that we do not need to check if it is NULL in the
permission check).

Note, this is a hack, but it fixes the problem at hand.  A real fix is
to restructure the destroy_inode() to call all the destructor handlers
from the RCU callback.  But that is a major job to do, and requires a
lot of work.  For now, we just band-aid this bug with this fix (it
works), and work on a more maintainable solution in the future.

Link: http://lkml.kernel.org/r/20140109101932.0508dec7@gandalf.local.home
Link: http://lkml.kernel.org/r/20140109182756.17abaaa8@gandalf.local.home
Cc: stable@vger.kernel.org
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
10 years agothp: fix copy_page_rep GPF by testing is_huge_zero_pmd once only
Hugh Dickins [Sun, 12 Jan 2014 09:25:21 +0000 (01:25 -0800)]
thp: fix copy_page_rep GPF by testing is_huge_zero_pmd once only

We see General Protection Fault on RSI in copy_page_rep: that RSI is
what you get from a NULL struct page pointer.

  RIP: 0010:[<ffffffff81154955>]  [<ffffffff81154955>] copy_page_rep+0x5/0x10
  RSP: 0000:ffff880136e15c00  EFLAGS: 00010286
  RAX: ffff880000000000 RBX: ffff880136e14000 RCX: 0000000000000200
  RDX: 6db6db6db6db6db7 RSI: db73880000000000 RDI: ffff880dd0c00000
  RBP: ffff880136e15c18 R08: 0000000000000200 R09: 000000000005987c
  R10: 000000000005987c R11: 0000000000000200 R12: 0000000000000001
  R13: ffffea00305aa000 R14: 0000000000000000 R15: 0000000000000000
  FS:  00007f195752f700(0000) GS:ffff880c7fc20000(0000) knlGS:0000000000000000
  CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
  CR2: 0000000093010000 CR3: 00000001458e1000 CR4: 00000000000027e0
  Call Trace:
    copy_user_huge_page+0x93/0xab
    do_huge_pmd_wp_page+0x710/0x815
    handle_mm_fault+0x15d8/0x1d70
    __do_page_fault+0x14d/0x840
    do_page_fault+0x2f/0x90
    page_fault+0x22/0x30

do_huge_pmd_wp_page() tests is_huge_zero_pmd(orig_pmd) four times: but
since shrink_huge_zero_page() can free the huge_zero_page, and we have
no hold of our own on it here (except where the fourth test holds
page_table_lock and has checked pmd_same), it's possible for it to
answer yes the first time, but no to the second or third test.  Change
all those last three to tests for NULL page.

(Note: this is not the same issue as trinity's DEBUG_PAGEALLOC BUG
in copy_page_rep with RSI: ffff88009c422000, reported by Sasha Levin
in https://lkml.org/lkml/2013/3/29/103.  I believe that one is due
to the source page being split, and a tail page freed, while copy
is in progress; and not a problem without DEBUG_PAGEALLOC, since
the pmd_same check will prevent a miscopy from being made visible.)

Fixes: 97ae17497e99 ("thp: implement refcounting for huge zero page")
Signed-off-by: Hugh Dickins <hughd@google.com>
Cc: stable@vger.kernel.org # v3.10 v3.11 v3.12
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
10 years agoblock: null_blk: fix queue leak inside removing device
Ming Lei [Thu, 26 Dec 2013 13:31:37 +0000 (21:31 +0800)]
block: null_blk: fix queue leak inside removing device

When queue_mode is NULL_Q_MQ and null_blk is being removed,
blk_cleanup_queue() isn't called to cleanup queue, so the queue
allocated won't be freed.

This patch calls blk_cleanup_queue() for MQ to drain all pending
requests first and release the reference counter of queue kobject, then
blk_mq_free_queue() will be called in queue kobject's release handler
when queue kobject's reference counter drops to zero.

Signed-off-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
10 years agoMerge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Linus Torvalds [Fri, 10 Jan 2014 23:37:11 +0000 (06:37 +0700)]
Merge git://git./linux/kernel/git/davem/net

Pull networking fixes from David Miller:
 "Famouse last words: "final pull request" :-)

  I'm sending this because Jason Wang's fixes are pretty important

   1) Add missing per-cpu stats initialization to ip6_vti.  Otherwise
      lockdep spits out a call trace.  From Li RongQing.

   2) Fix NULL oops in wireless hwsim, from Javier Lopez

   3) TIPC deferred packet queue unlink must NULL out skb->next to avoid
      crashes.  From Erik Hugne

   4) Fix access to uninitialized buffer in nf_nat netfilter code, from
      Daniel Borkmann

   5) Fix lifetime of ipv6 loopback and SIT tunnel addresses, otherwise
      they basically timeout immediately.  From Hannes Frederic Sowa

   6) Fix DMA unmapping of TSO packets in bnx2x driver, from Michal
      Schmidt

   7) Do not allow L2 forwarding offload via macvtap device, the way
      things are now it will not end up being forwaded at all.  From
      Jason Wang

   8) Fix transmit queue selection via ndo_dfwd_start_xmit(), fixing
      things like applying NETIF_F_LLTX to the wrong device (!!) and
      eliding the proper transmit watchdog handling

   9) qlcnic driver was not updating tx statistics at all, from Manish
      Chopra"

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net:
  qlcnic: Fix ethtool statistics length calculation
  qlcnic: Fix bug in TX statistics
  net: core: explicitly select a txq before doing l2 forwarding
  macvlan: forbid L2 fowarding offload for macvtap
  bnx2x: fix DMA unmapping of TSO split BDs
  ipv6: add link-local, sit and loopback address with INFINITY_LIFE_TIME
  bnx2x: prevent WARN during driver unload
  tipc: correctly unlink packets from deferred packet queue
  ipv6: pcpu_tstats.syncp should be initialised in ip6_vti.c
  netfilter: only warn once on wrong seqadj usage
  netfilter: nf_nat: fix access to uninitialized buffer in IRC NAT helper
  NFC: Fix target mode p2p link establishment
  iwlwifi: add new devices for 7265 series
  mac80211: move "bufferable MMPDU" check to fix AP mode scan
  mac80211_hwsim: Fix NULL pointer dereference

10 years agoMerge tag 'xfs-for-linus-v3.13-rc8' of git://oss.sgi.com/xfs/xfs
Linus Torvalds [Fri, 10 Jan 2014 23:33:03 +0000 (06:33 +0700)]
Merge tag 'xfs-for-linus-v3.13-rc8' of git://oss.sgi.com/xfs/xfs

Pull xfs bugfixes from Ben Myers:
 "Here we have a bugfix for an off-by-one in the remote attribute
  verifier that results in a forced shutdown which you can hit with v5
  superblock by creating a 64k xattr, and a fix for a missing
  destroy_work_on_stack() in the allocation worker.

  It's a bit late, but they are both fairly straightforward"

* tag 'xfs-for-linus-v3.13-rc8' of git://oss.sgi.com/xfs/xfs:
  xfs: Calling destroy_work_on_stack() to pair with INIT_WORK_ONSTACK()
  xfs: fix off-by-one error in xfs_attr3_rmt_verify

10 years agoMerge branch 'leds-fixes-for-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Fri, 10 Jan 2014 23:26:27 +0000 (06:26 +0700)]
Merge branch 'leds-fixes-for-3.13' of git://git./linux/kernel/git/cooloney/linux-leds

Pull LED fix from Bryan Wu:
 "Pali Rohár and Pavel Machek reported the LED of Nokia N900 doesn't
  work with our latest 3.13-rc6 kernel.  Milo fixed the regression here"

* 'leds-fixes-for-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/linux-leds:
  leds: lp5521/5523: Remove duplicate mutex

10 years agoMerge tag 'pm+acpi-3.13-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
Linus Torvalds [Fri, 10 Jan 2014 23:25:02 +0000 (06:25 +0700)]
Merge tag 'pm+acpi-3.13-rc8' of git://git./linux/kernel/git/rafael/linux-pm

Pull ACPI and power management fixes from Rafael Wysocki:

 - Recent commits modifying the lists of C-states in the intel_idle
   driver introduced bugs leading to crashes on some systems.  Two fixes
   from Jiang Liu.

 - The ACPI AC driver should receive all types of notifications, but
   recent change made it ignore some of them.  Fix from Alexander Mezin.

 - intel_pstate's validity checks for MSRs it depends on are not
   sufficient to catch the lack of support in nested KVM setups, so they
   are extended to cover that case.  From Dirk Brandewie.

 - NEC LZ750/LS has a botched up _BIX method in its ACPI tables, so our
   ACPI battery driver needs a quirk for it.  From Lan Tianyu.

 - The tpm_ppi driver sometimes leaks memory allocated by
   acpi_get_name().  Fix from Jiang Liu.

* tag 'pm+acpi-3.13-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  intel_idle: close avn_cstates array with correct marker
  Revert "intel_idle: mark states tables with __initdata tag"
  ACPI / Battery: Add a _BIX quirk for NEC LZ750/LS
  intel_pstate: Add X86_FEATURE_APERFMPERF to cpu match parameters.
  ACPI / TPM: fix memory leak when walking ACPI namespace
  ACPI / AC: change notification handler type to ACPI_ALL_NOTIFY

10 years agoMerge tag 'mfd-fixes-3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo...
Linus Torvalds [Fri, 10 Jan 2014 23:23:57 +0000 (06:23 +0700)]
Merge tag 'mfd-fixes-3.13-2' of git://git./linux/kernel/git/sameo/mfd-fixes

Pull MFD fix from Samuel Ortiz:
 "This is the 2nd MFD pull request for 3.13

  It only contains one fix for the rtsx_pcr driver.  Without it we see a
  kernel panic on some machines, when resuming from suspend to RAM"

* tag 'mfd-fixes-3.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-fixes:
  mfd: rtsx_pcr: Disable interrupts before cancelling delayed works

10 years agoleds: lp5521/5523: Remove duplicate mutex
Milo Kim [Tue, 3 Dec 2013 01:21:44 +0000 (17:21 -0800)]
leds: lp5521/5523: Remove duplicate mutex

It can be a problem when a pattern is loaded via the firmware interface.
LP55xx common driver has already locked the mutex in 'lp55xx_firmware_loaded()'.
So it should be deleted.

On the other hand, locks are required in store_engine_load()
on updating program memory.

Reported-by: Pali Rohár <pali.rohar@gmail.com>
Reported-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Milo Kim <milo.kim@ti.com>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
Cc: <stable@vger.kernel.org>
10 years agoxfs: Calling destroy_work_on_stack() to pair with INIT_WORK_ONSTACK()
Chuansheng Liu [Tue, 7 Jan 2014 08:53:34 +0000 (16:53 +0800)]
xfs: Calling destroy_work_on_stack() to pair with INIT_WORK_ONSTACK()

In case CONFIG_DEBUG_OBJECTS_WORK is defined, it is needed to
call destroy_work_on_stack() which frees the debug object to pair
with INIT_WORK_ONSTACK().

Signed-off-by: Liu, Chuansheng <chuansheng.liu@intel.com>
Reviewed-by: Ben Myers <bpm@sgi.com>
Signed-off-by: Ben Myers <bpm@sgi.com>
(cherry picked from commit 6f96b3063cdd473c68664a190524ed966ac0cd92)

10 years agoxfs: fix off-by-one error in xfs_attr3_rmt_verify
Jie Liu [Wed, 1 Jan 2014 11:28:03 +0000 (19:28 +0800)]
xfs: fix off-by-one error in xfs_attr3_rmt_verify

With CRC check is enabled, if trying to set an attributes value just
equal to the maximum size of XATTR_SIZE_MAX would cause the v3 remote
attr write verification procedure failure, which would yield the back
trace like below:

<snip>
XFS (sda7): Internal error xfs_attr3_rmt_write_verify at line 191 of file fs/xfs/xfs_attr_remote.c
<snip>
Call Trace:
[<ffffffff816f0042>] dump_stack+0x45/0x56
[<ffffffffa0d99c8b>] xfs_error_report+0x3b/0x40 [xfs]
[<ffffffffa0d96edd>] ? _xfs_buf_ioapply+0x6d/0x390 [xfs]
[<ffffffffa0d99ce5>] xfs_corruption_error+0x55/0x80 [xfs]
[<ffffffffa0dbef6b>] xfs_attr3_rmt_write_verify+0x14b/0x1a0 [xfs]
[<ffffffffa0d96edd>] ? _xfs_buf_ioapply+0x6d/0x390 [xfs]
[<ffffffffa0d97315>] ? xfs_bdstrat_cb+0x55/0xb0 [xfs]
[<ffffffffa0d96edd>] _xfs_buf_ioapply+0x6d/0x390 [xfs]
[<ffffffff81184cda>] ? vm_map_ram+0x31a/0x460
[<ffffffff81097230>] ? wake_up_state+0x20/0x20
[<ffffffffa0d97315>] ? xfs_bdstrat_cb+0x55/0xb0 [xfs]
[<ffffffffa0d9726b>] xfs_buf_iorequest+0x6b/0xc0 [xfs]
[<ffffffffa0d97315>] xfs_bdstrat_cb+0x55/0xb0 [xfs]
[<ffffffffa0d97906>] xfs_bwrite+0x46/0x80 [xfs]
[<ffffffffa0dbfa94>] xfs_attr_rmtval_set+0x334/0x490 [xfs]
[<ffffffffa0db84aa>] xfs_attr_leaf_addname+0x24a/0x410 [xfs]
[<ffffffffa0db8893>] xfs_attr_set_int+0x223/0x470 [xfs]
[<ffffffffa0db8b76>] xfs_attr_set+0x96/0xb0 [xfs]
[<ffffffffa0db13b2>] xfs_xattr_set+0x42/0x70 [xfs]
[<ffffffff811df9b2>] generic_setxattr+0x62/0x80
[<ffffffff811e0213>] __vfs_setxattr_noperm+0x63/0x1b0
[<ffffffff81307afe>] ? evm_inode_setxattr+0xe/0x10
[<ffffffff811e0415>] vfs_setxattr+0xb5/0xc0
[<ffffffff811e054e>] setxattr+0x12e/0x1c0
[<ffffffff811c6e82>] ? final_putname+0x22/0x50
[<ffffffff811c708b>] ? putname+0x2b/0x40
[<ffffffff811cc4bf>] ? user_path_at_empty+0x5f/0x90
[<ffffffff811bdfd9>] ? __sb_start_write+0x49/0xe0
[<ffffffff81168589>] ? vm_mmap_pgoff+0x99/0xc0
[<ffffffff811e07df>] SyS_setxattr+0x8f/0xe0
[<ffffffff81700c2d>] system_call_fastpath+0x1a/0x1f

Tests:
    setfattr -n user.longxattr -v `perl -e 'print "A"x65536'` testfile

This patch fix it to check the remote EA size is greater than the
XATTR_SIZE_MAX rather than more than or equal to it, because it's
valid if the specified EA value size is equal to the limitation as
per VFS setxattr interface.

Signed-off-by: Jie Liu <jeff.liu@oracle.com>
Reviewed-by: Mark Tinguely <tinguely@sgi.com>
Signed-off-by: Ben Myers <bpm@sgi.com>
(cherry picked from commit 85dd0707f0cad26d60f2dc574d17a5ab948d10f7)

10 years agoqlcnic: Fix ethtool statistics length calculation
Shahed Shaikh [Thu, 9 Jan 2014 17:41:05 +0000 (12:41 -0500)]
qlcnic: Fix ethtool statistics length calculation

o Consider number of Tx queues while calculating the length of
  Tx statistics as part of ethtool stats.
o Calculate statistics lenght properly for 82xx and 83xx adapter

Signed-off-by: Shahed Shaikh <shahed.shaikh@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>