GitHub/LineageOS/android_kernel_motorola_exynos9610.git
9 years agoMIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions
Markos Chandras [Wed, 26 Nov 2014 15:03:54 +0000 (15:03 +0000)]
MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions

MIPS R6 uses the <R6 DADDI opcode for the new BNVC, BNEC and
BNEZLAC instructions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructions
Markos Chandras [Wed, 26 Nov 2014 14:08:52 +0000 (14:08 +0000)]
MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructions

MIPS R6 uses the <R6 ADDI opcode for the new BOVC, BEQC and
BEQZALC instructions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Emulate the new MIPS R6 branch compact (BC) instruction
Markos Chandras [Wed, 26 Nov 2014 13:56:51 +0000 (13:56 +0000)]
MIPS: Emulate the new MIPS R6 branch compact (BC) instruction

MIPS R6 uses the <R6 LWC2 opcode for the new BC instruction.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions
Markos Chandras [Wed, 26 Nov 2014 13:05:09 +0000 (13:05 +0000)]
MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions

MIPS R6 added the following four instructions which share the
BGTZ and BGTZL opcode:

BLTZALC: Compact branch-and-link if GPR rt is < to zero
BGTZALC: Compact branch-and-link if GPR rt is > to zero
BLTZL  : Compact branch if GPR rt is < to zero
BGTZL  : Compact branch if GPR rt is > to zero
BLTC   : Compact branch if GPR rs is less than GPR rt
BLTUC  : Similar to BLTC but unsigned

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructions
Markos Chandras [Wed, 26 Nov 2014 12:57:54 +0000 (12:57 +0000)]
MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructions

MIPS R6 added the following four instructions which share the
BLEZ and BLEZL opcodes:

BLEZALC: Compact branch-and-link if GPR rt is <= to zero
BGEZALC: Compact branch-and-link if GPR rt is >= to zero
BLEZC  : Compact branch if GPR rt is <= to zero
BGEZC  : Compact branch if GPR rt is >= to zero
BGEC   : Compact branch if GPR rs is less than or equal to GPR rt
BGEUC  : Similar to BGEC but unsigned.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Emulate the BC1{EQ,NE}Z FPU instructions
Markos Chandras [Wed, 26 Nov 2014 10:10:18 +0000 (10:10 +0000)]
MIPS: Emulate the BC1{EQ,NE}Z FPU instructions

MIPS R6 introduced the following two branch instructions for COP1:

BC1EQZ: Branch if Cop1 (FPR) Register Bit 0 is Equal to Zero
BC1NEZ: Branch if Cop1 (FPR) Register Bit 0 is Not Equal to Zero

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6
Markos Chandras [Tue, 25 Nov 2014 16:02:23 +0000 (16:02 +0000)]
MIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6

MIPS R6 removed the BLTZL, BGEZL, BLTZAL, BGEZAL, BEQL, BNEL, BLEZL,
BGTZL branch likely instructions so we must not try to emulate them on
MIPS R6 if the R2-to-R6 emulator is not present.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: Prepare the JR instruction for emulation on MIPS R6
Markos Chandras [Tue, 25 Nov 2014 15:54:14 +0000 (15:54 +0000)]
MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6

The MIPS R6 JR instruction is an alias to the JALR one, so it may
need emulation for non-R6 userlands.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: mm: scache: Add secondary cache support for MIPS R6 cores
Markos Chandras [Thu, 15 Jan 2015 10:28:29 +0000 (10:28 +0000)]
MIPS: mm: scache: Add secondary cache support for MIPS R6 cores

The secondary cache initialization and configuration code is processor
specific so we need to handle MIPS R6 cores as well.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: mm: c-r4k: Set the correct ISA level
Markos Chandras [Tue, 2 Dec 2014 15:30:19 +0000 (15:30 +0000)]
MIPS: mm: c-r4k: Set the correct ISA level

The local_r4k_flush_cache_sigtramp function uses the 'cache'
instruction inside an asm block. However, MIPS R6 changed the
opcode for the cache instruction and as a result of which we
need to set the correct ISA level.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: mm: tlbex: Use cpu_has_mips_r2_exec_hazard for the EHB instruction
Leonid Yegoshin [Mon, 24 Nov 2014 15:42:46 +0000 (15:42 +0000)]
MIPS: mm: tlbex: Use cpu_has_mips_r2_exec_hazard for the EHB instruction

MIPS uses the cpu_has_mips_r2_exec_hazard macro to determine whether the
EHB instruction is available or not. This is necessary for MIPS R6
which also supports the EHB instruction.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: mm: page: Add MIPS R6 support
Markos Chandras [Wed, 19 Nov 2014 09:39:56 +0000 (09:39 +0000)]
MIPS: mm: page: Add MIPS R6 support

The MIPS R6 pref instruction only has 9 bits for the immediate
field so skip the micro-assembler PREF instruction if the offset
does not fit in 9 bits. Moreover, bit 30 (Pref_PrepareForStore) is
no longer valid in MIPS R6, so we change the default for all MIPS R6
processors to bit 5 (Pref_StoreStreamed).

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: lib: memset: Add MIPS R6 support
Leonid Yegoshin [Tue, 18 Nov 2014 09:04:34 +0000 (09:04 +0000)]
MIPS: lib: memset: Add MIPS R6 support

MIPS R6 dropped the unaligned load and store instructions so
we need to re-write this part of the code for R6 to store
one byte at a time.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: lib: memcpy: Add MIPS R6 support
Leonid Yegoshin [Fri, 14 Nov 2014 11:55:50 +0000 (11:55 +0000)]
MIPS: lib: memcpy: Add MIPS R6 support

MIPS R6 does not support the unaligned load and store instructions
so we add a special MIPS R6 case to copy one byte at a time if we
need to read/write to unaligned memory addresses.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: syscall: Set the appropriate ISA level for MIPS R6
Markos Chandras [Thu, 15 Jan 2015 10:34:00 +0000 (10:34 +0000)]
MIPS: kernel: syscall: Set the appropriate ISA level for MIPS R6

MIPS R6 changed the opcodes for LL/SC instructions so we need to set
the appropriate ISA level.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: unaligned: Add support for the MIPS R6
Leonid Yegoshin [Tue, 28 Oct 2014 10:42:23 +0000 (10:42 +0000)]
MIPS: kernel: unaligned: Add support for the MIPS R6

The load/store unaligned instructions have been removed in MIPS R6
so we need to re-implement the related macros using the regular
load/store instructions. Moreover, the load/store from coprocessor 2
instructions have been reallocated in Release 6 so we will handle them
in the emulator instead.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: cps-vec: Replace "addi" with "addiu"
Markos Chandras [Mon, 24 Nov 2014 14:40:11 +0000 (14:40 +0000)]
MIPS: kernel: cps-vec: Replace "addi" with "addiu"

The "addi" instruction will trap on overflows which is not something
we need in this code, so we replace that with "addiu".

Link: http://www.linux-mips.org/archives/linux-mips/2015-01/msg00430.html
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: <stable@vger.kernel.org> # v3.15+
Cc: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: genex: Set correct ISA level
Markos Chandras [Mon, 24 Nov 2014 13:17:27 +0000 (13:17 +0000)]
MIPS: kernel: genex: Set correct ISA level

The jr instruction opcode has changed in R6 so make sure
the correct ISA level is set prior using that instruction.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: r4k_fpu: Add support for MIPS R6
Leonid Yegoshin [Tue, 25 Nov 2014 10:08:45 +0000 (10:08 +0000)]
MIPS: kernel: r4k_fpu: Add support for MIPS R6

Add the MIPS R6 related preprocessor definitions for FPU signal
related functions. MIPS R6 only has FR=1 so avoid checking that
bit on the C0/Status register.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: r4k_switch: Add support for MIPS R6
Leonid Yegoshin [Mon, 24 Nov 2014 11:54:19 +0000 (11:54 +0000)]
MIPS: kernel: r4k_switch: Add support for MIPS R6

Add the MIPS R6 related preprocessor definitions for save/restore
FPU related functions. We also set the appropriate ISA level
so the final return instruction "jr ra" will produce the correct
opcode on R6.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: traps: Add MIPS R6 related definitions
Leonid Yegoshin [Fri, 14 Nov 2014 11:25:30 +0000 (11:25 +0000)]
MIPS: kernel: traps: Add MIPS R6 related definitions

Add MIPS R6 support to cache and ftlb exceptions, as well as
to the hwrena and ebase register configuration.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfo
Markos Chandras [Fri, 14 Nov 2014 10:10:02 +0000 (10:10 +0000)]
MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfo

Print 'mips64r6' and/or 'mips32r6' if the kernel is running on
a MIPS R6 core.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: entry.S: Add MIPS R6 related definitions
Markos Chandras [Fri, 14 Nov 2014 10:05:41 +0000 (10:05 +0000)]
MIPS: kernel: entry.S: Add MIPS R6 related definitions

The instruction hazard barrier in the form of:

jr.hb ra
nop

is valid on MIPS R6 as well.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: cpu-probe.c: Add support for MIPS R6
Leonid Yegoshin [Thu, 13 Nov 2014 13:51:51 +0000 (13:51 +0000)]
MIPS: kernel: cpu-probe.c: Add support for MIPS R6

Add MIPS R6 support when decoding the config0 c0 register.
Also add MIPS R6 support when examining the ebase c0 register
to get the core number and when getting the shadow set number
from the srsctl c0 register.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handler
Leonid Yegoshin [Thu, 13 Nov 2014 13:39:39 +0000 (13:39 +0000)]
MIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interrupt handler

Just like MIPS R2, in MIPS R6 it is possible to determine if a
timer interrupt has happened or not.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: kernel: cpu-bugs64: Do not check R6 cores for existing 64-bit bugs
Leonid Yegoshin [Mon, 24 Nov 2014 09:59:02 +0000 (09:59 +0000)]
MIPS: kernel: cpu-bugs64: Do not check R6 cores for existing 64-bit bugs

The current HW bugs checked in cpu-bugs64, do not apply to R6 cores
and they cause compilation problems due to removed <R6 instructions,
so do not check for them for the time being.

Reviewed-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: local: Set the appropriate ISA level for MIPS R6
Markos Chandras [Thu, 15 Jan 2015 10:31:36 +0000 (10:31 +0000)]
MIPS: asm: local: Set the appropriate ISA level for MIPS R6

MIPS R6 changed the opcodes for LL/SC instructions so we need to set
the appropriate ISA level.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: spinlock: Replace "sub" instruction with "addiu"
Markos Chandras [Mon, 24 Nov 2014 14:11:39 +0000 (14:11 +0000)]
MIPS: asm: spinlock: Replace "sub" instruction with "addiu"

"sub $reg, imm" is not a real MIPS instruction. The assembler can
replace that with "addi $reg, -imm". However, addi has been removed
from R6, so we replace the "sub" instruction with the "addiu" one.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: futex: Set the appropriate ISA level for MIPS R6
Markos Chandras [Wed, 19 Nov 2014 11:09:55 +0000 (11:09 +0000)]
MIPS: asm: futex: Set the appropriate ISA level for MIPS R6

MIPS R6 changed the opcodes for LL/SC instructions so we need to set
the appropriate ISA level.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: bitops: Update ISA constraints for MIPS R6 support
Markos Chandras [Thu, 20 Nov 2014 13:58:30 +0000 (13:58 +0000)]
MIPS: asm: bitops: Update ISA constraints for MIPS R6 support

MIPS R6 changed the opcodes for LL/SC instructions so we need to set
the correct ISA level.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: atomic: Update ISA constraints for MIPS R6 support
Markos Chandras [Tue, 6 Jan 2015 11:09:24 +0000 (11:09 +0000)]
MIPS: asm: atomic: Update ISA constraints for MIPS R6 support

MIPS R6 changed the opcodes for LL/SC instructions so we need to
set the correct ISA level.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: cmpxchg: Update ISA constraints for MIPS R6 support
Markos Chandras [Thu, 20 Nov 2014 13:31:48 +0000 (13:31 +0000)]
MIPS: asm: cmpxchg: Update ISA constraints for MIPS R6 support

MIPS R6 changed the opcodes for LL/SC instructions so we need to set
the correct ISA.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Use the new "ZC" constraint for MIPS R6
Markos Chandras [Fri, 19 Dec 2014 12:04:46 +0000 (12:04 +0000)]
MIPS: Use the new "ZC" constraint for MIPS R6

GCC versions supporting MIPS R6 use the ZC constraint to enforce a
9-bit offset for MIPS R6. We will use that for all MIPS R6 LL/SC
instructions.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: Rename GCC_OFF12_ASM to GCC_OFF_SMALL_ASM
Markos Chandras [Mon, 26 Jan 2015 12:44:11 +0000 (12:44 +0000)]
MIPS: asm: Rename GCC_OFF12_ASM to GCC_OFF_SMALL_ASM

The GCC_OFF12_ASM macro is used for 12-bit immediate constrains
but we will also use it for 9-bit constrains on MIPS R6 so we
rename it to something more appropriate.

Cc: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: spram: Add new symbol for MIPS scratch pad storage
Markos Chandras [Thu, 13 Nov 2014 13:32:03 +0000 (13:32 +0000)]
MIPS: asm: spram: Add new symbol for MIPS scratch pad storage

MIPS R6, just like MIPS R2, have scratch pad storage, so add a new
symbol which is selected by MIPS R2 and R6.

Link: http://www.linux-mips.org/archives/linux-mips/2015-01/msg00389.html
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: r4kcache: Add MIPS R6 cache unroll functions
Markos Chandras [Thu, 13 Nov 2014 13:25:51 +0000 (13:25 +0000)]
MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions

MIPS R6 changed the 'cache' instruction opcode and reduced the
offset field to 8 bits. This means we now have to adjust the
base register every 256 bytes and as a result of which we can
no longer use the previous cache functions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: irqflags: Add MIPS R6 related definitions
Markos Chandras [Thu, 13 Nov 2014 11:54:31 +0000 (11:54 +0000)]
MIPS: asm: irqflags: Add MIPS R6 related definitions

Add the MIPS R6 related definitions to the IRQ related macros

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: hazards: Add MIPSR6 definitions
Markos Chandras [Thu, 13 Nov 2014 11:52:22 +0000 (11:52 +0000)]
MIPS: asm: hazards: Add MIPSR6 definitions

Add the MIPSR6 related definitions to MIPS hazards

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: cpu: Add MIPSR6 ISA definitions
Leonid Yegoshin [Thu, 13 Nov 2014 11:49:21 +0000 (11:49 +0000)]
MIPS: asm: cpu: Add MIPSR6 ISA definitions

Add MIPS R6 to the ISA definitions

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Use generic checksum functions for MIPS R6
Markos Chandras [Thu, 13 Nov 2014 11:25:27 +0000 (11:25 +0000)]
MIPS: Use generic checksum functions for MIPS R6

The following instructions have been removed from MIPS R6

ulw, ulh, swl, lwr, lwl, swr.

However, all of them are used in the MIPS specific checksum implementation.
As a result of which, we will use the generic checksum on MIPS R6

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: asmmacro: Replace "add" instructions with "addu"
Markos Chandras [Wed, 5 Nov 2014 14:17:52 +0000 (14:17 +0000)]
MIPS: asm: asmmacro: Replace "add" instructions with "addu"

The "add" instruction is actually a macro in binutils and depending on
the size of the immediate it can expand to an "addi" instruction.
However, the "addi" instruction traps on overflows which is not
something we want on address calculation.

Link: http://www.linux-mips.org/archives/linux-mips/2015-01/msg00121.html
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: <stable@vger.kernel.org> # v3.15+
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: asmmacro: Add MIPS R6 support to the simple EI/DI variants
Leonid Yegoshin [Wed, 5 Nov 2014 12:56:40 +0000 (12:56 +0000)]
MIPS: asm: asmmacro: Add MIPS R6 support to the simple EI/DI variants

EI/DI instructions are available in MIPS R6 so add the needed
definitions.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6
Leonid Yegoshin [Mon, 27 Oct 2014 11:37:47 +0000 (11:37 +0000)]
MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6

The HI/LO registers have been removed from MIPS R6. Instructions
such as MULT and DIV have been replaced with a new pair of
instructions for the HI/LO operations for example:

MULT -> MUL, MUH
DIV -> DIV, MOD

So we avoid preserving the pre-R6 HI/LO registers in MIPS R6

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: module: define MODULE_PROC_FAMILY for MIPS R6
Leonid Yegoshin [Mon, 27 Oct 2014 11:23:34 +0000 (11:23 +0000)]
MIPS: asm: module: define MODULE_PROC_FAMILY for MIPS R6

Define the MODULE_PROC_FAMILY for the MIPS R6 ISA.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: asm: compiler: Add new macros to set ISA and arch asm annotations
Markos Chandras [Tue, 18 Nov 2014 15:02:32 +0000 (15:02 +0000)]
MIPS: asm: compiler: Add new macros to set ISA and arch asm annotations

There are certain places where the code uses .set mips32 or .set mips64
or .set arch=r4000. In preparation of MIPS R6 support, and in order to
use as less #ifdefs as possible, we define new macros to set similar
annotations for MIPS R6.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: mm: Add MIPS R6 instruction encodings
Leonid Yegoshin [Wed, 19 Nov 2014 09:29:42 +0000 (09:29 +0000)]
MIPS: mm: Add MIPS R6 instruction encodings

MIPS R6 defines new opcodes for ll, sc, cache and pref instructions
so we need to take these into consideration in the micro-assembler.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: mm: uasm: Add signed 9-bit immediate related macros
Leonid Yegoshin [Tue, 18 Nov 2014 16:24:15 +0000 (16:24 +0000)]
MIPS: mm: uasm: Add signed 9-bit immediate related macros

MIPS R6 redefines several instructions and reduces the immediate
field to 9-bits so add related macros for the microassembler.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Add build support for the MIPS R6 ISA
Leonid Yegoshin [Mon, 27 Oct 2014 10:34:11 +0000 (10:34 +0000)]
MIPS: Add build support for the MIPS R6 ISA

Add build support for the latest revision (R6) of the MIPS ISA.
microMIPS is not yet supported.

Link: http://www.linux-mips.org/archives/linux-mips/2015-01/msg00386.html
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Add MIPS generic QEMU probe support
Leonid Yegoshin [Mon, 24 Nov 2014 12:59:44 +0000 (12:59 +0000)]
MIPS: Add MIPS generic QEMU probe support

Add a case in cpu_probe_mips for the MIPS generic QEMU processor ID.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Add cases for CPU_QEMU_GENERIC
Leonid Yegoshin [Mon, 24 Nov 2014 12:59:01 +0000 (12:59 +0000)]
MIPS: Add cases for CPU_QEMU_GENERIC

Add a CPU_QEMU_GENERIC case to various switch statements.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Add generic QEMU PRid and cpu type identifiers
Leonid Yegoshin [Mon, 27 Oct 2014 10:12:23 +0000 (10:12 +0000)]
MIPS: Add generic QEMU PRid and cpu type identifiers

Latest versions of QEMU added support for mips32r6-generic and
mips64r6-generic cpu types so add related definitions in preparation
of MIPS R6 support. This is also used for QEMU R2 generic cpus.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
9 years agoMIPS: Makefile: Move the ASEs checks after setting the core's CFLAGS
Markos Chandras [Mon, 2 Feb 2015 15:41:01 +0000 (15:41 +0000)]
MIPS: Makefile: Move the ASEs checks after setting the core's CFLAGS

We need to check the ASEs support against the core's CFLAGS instead
of depending to the default -march option from the toolchain.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9180/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: HTW: Prevent accidental HTW start due to nested htw_{start, stop}
Markos Chandras [Mon, 26 Jan 2015 13:04:33 +0000 (13:04 +0000)]
MIPS: HTW: Prevent accidental HTW start due to nested htw_{start, stop}

activate_mm() and switch_mm() call get_new_mmu_context() which in turn
can enable the HTW before the entryhi is changed with the new ASID.
Since the latter will enable the HTW in local_flush_tlb_all(),
then there is a small timing window where the HTW is running with the
new ASID but with an old pgd since the TLBMISS_HANDLER_SETUP_PGD
hasn't assigned a new one yet. In order to prevent that, we introduce a
simple htw counter to avoid starting HTW accidentally due to nested
htw_{start,stop}() sequences. Moreover, since various IPI calls can
enforce TLB flushing operations on a different core, such an operation
may interrupt another htw_{stop,start} in progress leading inconsistent
updates of the htw_seq variable. In order to avoid that, we disable the
interrupts whenever we update that variable.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: <stable@vger.kernel.org> # 3.17+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9118/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: asm: pgtable: Prevent HTW race when updating PTEs
Markos Chandras [Mon, 26 Jan 2015 09:40:36 +0000 (09:40 +0000)]
MIPS: asm: pgtable: Prevent HTW race when updating PTEs

Whenever we modify a page table entry, we need to ensure that the HTW
will not fetch a stable entry. And for that to happen we need to ensure
that HTW is stopped before we modify the said entry otherwise the HTW
may already be in the process of reading that entry and fetching the
old information. As a result of which, we replace the htw_reset() calls
with htw_{stop,start} in more appropriate places. This also removes the
remaining users of htw_reset() and as a result we drop that macro

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: <stable@vger.kernel.org> # 3.17+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9116/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: asm: pgtable: Add c0 hazards on HTW start/stop sequences
Markos Chandras [Mon, 26 Jan 2015 09:40:34 +0000 (09:40 +0000)]
MIPS: asm: pgtable: Add c0 hazards on HTW start/stop sequences

When we use htw_{start,stop}() outside of htw_reset(), we need
to ensure that c0 changes have been propagated properly before
we attempt to continue with subsequence memory operations.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: <stable@vger.kernel.org> # 3.17+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9114/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: mm: Add debug information for userland SIGSEGV signals.
Markos Chandras [Wed, 21 Jan 2015 10:54:46 +0000 (10:54 +0000)]
MIPS: mm: Add debug information for userland SIGSEGV signals.

Commit 41c594ab65fc ("[MIPS] MT: Improved multithreading support.")
removed useful debug information for userland segmentation faults.
This patch bring this back along with the ability to determine the
name of the object file where the EPC and RA registers point at.
Furthermore, we select the SYSCTL_EXCEPTION_TRACE symbol for MIPS
which is the de facto solution to turn userland exception logging
on and off via the /proc/sys/debug/exception-trace file.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9089/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for MIPS
Paul Burton [Thu, 8 Jan 2015 12:17:37 +0000 (12:17 +0000)]
MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for MIPS

Userland code may be built using an ABI which permits linking to objects
that have more restrictive floating point requirements. For example,
userland code may be built to target the O32 FPXX ABI. Such code may be
linked with other FPXX code, or code built for either one of the more
restrictive FP32 or FP64. When linking with more restrictive code, the
overall requirement of the process becomes that of the more restrictive
code. The kernel has no way to know in advance which mode the process
will need to be executed in, and indeed it may need to change during
execution. The dynamic loader is the only code which will know the
overall required mode, and so it needs to have a means to instruct the
kernel to switch the FP mode of the process.

This patch introduces 2 new options to the prctl syscall which provide
such a capability. The FP mode of the process is represented as a
simple bitmask combining a number of mode bits mirroring those present
in the hardware. Userland can either retrieve the current FP mode of
the process:

  mode = prctl(PR_GET_FP_MODE);

or modify the current FP mode of the process:

  err = prctl(PR_SET_FP_MODE, new_mode);

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Matthew Fortune <matthew.fortune@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8899/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: cevt-r4k: Drop GIC special case
James Hogan [Mon, 19 Jan 2015 12:00:55 +0000 (12:00 +0000)]
MIPS: cevt-r4k: Drop GIC special case

The cevt-r4k driver used to call into the GIC driver to find whether the
timer was pending, but only with External Interrupt Controller (EIC)
mode, where the Cause.IP bits can't be used as they encode the interrupt
priority level (Cause.RIPL) instead.

However commit e9de688dac65 ("irqchip: mips-gic: Support local
interrupts") changed the condition from cpu_has_veic to gic_present.
This fails on cores such as P5600 which have a GIC but the local
interrupts aren't routable by the GIC, causing c0_compare_int_usable()
to consider the interrupt unusable so r4k_clockevent_init() fails.

The previous behaviour, added in commit 98b67c37db33 ("MIPS: Add EIC
support for GIC."), wasn't really correct either as far as I can tell,
since P5600 apparently supports EIC mode too, and in any case the use of
Cause.TI with r2 should have been sufficient anyway since commit
010c108d7af7 ("MIPS: PowerTV: Fix support for timer interrupts with > 64
external IRQs").

Therefore drop the call into the gic driver altogether, and add a
comment in c0_compare_int_pending() to clarify that Cause.TI does get
checked since MIPS r2.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Fixes: e9de688dac65 ("irqchip: mips-gic: Support local interrupts")
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Steven J. Hill <steven.hill@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9077/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: elf2ecoff: Fix warning due to dead code.
Ralf Baechle [Wed, 4 Feb 2015 12:04:03 +0000 (13:04 +0100)]
MIPS: elf2ecoff: Fix warning due to dead code.

  HOSTCC  arch/mips/boot/elf2ecoff
arch/mips/boot/elf2ecoff.c: In function ‘main’:
arch/mips/boot/elf2ecoff.c:271:8: warning: variable ‘shstrtab’ set but not used [-Wunused-but-set-variable]
  char *shstrtab;

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Add struct pci_ops member names to initialization
Rob Herring [Sat, 10 Jan 2015 02:34:36 +0000 (20:34 -0600)]
MIPS: Add struct pci_ops member names to initialization

Some instances of pci_ops initialization rely on the read/write members'
location in the struct. This is fragile and may break when adding new
members to the beginning of the struct.

[ralf@linux-mips.org: indent = with tabs for consistency.]

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: linux-pci@vger.kernel.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Patchwork: https://patchwork.linux-mips.org/patch/8915/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Remove unused dt_setup_arch()
Geert Uytterhoeven [Mon, 12 Jan 2015 20:19:13 +0000 (21:19 +0100)]
MIPS: Remove unused dt_setup_arch()

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8928/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: ARC: Add declarations for a few missing ARC firmware functions.
Ralf Baechle [Fri, 2 Jan 2015 15:00:58 +0000 (16:00 +0100)]
MIPS: ARC: Add declarations for a few missing ARC firmware functions.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: ARC: Use __noreturn instead of open coded attributes in declarations.
Ralf Baechle [Fri, 2 Jan 2015 14:59:06 +0000 (15:59 +0100)]
MIPS: ARC: Use __noreturn instead of open coded attributes in declarations.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: IP27: Use __noreturn instead of open coded attributes in declarations.
Ralf Baechle [Fri, 2 Jan 2015 14:57:40 +0000 (15:57 +0100)]
MIPS: IP27: Use __noreturn instead of open coded attributes in declarations.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: IP32: Use __noreturn instead of open coded attributes in declarations.
Ralf Baechle [Fri, 2 Jan 2015 14:56:28 +0000 (15:56 +0100)]
MIPS: IP32: Use __noreturn instead of open coded attributes in declarations.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: ARC: Use __noreturn / unreachable in ARC termination functions.
Ralf Baechle [Fri, 2 Jan 2015 16:16:24 +0000 (17:16 +0100)]
MIPS: ARC: Use __noreturn / unreachable in ARC termination functions.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Use generic csum_tcpudp_magic for MIPS.
Ralf Baechle [Wed, 17 Dec 2014 22:05:10 +0000 (23:05 +0100)]
MIPS: Use generic csum_tcpudp_magic for MIPS.

Its implementation is identical to MIPS.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Use <asm-generic/checksum.h>
Ralf Baechle [Wed, 17 Dec 2014 22:03:46 +0000 (23:03 +0100)]
MIPS: Use <asm-generic/checksum.h>

Right now the MIPS <asm/checksum.h> still overrides all functions.  This
will change in the future.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agoMIPS: Rewrite csum_fold to plain C.
Ralf Baechle [Wed, 17 Dec 2014 13:06:00 +0000 (14:06 +0100)]
MIPS: Rewrite csum_fold to plain C.

This isn't only short and easier to read and fully portable but also
shrinks a Malta kernel's by 160 bytes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
9 years agolinux 3.19-rc4
Linus Torvalds [Sun, 11 Jan 2015 20:44:53 +0000 (12:44 -0800)]
linux 3.19-rc4

9 years agoMerge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Linus Torvalds [Sun, 11 Jan 2015 20:44:10 +0000 (12:44 -0800)]
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

Pull ARM fixes from Russell King:
 "Three small fixes from over the Christmas period, and wiring up the
  new execveat syscall for ARM"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8275/1: mm: fix PMD_SECT_RDONLY undeclared compile error
  ARM: 8253/1: mm: use phys_addr_t type in map_lowmem() for kernel mem region
  ARM: 8249/1: mm: dump: don't skip regions
  ARM: wire up execveat syscall

9 years agoMerge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 11 Jan 2015 19:53:46 +0000 (11:53 -0800)]
Merge branch 'x86-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull x86 fixes from Ingo Molnar:
 "Misc fixes: two vdso fixes, two kbuild fixes and a boot failure fix
  with certain odd memory mappings"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, vdso: Use asm volatile in __getcpu
  x86/build: Clean auto-generated processor feature files
  x86: Fix mkcapflags.sh bash-ism
  x86: Fix step size adjustment during initial memory mapping
  x86_64, vdso: Fix the vdso address randomization algorithm

9 years agoMerge branch 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 11 Jan 2015 19:51:49 +0000 (11:51 -0800)]
Merge branch 'sched-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull scheduler fixes from Ingo Molnar:
 "Misc fixes: group scheduling corner case fix, two deadline scheduler
  fixes, effective_load() overflow fix, nested sleep fix, 6144 CPUs
  system fix"

* 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  sched/fair: Fix RCU stall upon -ENOMEM in sched_create_group()
  sched/deadline: Avoid double-accounting in case of missed deadlines
  sched/deadline: Fix migration of SCHED_DEADLINE tasks
  sched: Fix odd values in effective_load() calculations
  sched, fanotify: Deal with nested sleeps
  sched: Fix KMALLOC_MAX_SIZE overflow during cpumask allocation

9 years agoMerge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 11 Jan 2015 19:47:45 +0000 (11:47 -0800)]
Merge branch 'perf-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull perf fixes from Ingo Molnar:
 "Mostly tooling fixes, but also some kernel side fixes: uncore PMU
  driver fix, user regs sampling fix and an instruction decoder fix that
  unbreaks PEBS precise sampling"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86/uncore/hsw-ep: Handle systems with only two SBOXes
  perf/x86_64: Improve user regs sampling
  perf: Move task_pt_regs sampling into arch code
  x86: Fix off-by-one in instruction decoder
  perf hists browser: Fix segfault when showing callchain
  perf callchain: Free callchains when hist entries are deleted
  perf hists: Fix children sort key behavior
  perf diff: Fix to sort by baseline field by default
  perf list: Fix --raw-dump option
  perf probe: Fix crash in dwarf_getcfi_elf
  perf probe: Fix to fall back to find probe point in symbols
  perf callchain: Append callchains only when requested
  perf ui/tui: Print backtrace symbols when segfault occurs
  perf report: Show progress bar for output resorting

9 years agoMerge branch 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 11 Jan 2015 19:46:31 +0000 (11:46 -0800)]
Merge branch 'locking-urgent-for-linus' of git://git./linux/kernel/git/tip/tip

Pull locking fixes from Ingo Molnar:
 "A liblockdep fix and a mutex_unlock() mutex-debugging fix"

* 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  mutex: Always clear owner field upon mutex_unlock()
  tools/liblockdep: Fix debug_check thinko in mutex destroy

9 years agomm: fix corner case in anon_vma endless growing prevention
Konstantin Khlebnikov [Sun, 11 Jan 2015 13:54:06 +0000 (16:54 +0300)]
mm: fix corner case in anon_vma endless growing prevention

Fix for BUG_ON(anon_vma->degree) splashes in unlink_anon_vmas() ("kernel
BUG at mm/rmap.c:399!") caused by commit 7a3ef208e662 ("mm: prevent
endless growth of anon_vma hierarchy")

Anon_vma_clone() is usually called for a copy of source vma in
destination argument.  If source vma has anon_vma it should be already
in dst->anon_vma.  NULL in dst->anon_vma is used as a sign that it's
called from anon_vma_fork().  In this case anon_vma_clone() finds
anon_vma for reusing.

Vma_adjust() calls it differently and this breaks anon_vma reusing
logic: anon_vma_clone() links vma to old anon_vma and updates degree
counters but vma_adjust() overrides vma->anon_vma right after that.  As
a result final unlink_anon_vmas() decrements degree for wrong anon_vma.

This patch assigns ->anon_vma before calling anon_vma_clone().

Signed-off-by: Konstantin Khlebnikov <koct9i@gmail.com>
Reported-and-tested-by: Chris Clayton <chris2553@googlemail.com>
Reported-and-tested-by: Oded Gabbay <oded.gabbay@amd.com>
Reported-and-tested-by: Chih-Wei Huang <cwhuang@android-x86.org>
Acked-by: Rik van Riel <riel@redhat.com>
Acked-by: Vlastimil Babka <vbabka@suse.cz>
Cc: Daniel Forrest <dan.forrest@ssec.wisc.edu>
Cc: Michal Hocko <mhocko@suse.cz>
Cc: stable@vger.kernel.org # to match back-porting of 7a3ef208e662
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
9 years agomm: Don't count the stack guard page towards RLIMIT_STACK
Linus Torvalds [Sun, 11 Jan 2015 19:33:57 +0000 (11:33 -0800)]
mm: Don't count the stack guard page towards RLIMIT_STACK

Commit fee7e49d4514 ("mm: propagate error from stack expansion even for
guard page") made sure that we return the error properly for stack
growth conditions.  It also theorized that counting the guard page
towards the stack limit might break something, but also said "Let's see
if anybody notices".

Somebody did notice.  Apparently android-x86 sets the stack limit very
close to the limit indeed, and including the guard page in the rlimit
check causes the android 'zygote' process problems.

So this adds the (fairly trivial) code to make the stack rlimit check be
against the actual real stack size, rather than the size of the vma that
includes the guard page.

Reported-and-tested-by: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Jay Foad <jay.foad@gmail.com>
Cc: stable@kernel.org # to match back-porting of fee7e49d4514
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
9 years agoMerge branch 'core/urgent' into locking/urgent, to collect all pending locking fixes
Ingo Molnar [Sun, 11 Jan 2015 08:18:05 +0000 (09:18 +0100)]
Merge branch 'core/urgent' into locking/urgent, to collect all pending locking fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agoMerge tag 'vfio-v3.19-rc4' of git://github.com/awilliam/linux-vfio
Linus Torvalds [Sat, 10 Jan 2015 20:23:03 +0000 (12:23 -0800)]
Merge tag 'vfio-v3.19-rc4' of git://github.com/awilliam/linux-vfio

Pull VFIO fix from Alex Williamson:
 "Fix PCI header check in vfio_pci_probe() (Wei Yang)"

* tag 'vfio-v3.19-rc4' of git://github.com/awilliam/linux-vfio:
  vfio-pci: Fix the check on pci device type in vfio_pci_probe()

9 years agoMerge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi
Linus Torvalds [Sat, 10 Jan 2015 19:59:25 +0000 (11:59 -0800)]
Merge tag 'scsi-fixes' of git://git./linux/kernel/git/jejb/scsi

Pull SCSI fix from James Bottomley:
 "Just one fix: a qlogic busy wait regression"

* tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
  qla2xxx: fix busy wait regression

9 years agoMerge tag 'sound-3.19-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...
Linus Torvalds [Sat, 10 Jan 2015 05:23:27 +0000 (21:23 -0800)]
Merge tag 'sound-3.19-rc4' of git://git./linux/kernel/git/tiwai/sound

Pull sound fixes from Takashi Iwai:
 "All a few small regression or stable fixes: a Nvidia HDMI ID addition,
  a regression fix for CAIAQ stream count, a typo fix for GPIO setup
  with STAC/IDT HD-audio codecs, and a Fireworks big-endian fix"

* tag 'sound-3.19-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  ALSA: fireworks: fix an endianness bug for transaction length
  ALSA: hda - Add new GPU codec ID 0x10de0072 to snd-hda
  ALSA: hda - Fix wrong gpio_dir & gpio_mask hint setups for IDT/STAC codecs
  ALSA: snd-usb-caiaq: fix stream count check

9 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid
Linus Torvalds [Sat, 10 Jan 2015 05:18:48 +0000 (21:18 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/jikos/hid

Pull HID updates from Jiri Kosina:

 - bounds checking fixes in logitech and roccat drivers, from Peter Wu
   and Dan Carpenter

 - double-kfree fix in i2c-hid driver on bus shutdown, from Mika
   Westerberg

 - a couple of various small driver fixes

 - a few device id additions

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid:
  HID: roccat: potential out of bounds in pyra_sysfs_write_settings()
  HID: Add a new id 0x501a for Genius MousePen i608X
  HID: logitech-hidpp: prefix the name with "Logitech"
  HID: logitech-hidpp: avoid unintended fall-through
  HID: Allow HID_BATTERY_STRENGTH to be enabled
  HID: i2c-hid: Do not free buffers in i2c_hid_stop()
  HID: add battery quirk for USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_ISO keyboard
  HID: logitech-hidpp: check WTP report length
  HID: logitech-dj: check report length

9 years agoMerge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Linus Torvalds [Sat, 10 Jan 2015 05:13:34 +0000 (21:13 -0800)]
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
 "I'm briefly working between holidays and LCA, so this is close to a
  couple of weeks of fixes,

  Two sets of amdkfd fixes, this is a new feature this kernel, and this
  pull fixes a few issues since it got merged, ordering when built-in to
  kernel and also the iommu vs gpu ordering patch, it also reworks the
  ioctl before the initial release.

  Otherwise:
   - radeon: some misc fixes all over, hdmi, 4k, dpm
   - nouveau: mcp77 init fixes, oops fix, bug on fix, msi fix
   - i915: power fixes, revert VGACNTR patch

  Probably be quiteer next week since I'll be at LCA anyways"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (33 commits)
  drm/amdkfd: rewrite kfd_ioctl() according to drm_ioctl()
  drm/amdkfd: reformat IOCTL definitions to drm-style
  drm/amdkfd: Do copy_to/from_user in general kfd_ioctl()
  drm/radeon: integer underflow in radeon_cp_dispatch_texture()
  drm/radeon: adjust default bapm settings for KV
  drm/radeon: properly filter DP1.2 4k modes on non-DP1.2 hw
  drm/radeon: fix sad_count check for dce3
  drm/radeon: KV has three PPLLs (v2)
  drm/amdkfd: unmap VMID<-->PASID when relesing VMID (non-HWS)
  drm/radeon: Init amdkfd only if it was compiled
  amdkfd: actually allocate longs for the pasid bitmask
  drm/nouveau/nouveau: Do not BUG_ON(!spin_is_locked()) on UP
  drm/nv4c/mc: disable msi
  drm/nouveau/fb/ram/mcp77: enable NISO poller
  drm/nouveau/fb/ram/mcp77: use carveout reg to determine size
  drm/nouveau/fb/ram/mcp77: subclass nouveau_ram
  drm/nouveau: wake up the card if necessary during gem callbacks
  drm/nouveau/device: Add support for GK208B, resolves bug 86935
  drm/nouveau: fix missing return statement in nouveau_ttm_tt_unpopulate
  drm/nouveau/bios: fix oops on pre-nv50 chipsets
  ...

9 years agoMerge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Linus Torvalds [Sat, 10 Jan 2015 04:57:58 +0000 (20:57 -0800)]
Merge tag 'arm64-fixes' of git://git./linux/kernel/git/arm64/linux

Pull arm64 fixes from Will Deacon:
 "Here is a handful of minor arm64 fixes discovered and fixed over the
  Christmas break.  The main part is adding some missing #includes that
  we seem to be getting transitively but have started causing problems
  in -next.

   - Fix early mapping fixmap corruption by EFI runtime services
   - Fix __NR_compat_syscalls off-by-one
   - Add missing sanity checks for some 32-bit registers
   - Add some missing #includes which we get transitively
   - Remove unused prepare_to_copy() macro"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64/efi: add missing call to early_ioremap_reset()
  arm64: fix missing asm/io.h include in kernel/smp_spin_table.c
  arm64: fix missing asm/alternative.h include in kernel/module.c
  arm64: fix missing linux/bug.h include in asm/arch_timer.h
  arm64: fix missing asm/pgtable-hwdef.h include in asm/processor.h
  arm64: sanity checks: add missing AArch32 registers
  arm64: Remove unused prepare_to_copy()
  arm64: Correct __NR_compat_syscalls for bpf

9 years agoMerge tag 'for_linus-3.19-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/jwess...
Linus Torvalds [Sat, 10 Jan 2015 04:51:10 +0000 (20:51 -0800)]
Merge tag 'for_linus-3.19-rc4' of git://git./linux/kernel/git/jwessel/kgdb

Pull kgdb/kdb fixes from Jason Wessel:
 "These have been around since 3.17 and in kgdb-next for the last 9
  weeks and some will go back to -stable.

  Summary of changes:

  Cleanups
   - kdb: Remove unused command flags, repeat flags and KDB_REPEAT_NONE

  Fixes
   - kgdb/kdb: Allow access on a single core, if a CPU round up is
     deemed impossible, which will allow inspection of the now "trashed"
     kernel
   - kdb: Add enable mask for the command groups
   - kdb: access controls to restrict sensitive commands"

* tag 'for_linus-3.19-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/kgdb:
  kernel/debug/debug_core.c: Logging clean-up
  kgdb: timeout if secondary CPUs ignore the roundup
  kdb: Allow access to sensitive commands to be restricted by default
  kdb: Add enable mask for groups of commands
  kdb: Categorize kdb commands (similar to SysRq categorization)
  kdb: Remove KDB_REPEAT_NONE flag
  kdb: Use KDB_REPEAT_* values as flags
  kdb: Rename kdb_register_repeat() to kdb_register_flags()
  kdb: Rename kdb_repeat_t to kdb_cmdflags_t, cmd_repeat to cmd_flags
  kdb: Remove currently unused kdbtab_t->cmd_flags

9 years agoMerge branch 'for-3.19' of git://linux-nfs.org/~bfields/linux
Linus Torvalds [Sat, 10 Jan 2015 02:10:48 +0000 (18:10 -0800)]
Merge branch 'for-3.19' of git://linux-nfs.org/~bfields/linux

Pull two nfsd bugfixes from Bruce Fields.

* 'for-3.19' of git://linux-nfs.org/~bfields/linux:
  rpc: fix xdr_truncate_encode to handle buffer ending on page boundary
  nfsd: fix fi_delegees leak when fi_had_conflict returns true

9 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph...
Linus Torvalds [Sat, 10 Jan 2015 01:55:00 +0000 (17:55 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/sage/ceph-client

Pull two Ceph fixes from Sage Weil:
 "These are both pretty trivial: a sparse warning fix and size_t printk
  thing"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client:
  libceph: fix sparse endianness warnings
  ceph: use %zu for len in ceph_fill_inline_data()

9 years agoMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux...
Linus Torvalds [Sat, 10 Jan 2015 01:46:07 +0000 (17:46 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/mason/linux-btrfs

Pull btrfs fixes from Chris Mason:
 "None of these are huge, but my commit does fix a regression from 3.18
  that could cause lost files during log replay.

  This also adds Dave Sterba to the list of Btrfs maintainers.  It
  doesn't mean we're doing things differently, but Dave has really been
  helping with the maintainer workload for years"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs:
  Btrfs: don't delay inode ref updates during log replay
  Btrfs: correctly get tree level in tree_backref_for_extent
  Btrfs: call inode_dec_link_count() on mkdir error path
  Btrfs: abort transaction if we don't find the block group
  Btrfs, scrub: uninitialized variable in scrub_extent_for_parity()
  Btrfs: add more maintainers

9 years agoMerge branch 'akpm' (patches from Andrew)
Linus Torvalds [Fri, 9 Jan 2015 23:10:59 +0000 (15:10 -0800)]
Merge branch 'akpm' (patches from Andrew)

Merge misc fixes from Andrew Morton:
 "12 fixes"

* emailed patches from Andrew Morton <akpm@linux-foundation.org>:
  mm, vmscan: prevent kswapd livelock due to pfmemalloc-throttled process being killed
  memcg: fix destination cgroup leak on task charges migration
  mm: memcontrol: switch soft limit default back to infinity
  mm/debug_pagealloc: remove obsolete Kconfig options
  vfs: renumber FMODE_NONOTIFY and add to uniqueness check
  arch/blackfin/mach-bf533/boards/stamp.c: add linux/delay.h
  ocfs2: fix the wrong directory passed to ocfs2_lookup_ino_from_name() when link file
  MAINTAINERS: update rydberg's addresses
  mm: protect set_page_dirty() from ongoing truncation
  mm: prevent endless growth of anon_vma hierarchy
  exit: fix race between wait_consider_task() and wait_task_zombie()
  ocfs2: remove bogus check in dlm_process_recovery_data

9 years agoARM: 8275/1: mm: fix PMD_SECT_RDONLY undeclared compile error
Victor Kamensky [Fri, 9 Jan 2015 17:55:45 +0000 (18:55 +0100)]
ARM: 8275/1: mm: fix PMD_SECT_RDONLY undeclared compile error

In v3.19-rc3 tree when CONFIG_ARM_LPAE and CONFIG_DEBUG_RODATA are enabled
image failed to compile with the following error:

arch/arm/mm/init.c:661:14: error: ‘PMD_SECT_RDONLY’ undeclared here (not in a function)

It seems that '80d6b0c ARM: mm: allow text and rodata sections to be read-only'
and 'ded9477 ARM: 8109/1: mm: Modify pte_write and pmd_write logic for LPAE'
commits crossed. 80d6b0c uses PMD_SECT_RDONLY macro but ded9477 renames it
and uses software bits L_PMD_SECT_RDONLY instead.

Fix is to use L_PMD_SECT_RDONLY instead PMD_SECT_RDONLY as ded9477 does in
another places.

Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
9 years agoHID: roccat: potential out of bounds in pyra_sysfs_write_settings()
Dan Carpenter [Fri, 9 Jan 2015 12:32:31 +0000 (15:32 +0300)]
HID: roccat: potential out of bounds in pyra_sysfs_write_settings()

This is a static checker fix.  We write some binary settings to the
sysfs file.  One of the settings is the "->startup_profile".  There
isn't any checking to make sure it fits into the
pyra->profile_settings[] array in the profile_activated() function.

I added a check to pyra_sysfs_write_settings() in both places because
I wasn't positive that the other callers were correct.

Cc: <stable@vger.kernel.org>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
9 years agomutex: Always clear owner field upon mutex_unlock()
Chris Wilson [Tue, 6 Jan 2015 10:29:35 +0000 (10:29 +0000)]
mutex: Always clear owner field upon mutex_unlock()

Currently if DEBUG_MUTEXES is enabled, the mutex->owner field is only
cleared iff debug_locks is active. This exposes a race to other users of
the field where the mutex->owner may be still set to a stale value,
potentially upsetting mutex_spin_on_owner() among others.

References: https://bugs.freedesktop.org/show_bug.cgi?id=87955
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Davidlohr Bueso <dave@stgolabs.net>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/1420540175-30204-1-git-send-email-chris@chris-wilson.co.uk
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agosched/fair: Fix RCU stall upon -ENOMEM in sched_create_group()
Tetsuo Handa [Thu, 25 Dec 2014 06:51:21 +0000 (15:51 +0900)]
sched/fair: Fix RCU stall upon -ENOMEM in sched_create_group()

When alloc_fair_sched_group() in sched_create_group() fails,
free_sched_group() is called, and free_fair_sched_group() is called by
free_sched_group(). Since destroy_cfs_bandwidth() is called by
free_fair_sched_group() without calling init_cfs_bandwidth(),
RCU stall occurs at hrtimer_cancel():

  INFO: rcu_sched self-detected stall on CPU { 1}  (t=60000 jiffies g=13074 c=13073 q=0)
  Task dump for CPU 1:
  (fprintd)       R  running task        0  6249      1 0x00000088
  ...
  Call Trace:
   <IRQ>  [<ffffffff81094988>] sched_show_task+0xa8/0x110
   [<ffffffff81097acd>] dump_cpu_task+0x3d/0x50
   [<ffffffff810c3a80>] rcu_dump_cpu_stacks+0x90/0xd0
   [<ffffffff810c7751>] rcu_check_callbacks+0x491/0x700
   [<ffffffff810cbf2b>] update_process_times+0x4b/0x80
   [<ffffffff810db046>] tick_sched_handle.isra.20+0x36/0x50
   [<ffffffff810db0a2>] tick_sched_timer+0x42/0x70
   [<ffffffff810ccb19>] __run_hrtimer+0x69/0x1a0
   [<ffffffff810db060>] ? tick_sched_handle.isra.20+0x50/0x50
   [<ffffffff810ccedf>] hrtimer_interrupt+0xef/0x230
   [<ffffffff810452cb>] local_apic_timer_interrupt+0x3b/0x70
   [<ffffffff8164a465>] smp_apic_timer_interrupt+0x45/0x60
   [<ffffffff816485bd>] apic_timer_interrupt+0x6d/0x80
   <EOI>  [<ffffffff810cc588>] ? lock_hrtimer_base.isra.23+0x18/0x50
   [<ffffffff81193cf1>] ? __kmalloc+0x211/0x230
   [<ffffffff810cc9d2>] hrtimer_try_to_cancel+0x22/0xd0
   [<ffffffff81193cf1>] ? __kmalloc+0x211/0x230
   [<ffffffff810ccaa2>] hrtimer_cancel+0x22/0x30
   [<ffffffff810a3cb5>] free_fair_sched_group+0x25/0xd0
   [<ffffffff8108df46>] free_sched_group+0x16/0x40
   [<ffffffff810971bb>] sched_create_group+0x4b/0x80
   [<ffffffff810aa383>] sched_autogroup_create_attach+0x43/0x1c0
   [<ffffffff8107dc9c>] sys_setsid+0x7c/0x110
   [<ffffffff81647729>] system_call_fastpath+0x12/0x17

Check whether init_cfs_bandwidth() was called before calling
destroy_cfs_bandwidth().

Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
[ Move the check into destroy_cfs_bandwidth() to aid compilability. ]
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Paul Turner <pjt@google.com>
Cc: Ben Segall <bsegall@google.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/201412252210.GCC30204.SOMVFFOtQJFLOH@I-love.SAKURA.ne.jp
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agosched/deadline: Avoid double-accounting in case of missed deadlines
Luca Abeni [Wed, 17 Dec 2014 10:50:32 +0000 (11:50 +0100)]
sched/deadline: Avoid double-accounting in case of missed deadlines

The dl_runtime_exceeded() function is supposed to ckeck if
a SCHED_DEADLINE task must be throttled, by checking if its
current runtime is <= 0. However, it also checks if the
scheduling deadline has been missed (the current time is
larger than the current scheduling deadline), further
decreasing the runtime if this happens.
This "double accounting" is wrong:

- In case of partitioned scheduling (or single CPU), this
  happens if task_tick_dl() has been called later than expected
  (due to small HZ values). In this case, the current runtime is
  also negative, and replenish_dl_entity() can take care of the
  deadline miss by recharging the current runtime to a value smaller
  than dl_runtime

- In case of global scheduling on multiple CPUs, scheduling
  deadlines can be missed even if the task did not consume more
  runtime than expected, hence penalizing the task is wrong

This patch fix this problem by throttling a SCHED_DEADLINE task
only when its runtime becomes negative, and not modifying the runtime

Signed-off-by: Luca Abeni <luca.abeni@unitn.it>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Juri Lelli <juri.lelli@gmail.com>
Cc: <stable@vger.kernel.org>
Cc: Dario Faggioli <raistlin@linux.it>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/1418813432-20797-3-git-send-email-luca.abeni@unitn.it
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agosched/deadline: Fix migration of SCHED_DEADLINE tasks
Luca Abeni [Wed, 17 Dec 2014 10:50:31 +0000 (11:50 +0100)]
sched/deadline: Fix migration of SCHED_DEADLINE tasks

According to global EDF, tasks should be migrated between runqueues
without checking if their scheduling deadlines and runtimes are valid.
However, SCHED_DEADLINE currently performs such a check:
a migration happens doing:

deactivate_task(rq, next_task, 0);
set_task_cpu(next_task, later_rq->cpu);
activate_task(later_rq, next_task, 0);

which ends up calling dequeue_task_dl(), setting the new CPU, and then
calling enqueue_task_dl().

enqueue_task_dl() then calls enqueue_dl_entity(), which calls
update_dl_entity(), which can modify scheduling deadline and runtime,
breaking global EDF scheduling.

As a result, some of the properties of global EDF are not respected:
for example, a taskset {(30, 80), (40, 80), (120, 170)} scheduled on
two cores can have unbounded response times for the third task even
if 30/80+40/80+120/170 = 1.5809 < 2

This can be fixed by invoking update_dl_entity() only in case of
wakeup, or if this is a new SCHED_DEADLINE task.

Signed-off-by: Luca Abeni <luca.abeni@unitn.it>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Juri Lelli <juri.lelli@gmail.com>
Cc: <stable@vger.kernel.org>
Cc: Dario Faggioli <raistlin@linux.it>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/1418813432-20797-2-git-send-email-luca.abeni@unitn.it
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agosched: Fix odd values in effective_load() calculations
Yuyang Du [Fri, 19 Dec 2014 00:29:56 +0000 (08:29 +0800)]
sched: Fix odd values in effective_load() calculations

In effective_load, we have (long w * unsigned long tg->shares) / long W,
when w is negative, it is cast to unsigned long and hence the product is
insanely large. Fix this by casting tg->shares to long.

Reported-by: Sasha Levin <sasha.levin@oracle.com>
Signed-off-by: Yuyang Du <yuyang.du@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Dave Jones <davej@redhat.com>
Cc: Andrey Ryabinin <a.ryabinin@samsung.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/20141219002956.GA25405@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agosched, fanotify: Deal with nested sleeps
Peter Zijlstra [Tue, 16 Dec 2014 15:28:38 +0000 (16:28 +0100)]
sched, fanotify: Deal with nested sleeps

As per e23738a7300a ("sched, inotify: Deal with nested sleeps").

fanotify_read is a wait loop with sleeps in. Wait loops rely on
task_struct::state and sleeps do too, since that's the only means of
actually sleeping. Therefore the nested sleeps destroy the wait loop
state and the wait loop breaks the sleep functions that assume
TASK_RUNNING (mutex_lock).

Fix this by using the new woken_wake_function and wait_woken() stuff,
which registers wakeups in wait and thereby allows shrinking the
task_state::state changes to the actual sleep part.

Reported-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reported-by: Sedat Dilek <sedat.dilek@gmail.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Eric Paris <eparis@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Eric Paris <eparis@redhat.com>
Link: http://lkml.kernel.org/r/20141216152838.GZ3337@twins.programming.kicks-ass.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agoperf/x86/uncore/hsw-ep: Handle systems with only two SBOXes
Andi Kleen [Tue, 6 Jan 2015 22:34:35 +0000 (14:34 -0800)]
perf/x86/uncore/hsw-ep: Handle systems with only two SBOXes

There was another report of a boot failure with a #GP fault in the
uncore SBOX initialization. The earlier work around was not enough
for this system.

The boot was failing while trying to initialize the third SBOX.

This patch detects parts with only two SBOXes and limits the number
of SBOX units to two there.

Stable material, as it affects boot problems on 3.18.

Tested-by: Andreas Oehler <andreas@oehler-net.de>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: <stable@vger.kernel.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Yan, Zheng <zheng.z.yan@intel.com>
Link: http://lkml.kernel.org/r/1420583675-9163-1-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agoperf/x86_64: Improve user regs sampling
Andy Lutomirski [Sun, 4 Jan 2015 18:36:20 +0000 (10:36 -0800)]
perf/x86_64: Improve user regs sampling

Perf reports user regs for kernel-mode samples so that samples can
be backtraced through user code.  The old code was very broken in
syscall context, resulting in useless backtraces.

The new code, in contrast, is still dangerously racy, but it should
at least work most of the time.

Tested-by: Jiri Olsa <jolsa@kernel.org>
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: chenggang.qcg@taobao.com
Cc: Wu Fengguang <fengguang.wu@intel.com>
Cc: Namhyung Kim <namhyung@gmail.com>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/243560c26ff0f739978e2459e203f6515367634d.1420396372.git.luto@amacapital.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>
9 years agoperf: Move task_pt_regs sampling into arch code
Andy Lutomirski [Sun, 4 Jan 2015 18:36:19 +0000 (10:36 -0800)]
perf: Move task_pt_regs sampling into arch code

On x86_64, at least, task_pt_regs may be only partially initialized
in many contexts, so x86_64 should not use it without extra care
from interrupt context, let alone NMI context.

This will allow x86_64 to override the logic and will supply some
scratch space to use to make a cleaner copy of user regs.

Tested-by: Jiri Olsa <jolsa@kernel.org>
Signed-off-by: Andy Lutomirski <luto@amacapital.net>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: chenggang.qcg@taobao.com
Cc: Wu Fengguang <fengguang.wu@intel.com>
Cc: Namhyung Kim <namhyung@gmail.com>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: David Ahern <dsahern@gmail.com>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Jean Pihet <jean.pihet@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mark Salter <msalter@redhat.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/e431cd4c18c2e1c44c774f10758527fb2d1025c4.1420396372.git.luto@amacapital.net
Signed-off-by: Ingo Molnar <mingo@kernel.org>