Tomeu Vizoso [Tue, 2 Dec 2014 07:54:19 +0000 (08:54 +0100)]
clk: Don't try to use a struct clk* after it could have been freed
As __clk_release could call kfree on clk and then we wouldn't have a safe way
of getting the module that owns the clock.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Fixes:
fcb0ee6a3d33 ("clk: Implement clk_unregister")
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Tomeu Vizoso [Tue, 2 Dec 2014 07:54:18 +0000 (08:54 +0100)]
clk: Remove unused function __clk_get_prepare_count
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Michael Turquette [Sat, 29 Nov 2014 05:11:10 +0000 (21:11 -0800)]
Merge tag 'ib-mfd-regulator-clk-v3.19' of git://git./linux/kernel/git/lee/mfd into clk-next
Immutable branch between MFD, Regulator and Clk, due for v3.19
Michael Turquette [Sat, 29 Nov 2014 05:00:16 +0000 (21:00 -0800)]
Merge tag 'v3.19-rockchip-clk2' of git://git./linux/kernel/git/mmind/linux-rockchip into clk-next
- clock phase setting capability for the rk3288 mmc clocks
- pll init to allow syncing to actual rate table values
- some more exported clocks
- fixes for some clocks (typos etc) all of them not yet used
in actual drivers
Alexandru M Stan [Thu, 27 Nov 2014 01:30:27 +0000 (17:30 -0800)]
clk: rockchip: Add support for the mmc clock phases using the framework
This patch adds the 2 physical clocks for the mmc (drive and sample). They're
mostly there for the phase properties, but they also show the true clock
(by dividing by RK3288_MMC_CLKGEN_DIV).
The drive and sample phases are generated by dividing an upstream parent clock
by 2, this allows us to adjust the phase by 90 deg.
There's also an option to have up to 255 delay elements (40-80 picoseconds long).
This driver uses those elements (under the assumption that they're 60 ps long)
to generate approximate 22.5 degrees options. 67.5 (22.5*3) might be as high as
90 deg if the delay elements are as big as 80 ps, so a finer division (smaller
than 22.5) was not picked because the phase might not be monotonic anymore.
Suggested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Alexandru M Stan [Thu, 27 Nov 2014 01:30:26 +0000 (17:30 -0800)]
clk: rockchip: add bindings for the mmc clocks
These clocks represent the physical clocks (including phases) and they will
later be used for clock phase tuning.
Suggested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Sonny Rao [Wed, 19 Nov 2014 07:15:19 +0000 (23:15 -0800)]
clk: rockchip: rk3288 export i2s0_clkout for use in DT
This exposes the clock that comes out of the i2s block which generally
goes to the audio codec.
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
[removed CLK_SET_RATE_PARENT from original patch]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Jeff Chen [Wed, 26 Nov 2014 00:13:03 +0000 (16:13 -0800)]
clk: rockchip: use clock ID for DMC (memory controller) on rk3288
The DMC clocks need to be turned off at runtime. Use the newly
assigned clock IDs to export them.
Signed-off-by: Jeff Chen <cym@rock-chips.com>
[dianders: split into two patches; adjusted commit msg]
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Jeff Chen [Wed, 26 Nov 2014 00:13:02 +0000 (16:13 -0800)]
clk: rockchip: add binding ID for DMC (memory controller) clocks on rk3288
The DMC clocks need to be turned off at runtime, so we should have IDs
so we can export them.
Signed-off-by: Jeff Chen <cym@rock-chips.com>
[dianders: split into two patches; adjusted commit msg]
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
kbuild test robot [Tue, 25 Nov 2014 23:45:12 +0000 (07:45 +0800)]
clk: clk-s2mps11: fix semicolon.cocci warnings
drivers/clk/clk-s2mps11.c:181:2-3: Unneeded semicolon
Removes unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
CC: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chanwoo Choi [Tue, 18 Nov 2014 08:59:43 +0000 (17:59 +0900)]
mfd: s2mps11: Add binding documentation for Samsung S2MPS13 PMIC
This patch adds the binding documentation for Samsung S2MPS13 PMIC
which is similiar with existing S2MPS14 PMIC. S2MPS13 has the different number
of regulators from S2MPS14 and RTC/Clock is the same with the S2MPS14.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Sangbeom Kim <sbkim73@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Chanwoo Choi [Tue, 18 Nov 2014 08:59:41 +0000 (17:59 +0900)]
clk: s2mps11: Add the support for S2MPS13 PMIC clock
This patch adds the support for S2MPS13 PMIC clock which is same with existing
S2MPS14 RTC IP. But, S2MPS13 uses all of clocks (32khz_{ap|bt|cp}).
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Chanwoo Choi [Tue, 18 Nov 2014 08:59:40 +0000 (17:59 +0900)]
regulator: s2mps11: Add support S2MPS13 regulator device
This patch adds S2MPS13 regulator device to existing S2MPS11 device driver.
The S2MPS13 has just different number of regulators from S2MPS14.
The S2MPS13 regulator device includes LDO[1-40] and BUCK[1-10].
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Sangbeom Kim <sbkim73@samsung.com>
Acked-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Chanwoo Choi [Tue, 18 Nov 2014 08:59:39 +0000 (17:59 +0900)]
mfd: sec-core: Add support for S2MPS13 device
This patch adds the support for Samsung S2MPS13 PMIC device to the sec-core MFD
driver. The S2MPS13 is very similar with existing S2MPS14 and includes PMIC/
RTC/CLOCK devices.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Heiko Stuebner [Thu, 20 Nov 2014 19:38:53 +0000 (20:38 +0100)]
clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some plls
Add the new flag to gpll and cpll on rk3188 and similar and to
gpll, cpll and npll on rk3288.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Thu, 20 Nov 2014 19:38:52 +0000 (20:38 +0100)]
clk: rockchip: add optional sync to pll rate parameters
In some cases firmware brings up plls with different parameters than the ones
noted in the rate table for the specific frequency. These firmware-selected
parameters are worse than the tested ones in the pll rate tables but cannot
be changed by a simple clk_set_rate call when the rate stays the same.
Therefore add a ROCKCHIP_PLL_SYNC_RATE flag and implement an init callback
that checks the runtime-parameters against the matching rate table entry
and adjusts them to the table-ones if necessary.
If no rate table is set or the current rate does not match any rate-table
entry no changes are made.
Being able to limit this adjustment to specific plls is necessary to not
touch the ones supplying core components like the apll and dpll supplying
the armcores and dram.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Thu, 20 Nov 2014 19:38:51 +0000 (20:38 +0100)]
clk: rockchip: setup pll_mux data earlier
In some cases we might need to access the data of the pll mux before the actual
mux gets registered - like in the following patch adding an init-callback.
Therefore populate pll_mux before registering the core pll-clock.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Thu, 20 Nov 2014 19:38:50 +0000 (20:38 +0100)]
clk: rockchip: add ability to specify pll-specific flags
This adds a flag parameter to plls that allows us to create
special flags to tweak the behaviour of the plls if necessary.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Michael Turquette [Tue, 25 Nov 2014 02:08:53 +0000 (18:08 -0800)]
Merge tag 'sunxi-clocks-for-3.19' of https://git./linux/kernel/git/mripard/linux into clk-next
Allwinner Clocks additions for 3.19
A few patches that should go through the clock tree, mostly fixes, cleanups,
and new clocks additions to start to support the A80.
Michael Turquette [Tue, 25 Nov 2014 01:45:33 +0000 (17:45 -0800)]
Merge branch 'clk-fixes' into clk-next
Hans de Goede [Sun, 16 Nov 2014 12:56:57 +0000 (13:56 +0100)]
clk: sunxi: gmac-tx-clk mux is not a CLK_MUX_INDEX_BIT mux
A CLK_MUX_INDEX_BIT mux has one bit per parent, but the sun7i-a20-gmac-clk
has 2 bits selecting between 3 possible parents using values of 0, 1, 2,
which makes it a regular mux which should not have CLK_MUX_INDEX_BIT set in
its flag.
However we do not support parent 1 (an external clock), so use a table to
select parent 0 or 2, which are the 2 parents we support.
Note this has not been causing any issues sofar, because we start with a
parent setting of parent 0, and only ever re-parent to parent 2 (for which
we use an index of 1 as we skip parent 1) and with CLK_MUX_INDEX_BIT set
we write a value of 2 for index 1.
Tested on both a cubietruck (which uses rgmii mode) as well as a cs908
(an a31s board which uses mii mode).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Wed, 12 Nov 2014 18:08:31 +0000 (02:08 +0800)]
clk: sunxi: Implement A31 PLL6 as a divs clock for 2x output
Some clock modules on the A31 use PLL6x2 as one of their inputs.
This patch changes the PLL6 implementation for A31 to a divs clock,
i.e. clock with multiple outputs that have different dividers.
The first output will be the normal PLL6 output, and the second
will be PLL6x2.
This patch fixes the PLL6 N factor in the clock driver, and removes
any /2 dividers in the PLL6 factors clock part. The N factor counts
from 1 to 32, mapping to values 0 to 31, as shown in the A31 manual.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Wed, 12 Nov 2014 18:08:30 +0000 (02:08 +0800)]
clk: sunxi: Specify number of child clocks for divs clocks
Currently sunxi_divs_clk_setup assumes the number of child clocks
to be the same as the number of clock-output-names, and a maximum
of SUNXI_DIVS_MAX_QTY child clocks.
On sun6i, PLL6 only has 1 child clock, but the parent would be used
as well, thereby also having it's own clock-output-names entry. This
results in an extra bogus clock being registered.
This patch adds an entry for the number of child clocks alongside
the data structures for them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Thu, 6 Nov 2014 03:40:32 +0000 (11:40 +0800)]
clk: sunxi: Removed unused/incorrect sun6i-a31-apb2-clk driver
This driver does not match the hardware, which is actually compatible
to sun4i-a10-apb1-clk. Since we've switch to the correct one, drop
this driver.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Thu, 6 Nov 2014 03:40:31 +0000 (11:40 +0800)]
ARM: dts: sunxi: Use sun4i-a10-apb1-clk for sun6i/sun8i apb2 clocks.
The apb2 clocks are actually the same as apb1 clocks on the other sunxi
platforms, hence compatible with "allwinner,sun4i-a10-apb1-clk".
Update the dtsi to use the new unified apb1 clk.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Emilio López [Thu, 6 Nov 2014 03:40:30 +0000 (11:40 +0800)]
ARM: dts: sunxi: unify APB1 clock
With the new factors infrastructure in place, we can unify apb1 and
apb1_mux as a single clock now.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
[wens@csie.org: Change apb1 node label to "apb1"; reword commit title]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Julien CHAUVEAU [Fri, 21 Nov 2014 10:08:47 +0000 (11:08 +0100)]
clk: rockchip: fix rk3188 USB HSIC PHY clock divider
The USB HSIC PHY clock divider is set in the register RK2928_CLKSEL_CON(11).
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Julien CHAUVEAU [Fri, 21 Nov 2014 09:27:41 +0000 (10:27 +0100)]
clk: rockchip: fix clock gate for rk3188 spdif_pre
In rk3188 clock branches, spdif_pre gate was set to RK2928_CLKGATE_CON(13) bit 13.
This appears to be a copy-paste error because such a register does not exist.
We correct it to RK2928_CLKGATE_CON(0) and find out that the rk3188 spdif clock
is the same as the rk3066 spdif clock, so we move it to the common clock branches.
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Bintian Wang [Mon, 10 Nov 2014 12:58:31 +0000 (20:58 +0800)]
clk: hi3620: Move const initdata into correct code section
Use __initconst instead of __initdata for constant init data.
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Hans de Goede [Wed, 19 Nov 2014 13:48:59 +0000 (14:48 +0100)]
clk_mux: Fix set_parent doing the wrong thing when INDEX_BIT && index >= 3
If CLK_MUX_INDEX_BIT is set, then each bit turns on / off a single parent,
so theoretically multiple parents could be enabled at the same time, but in
practice only one bit should ever be 1. So to select parent 0, set
the register (*) to 0x01, to select parent 1 set it 0x02, parent 2, 0x04,
parent 3, 0x08, etc.
But the current code does:
if (mux->flags & CLK_MUX_INDEX_BIT)
index = (1 << ffs(index));
Which means that:
For an input index of 0, ffs returns 0, so we set the register
to 0x01, ok.
For an input index of 1, ffs returns 1, so we set the register
to 0x02, ok.
For an input index of 2, ffs returns 2, so we set the register
to 0x04, ok.
For an input index of 3, ffs returns 1, so we set the register
to 0x02, not good!
The code should simply be:
if (mux->flags & CLK_MUX_INDEX_BIT)
index = 1 << index;
Which always does the right thing, this commit fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Michael Turquette [Wed, 19 Nov 2014 19:25:37 +0000 (11:25 -0800)]
Merge branch 'for-v3.19/exynos-clk' of git://linuxtv.org/snawrocki/samsung into clk-next-exynos
Geert Uytterhoeven [Mon, 10 Nov 2014 18:49:34 +0000 (19:49 +0100)]
clk: shmobile: Deprecate renesas,clock-indices
Commit
8e33f91a0b84ae19 ("clk: shmobile: clk-mstp: change to using
clock-indices") forgot to replace all occurrences of
"renesas,clock-indices" in the driver-specific binding documentation.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Michael Turquette [Tue, 18 Nov 2014 23:11:52 +0000 (15:11 -0800)]
Merge branch 'clk-next-shmobile' into clk-next
Zhen Lei [Fri, 14 Nov 2014 02:10:40 +0000 (10:10 +0800)]
clk: delete a local variable's repeated assignment
It's the same to the next statement, "ret = clk->parent". I think compiler will
optimize it, it's just not looking well.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Michael Turquette [Tue, 18 Nov 2014 22:00:44 +0000 (14:00 -0800)]
Merge tag 'v3.19-rockchip-clk1' of git://git./linux/kernel/git/mmind/linux-rockchip into clk-next-rockchip
- fixes for clock ordering/rate issues
- do not keep all clocks enabled anymore
- allow special pll rates for special cases
Julien CHAUVEAU [Tue, 18 Nov 2014 11:10:43 +0000 (12:10 +0100)]
clk: rockchip: fix parent clock for rk3188 hclk_lcdc1
The parent clock for hclk_lcdc1 was set to aclk_cpu instead of hclk_cpu.
Signed-off-by: Julien CHAUVEAU <julien.chauveau@neo-technologies.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Robert Jarzmik [Mon, 6 Oct 2014 23:07:59 +0000 (01:07 +0200)]
clk: pxa: keep clocks initialization separated per variant
Have each pxa variant (pxa25x, pxa27x, pxa3xx) have its own device-tree
clock initializing function, to be able to register its own specific
core clocks.
Apply that change specifically to pxa27x.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Robert Jarzmik [Mon, 6 Oct 2014 23:07:58 +0000 (01:07 +0200)]
clk: pxa: declare init function and data __init
As the clock descriptions are constant and only usefull at init time,
mark them as such by :
- spliting clock description (desc) and clock private data (dynamic)
- mark __initdata clock descriptions
This makes all the register and descriptions of the clocks to go after
kernel init phase.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Robert Jarzmik [Mon, 6 Oct 2014 23:07:57 +0000 (01:07 +0200)]
clk: pxa: fix pxa27x CCCR bit usage
Trivial fix to check the A bit of CCCR for memory frequency
calculations, where the shift of the bit index was missing, triggering a
wrong calculation of memory frequency.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Robert Jarzmik [Tue, 11 Nov 2014 14:53:25 +0000 (15:53 +0100)]
clk: add pxa25x clock drivers
Move pxa25x clock drivers from arch/arm/mach-pxa to driver/clk.
In the move :
- convert to new clock framework legacy clocks
- provide clocks as before for platform data based boards
- provide clocks through devicetree with clk-pxa-dt
This is the preliminary step in the conversion. The remaining steps are
:
- pxa3xx
- once PXA is fully converted to device tree, if that happens,
clk-pxa2* and clk-pxa3* should only hold the core clocks which cannot
be described in devicetree.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Tested-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
James Hogan [Fri, 14 Nov 2014 15:32:09 +0000 (15:32 +0000)]
clk-divider: Fix READ_ONLY when divider > 1
Commit
79c6ab509558 (clk: divider: add CLK_DIVIDER_READ_ONLY flag) in
v3.16 introduced the CLK_DIVIDER_READ_ONLY flag which caused the
recalc_rate() and round_rate() clock callbacks to be omitted.
However using this flag has the unfortunate side effect of causing the
clock recalculation code when a clock rate change is attempted to always
treat it as a pass-through clock, i.e. with a fixed divide of 1, which
may not be the case. Child clock rates are then recalculated using the
wrong parent rate.
Therefore instead of dropping the recalc_rate() and round_rate()
callbacks, alter clk_divider_bestdiv() to always report the current
divider as the best divider so that it is never altered.
For me the read only clock was the system clock, which divided the PLL
rate by 2, from which both the UART and the SPI clocks were divided.
Initial setting of the UART rate set it correctly, but when the SPI
clock was set, the other child clocks were miscalculated. The UART clock
was recalculated using the PLL rate as the parent rate, resulting in a
UART new_rate of double what it should be, and a UART which spewed forth
garbage when the rate changes were propagated.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Cc: Max Schwarz <max.schwarz@online.de>
Cc: <stable@vger.kernel.org> # v3.16+
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Georgi Djakov [Fri, 10 Oct 2014 13:57:24 +0000 (16:57 +0300)]
clk: qcom: Fix duplicate rbcpr clock name
There is a duplication in a clock name for apq8084 platform that causes
the following warning: "RBCPR_CLK_SRC" redefined
Resolve this by adding a MMSS_ prefix to this clock and making its name
coherent with msm8974 platform.
Fixes:
2b46cd23a5a2 ("clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support")
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Boris Brezillon [Mon, 17 Nov 2014 13:16:56 +0000 (14:16 +0100)]
clk: at91: usb: fix at91sam9x5 recalc, round and set rate
First check for rate == 0 in set_rate and round_rate to avoid div by zero.
Then, in order to get the closest rate, round all divisions to the closest
result instead of rounding them down.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Boris Brezillon [Fri, 14 Nov 2014 18:54:49 +0000 (19:54 +0100)]
clk: at91: usb: fix at91rm9200 round and set rate
at91rm9200_clk_usb_set_rate might fail depending on the requested rate,
because the parent_rate / rate remainder is not necessarily zero.
Moreover, when rounding down the calculated rate we might alter the
divisor calculation and end up with an invalid divisor.
To solve those problems, accept a non zero remainder, and always round
division to the closest result.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reported-by: Andreas Henriksson <andreas.henriksson@endian.se>
Tested-by: Andreas Henriksson <andreas.henriksson@endian.se>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Kever Yang [Thu, 13 Nov 2014 08:11:49 +0000 (16:11 +0800)]
clk: rockchip: fix clock select order for rk3288 usbphy480m_src
According to rk3288 trm, the mux selector locate at bit[12:11]
of CRU_CLKSEL13_CON shows:
2'b00: select HOST0 USB pll clock (clk_otgphy1)
2'b01: select HOST1 USB pll clock (clk_otgphy2)
2'b10: select OTG USB pll clock (clk_otgphy0)
The clock map is in Fig. 3-4 CRU Clock Architecture Diagram 3
- clk_otgphy0 -> USB PHY OTG
- clk_otgphy1 -> USB PHY host0
- clk_otgphy2 -> USB PHY host1
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Kever Yang [Thu, 13 Nov 2014 07:19:21 +0000 (15:19 +0800)]
clk: rockchip: fix rk3288 clk_usbphy480m_gate bit location in register
According to rk3288 trm, the clk_usbphy480m_gate is located at
bit 14 of CRU_CLKGATE5_CON register.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Michael Turquette [Fri, 14 Nov 2014 01:20:39 +0000 (17:20 -0800)]
Merge branch 'clk-next-mmp' into clk-next
Michael Turquette [Fri, 14 Nov 2014 01:18:20 +0000 (17:18 -0800)]
MAINTAINERS: clk framework git tree moved to
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Dmitry Torokhov [Wed, 12 Nov 2014 21:38:45 +0000 (13:38 -0800)]
clk: rockchip: ensure HCLK_VIO2_H2P and PCLK_VIO2_H2P stay enabled
Currently there is no driver owning these clocks and they have to stay
up for the system to function properly, so let's mark them as
CLK_IGNORE_UNUSED.
Without this patch we have trouble with suspend/resume and we have
trouble turning the eDP back on if it ever idles off.
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Michael Turquette [Thu, 13 Nov 2014 00:43:47 +0000 (16:43 -0800)]
MAINTAINERS: add Stephen Boyd as clk co-maintainer
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:53 +0000 (10:13 +0800)]
arm: mmp: Make use of the DT supported clock
Change the dtsi and dts file, soc initialization code to make
use of DT support clock.
So now in the code we do only need call of_clk_init to initialize
the clocks.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:52 +0000 (10:13 +0800)]
arm: mmp: Make all the dts file to be compiled by Makefile
Add items in arch/arm/boot/dt/Makefile to compile the dtb
for mach-mmp.
Change the dts and dtsi file to use #include instead of \include\
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:51 +0000 (10:13 +0800)]
clk: mmp: add mmp2 DT support for clock driver
It adds the DT support for mmp2 clock subsystem.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:50 +0000 (10:13 +0800)]
clk: mmp: add pxa910 DT support for clock driver
It adds the DT support for pxa910 clock subsystem.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:49 +0000 (10:13 +0800)]
clk: mmp: add pxa168 DT support for clock driver
It adds the DT support for pxa168 clock subsystem.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:48 +0000 (10:13 +0800)]
clk: mmp: add reset support
Some clock control regsiter has bit to reset the cotroller.
So before enable the clock, we need deassert the reset pin.
Make use of reset controller framework to export reset interface
for device drivers, then device driver can control the reset action.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:47 +0000 (10:13 +0800)]
clk: mmp: add basic support functions for DT support
In order to support DT for mmp SOC clocks, it defines
some basic APIs which are shared by all mmp SOC clock
units.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:46 +0000 (10:13 +0800)]
clk: mmp: add mmp private gate clock
Some SOCes have this kind of the gate clock
1. There are some bits to control the gate not only one bit.
2. It is not always that "1" is to enable while "0" is to disable
when write register.
So we have to define the "mask", "enable_val", "disable_val" for
this kind of gate clock.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:45 +0000 (10:13 +0800)]
clk: mmp: add clock type mix
The clock type mix is a kind of clock combines "div" and "mux".
This kind of clock can not allow to change div first then
mux or change mux first or div.
The reason is
1. Some clock has frequency change bit. Each time want to change
the frequency, there are some operations based on this bit, and
these operations are time-cost.
Seperating div and mux change will make the process longer, and
waste more time.
2. Seperting the div and mux may generate middle clock that the
peripharals do not support. It may make the peripharals hang.
There are three kinds of this type of clock in all SOCes.
1. The clock has bit to trigger the frequency change.
2. Same as #1, but the operations for the bit is different
3. Do not have frequency change bit.
So this type of clock has implemented the callbacks
->determine_rate
->set_rate_and_parent
These callbacks can help to change the div and mux together.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:44 +0000 (10:13 +0800)]
clk: mmp: move definiton of mmp_clk_frac to clk.h
Move the definition of structure of mmp_clk_frac to
clk.h.
So device tree support can use this structure.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:43 +0000 (10:13 +0800)]
clk: mmp: add init callback for clk-frac
For the clk-frac, we need to make sure that the initial
clock rate is one item of the table.
If it is not, we use the first item in the table by default.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:42 +0000 (10:13 +0800)]
clk: mmp: add spin lock for clk-frac
The register used by clk-frac may be shared with
other clocks.
So it needs to use spin lock to protect the register
access.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Chao Xie [Fri, 31 Oct 2014 02:13:41 +0000 (10:13 +0800)]
clk: mmp: add prefix "mmp" for structures defined for clk-frac
The structures defined for clk-frac will be used out side
of clk-frac.c.
To avoid conflicts, add prefix "mmp" for these structures'
name.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Ulrich Hecht [Fri, 7 Nov 2014 15:51:08 +0000 (16:51 +0100)]
clk: shmobile: document DIV6 clock parent bindings
Describes how to specify the parents for clocks with EXSRC bits.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Ulrich Hecht [Fri, 7 Nov 2014 15:51:07 +0000 (16:51 +0100)]
clk: shmobile: div6: support selectable-input clocks
Support for setting the parent at initialization time based on the current
hardware configuration in DIV6 clocks with selectable parents as found in
the r8a73a4, r8a7740, sh73a0, and other SoCs.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Emilio López [Thu, 6 Nov 2014 03:40:29 +0000 (11:40 +0800)]
clk: sunxi: unify APB1 clock
This commit unifies the APB1 mux with the APB1 clock, using the new
factors infrastructure.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
[wens@csie.org: Add mux mask bits]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chris Zhong [Fri, 7 Nov 2014 13:49:33 +0000 (21:49 +0800)]
clk: rockchip: rk3288: add suspend and resume
save and restore some clks, which might be changed in suspend.
Signed-off-by: Tony Xie <xxx@rock-chips.com>
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Linus Torvalds [Sun, 9 Nov 2014 22:55:29 +0000 (14:55 -0800)]
Linux 3.18-rc4
Linus Torvalds [Sun, 9 Nov 2014 22:49:56 +0000 (14:49 -0800)]
Merge tag 'arm64-fixes' of git://git./linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
- enable bpf syscall for compat
- cpu_suspend fix when checking the idle state type
- defconfig update
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: defconfig: update defconfig for 3.18
arm64: compat: Enable bpf syscall
arm64: psci: fix cpu_suspend to check idle state type for index
Linus Torvalds [Sun, 9 Nov 2014 22:46:36 +0000 (14:46 -0800)]
Merge tag 'armsoc-for-rc4' of git://git./linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Another quiet week:
- a fix to silence edma probe error on non-supported platforms from
Arnd
- a fix to enable the PL clock for Parallella, to make mainline
usable with the SDK.
- a somewhat verbose fix for the PLL clock tree on VF610
- enabling of SD/MMC on one of the VF610-based boards (for testing)
- a fix for i.MX where CONFIG_SPI used to be implicitly enabled and
now needs to be added to the defconfig instead
- another maintainer added for bcm2835: Lee Jones"
* tag 'armsoc-for-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: zynq: Enable PL clocks for Parallella
dma: edma: move device registration to platform code
ARM: dts: vf610: add SD node to cosmic dts
MAINTAINERS: update bcm2835 entry
ARM: imx: Fix the removal of CONFIG_SPI option
ARM: imx: clk-vf610: define PLL's clock tree
Linus Torvalds [Sun, 9 Nov 2014 22:33:49 +0000 (14:33 -0800)]
Merge branch 'devicetree/merge' of git://git./linux/kernel/git/glikely/linux
Pull devicetree bugfix from Grant Likely:
"One buffer overflow bug that shouldn't be left around"
* 'devicetree/merge' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux:
of: Fix overflow bug in string property parsing functions
Linus Torvalds [Sun, 9 Nov 2014 22:30:24 +0000 (14:30 -0800)]
Merge branch 'for-linus' of git://git./linux/kernel/git/mason/linux-btrfs
Pull btrfs fix from Chris Mason:
"It's a one liner for an error cleanup path that leads to crashes"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs:
Btrfs: fix kfree on list_head in btrfs_lookup_csums_range error cleanup
Linus Torvalds [Sun, 9 Nov 2014 22:11:58 +0000 (14:11 -0800)]
Merge tag 'driver-core-3.18-rc4' of git://git./linux/kernel/git/gregkh/driver-core
Pull driver core fixes from Greg KH:
"Here are 3 tiny fixes for 3.18-rc4.
One fixes up a long-stading race condition in the driver core for
removing directories in /sys/devices/virtual/ and the other 2 fix up
the wording of a new Kconfig option that was added in 3.18-rc1"
* tag 'driver-core-3.18-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
tiny: rename ENABLE_DEV_COREDUMP to ALLOW_DEV_COREDUMP
tiny: reverse logic for DISABLE_DEV_COREDUMP
sysfs: driver core: Fix glue dir race condition by gdp_mutex
Linus Torvalds [Sun, 9 Nov 2014 22:11:07 +0000 (14:11 -0800)]
Merge tag 'staging-3.18-rc4' of git://git./linux/kernel/git/gregkh/staging
Pull staging driver fixes from Greg KH:
"Here are some staging/iio fixes for 3.18-rc4.
Nothing major, just a few bugfixes of things that have been reported"
* tag 'staging-3.18-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
staging:iio:
ade7758: Remove "raw" from channel name
staging:iio:
ade7758: Fix check if channels are enabled in prenable
staging:iio:
ade7758: Fix NULL pointer deref when enabling buffer
iio: as3935: allocate correct iio_device size
io: accel: kxcjk-1013: Fix iio_event_spec direction
iio: tsl4531: Fix compiler error when CONFIG_PM_OPS is not defined
iio: adc: mxs-lradc: Disable the clock on probe failure
iio: st_sensors: Fix buffer copy
staging:iio:ad5933: Drop "raw" from channel names
staging:iio:ad5933: Fix NULL pointer deref when enabling buffer
Linus Torvalds [Sun, 9 Nov 2014 22:07:30 +0000 (14:07 -0800)]
Merge tag 'tty-3.18-rc4' of git://git./linux/kernel/git/gregkh/tty
Pull tty/serial fixes from Greg KH:
"Here are some tiny serial/tty fixes for 3.18-rc4 that resolve some
reported issues"
* tag 'tty-3.18-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
tty: Fix pty master poll() after slave closes v2
serial: of-serial: fix uninitialized kmalloc variable
tty/vt: don't set font mappings on vc not supporting this
tty: serial: 8250_mtk: Fix quot calculation
tty: Prevent "read/write wait queue active!" log flooding
tty: Fix high cpu load if tty is unreleaseable
serial: Fix divide-by-zero fault in uart_get_divisor()
Linus Torvalds [Sun, 9 Nov 2014 22:05:53 +0000 (14:05 -0800)]
Merge tag 'usb-3.18-rc4' of git://git./linux/kernel/git/gregkh/usb
Pull USB fixes from Greg KH:
"Here are some USB fixes for 3.18-rc4.
Just a bunch of little fixes resolving reported issues and new device
ids for existing drivers. Full details are in the shortlog"
* tag 'usb-3.18-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (26 commits)
USB: Update default usb-storage delay_use value in kernel-parameters.txt
USB: cdc-acm: add quirk for control-line state requests
phy: omap-usb2: Enable runtime PM of omap-usb2 phy properly
USB: storage: Fix timeout in usb_stor_euscsi_init() and usb_stor_huawei_e220_init()
USB: cdc-acm: only raise DTR on transitions from B0
Revert "storage: Replace magic number with define in usb_stor_euscsi_init()"
usb: core: notify disconnection when core detects disconnect
usb: core: need to call usb_phy_notify_connect after device setup
uas: Add US_FL_NO_ATA_1X quirk for 2 more Seagate models
xhci: no switching back on non-ULT Haswell
USB: quirks: enable device-qualifier quirk for yet another Elan touchscreen
USB: quirks: enable device-qualifier quirk for another Elan touchscreen
MAINTAINERS: Remove duplicate entry for usbip driver
usb: storage: fix build warnings !CONFIG_PM
usb: Remove references to non-existent PLAT_S5P symbol
uas: Add NO_ATA_1X for VIA VL711 devices
xhci: Disable streams on Asmedia 1042 xhci controllers
USB: HWA: fix a warning message
uas: Add US_FL_NO_ATA_1X quirk for 1 more Seagate model
usb-storage: handle a skipped data phase
...
Andreas Färber [Thu, 6 Nov 2014 17:22:10 +0000 (18:22 +0100)]
ARM: dts: zynq: Enable PL clocks for Parallella
The Parallella board comes with a U-Boot bootloader that loads one of
two predefined FPGA bitstreams before booting the kernel. Both define an
AXI interface to the on-board Epiphany processor.
Enable clocks FCLK0..FCLK3 for the Programmable Logic by default.
Otherwise accessing, e.g., the ESYSRESET register freezes the board,
as seen with the Epiphany SDK tools e-reset and e-hw-rev, using /dev/mem.
Cc: <stable@vger.kernel.org> # 3.17.x
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Linus Torvalds [Sat, 8 Nov 2014 17:32:29 +0000 (09:32 -0800)]
Merge branch 'i2c/for-current' of git://git./linux/kernel/git/wsa/linux
Pull i2c bugfixes from Wolfram Sang:
"One bigger cleanup (FSF address removal) and two bugfixes for I2C"
* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: core: Dispose OF IRQ mapping at client removal time
i2c: at91: don't account as iowait
i2c: remove FSF address
Linus Torvalds [Sat, 8 Nov 2014 16:47:16 +0000 (08:47 -0800)]
Merge branch 'irq-urgent-for-linus' of git://git./linux/kernel/git/tip/tip
Pull irq fixes from Thomas Gleixner:
"Two fixlets for the armada SoC interrupt controller"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip: armada-370-xp: Fix MPIC interrupt handling
irqchip: armada-370-xp: Fix MSI interrupt handling
Linus Torvalds [Sat, 8 Nov 2014 16:45:20 +0000 (08:45 -0800)]
Merge git://git./linux/kernel/git/mchehab/linux-media
Pull media fixes from Mauro Carvalho Chehab:
"For:
- some regression fixes at the Remote Controller core and imon driver
- a build fix for certain randconfigs with ir-hix5hd2
- don't feed power to satellite system at ds3000 driver init
It also contains some fixes for drivers added for Kernel 3.18:
- some fixes at the new ISDB-S driver, and the corresponding bits to
fix some descriptors for this Japanese TV standard at the DVB core
- two warning cleanups for sp2 driver if PM is disabled
- change the default mode for the new vivid driver"
* git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
[media] sp2: sp2_init() can be static
[media] dvb:tc90522: fix always-false expression
[media] dvb-core: set default properties of ISDB-S
[media] dvb:tc90522: fix stats report
[media] vivid: default to single planar device instances
[media] imon: fix other RC type protocol support
[media] ir-hix5hd2 fix build warning
[media] ds3000: fix LNB supply voltage on Tevii S480 on initialization
[media] rc5-decoder: BZ#85721: Fix RC5-SZ decoding
[media] rc-core: fix protocol_change regression in ir_raw_event_register
Linus Torvalds [Sat, 8 Nov 2014 02:08:02 +0000 (18:08 -0800)]
Merge branch 'upstream' of git://git.linux-mips.org/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
"This weeks' round of MIPS bug fixes for 3.18:
- wire up the bpf syscall
- fix TLB dump output for R3000 class TLBs
- fix strnlen_user return value if no NUL character was found.
- fix build with binutils 2.24.51+. While there is no binutils 2.25
release yet, toolchains derived from binutils 2.24.51+ are already
in common use.
- the Octeon GPIO code forgot to offline GPIO IRQs.
- fix build error for XLP.
- fix possible BUG assertion with EVA for CMA"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: Fix build with binutils 2.24.51+
MIPS: R3000: Fix debug output for Virtual page number
MIPS: Fix strnlen_user() return value in case of overlong strings.
MIPS: CMA: Do not reserve memory if not required
MIPS: Wire up bpf syscall.
MIPS/Xlp: Remove the dead function destroy_irq() to fix build error
MIPS: Octeon: Make Octeon GPIO IRQ chip CPU hotplug-aware
Heiko Stübner [Thu, 30 Oct 2014 13:26:13 +0000 (14:26 +0100)]
clk: rockchip: fix rk3188 hsadc_frac definition
The arguments to COMPOSITE_FRAC for hsadc_frac were mangled, leaving out the
the general clock flags argument. This results in strange effects, as only
sometimes a zero-division is reported as the wrong register is read.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Linus Torvalds [Fri, 7 Nov 2014 22:08:13 +0000 (14:08 -0800)]
Merge tag 'xfs-for-linus-3.18-rc3' of git://git./linux/kernel/git/dgc/linux-xfs
Pull xfs fixes from Dave Chinner:
"This update fixes a warning in the new pagecache_isize_extended() and
updates some related comments, another fix for zero-range
misbehaviour, and an unforntuately large set of fixes for regressions
in the bulkstat code.
The bulkstat fixes are large but necessary. I wouldn't normally push
such a rework for a -rcX update, but right now xfsdump can silently
create incomplete dumps on 3.17 and it's possible that even xfsrestore
won't notice that the dumps were incomplete. Hence we need to get
this update into 3.17-stable kernels ASAP.
In more detail, the refactoring work I committed in 3.17 has exposed a
major hole in our QA coverage. With both xfsdump (the major user of
bulkstat) and xfsrestore silently ignoring missing files in the
dump/restore process, incomplete dumps were going unnoticed if they
were being triggered. Many of the dump/restore filesets were so small
that they didn't evenhave a chance of triggering the loop iteration
bugs we introduced in 3.17, so we didn't exercise the code
sufficiently, either.
We have already taken steps to improve QA coverage in xfstests to
avoid this happening again, and I've done a lot of manual verification
of dump/restore on very large data sets (tens of millions of inodes)
of the past week to verify this patch set results in bulkstat behaving
the same way as it does on 3.16.
Unfortunately, the fixes are not exactly simple - in tracking down the
problem historic API warts were discovered (e.g xfsdump has been
working around a 20 year old bug in the bulkstat API for the past 10
years) and so that complicated the process of diagnosing and fixing
the problems. i.e. we had to fix bugs in the code as well as
discover and re-introduce the userspace visible API bugs that we
unwittingly "fixed" in 3.17 that xfsdump relied on to work correctly.
Summary:
- incorrect warnings about i_mutex locking in pagecache_isize_extended()
and updates comments to match expected locking
- another zero-range bug fix for stray file size updates
- a bunch of fixes for regression in the bulkstat code introduced in
3.17"
* tag 'xfs-for-linus-3.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/dgc/linux-xfs:
xfs: track bulkstat progress by agino
xfs: bulkstat error handling is broken
xfs: bulkstat main loop logic is a mess
xfs: bulkstat chunk-formatter has issues
xfs: bulkstat chunk formatting cursor is broken
xfs: bulkstat btree walk doesn't terminate
mm: Fix comment before truncate_setsize()
xfs: rework zero range to prevent invalid i_size updates
mm: Remove false WARN_ON from pagecache_isize_extended()
xfs: Check error during inode btree iteration in xfs_bulkstat()
xfs: bulkstat doesn't release AGI buffer on error
Linus Torvalds [Fri, 7 Nov 2014 19:55:47 +0000 (11:55 -0800)]
Merge tag 'regulator-v3.18-rc3' of git://git./linux/kernel/git/broonie/regulator
Pull regulator fixes from Mark Brown:
"More changes than I'd like here, most of them for a single bug
repeated in a bunch of drivers with data not being initialized
correctly, plus a fix to lower the severity of a warning introduced in
the last merge window which can legitimately go off so we don't want
to alarm users excessively"
* tag 'regulator-v3.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator:
regulator: s2mpa01: zero-initialize regulator match table array
regulator: max8660: zero-initialize regulator match table array
regulator: max77802: zero-initialize regulator match table
regulator: max77686: zero-initialize regulator match table
regulator: max1586: zero-initialize regulator match table array
regulator: max77693: Fix use of uninitialized regulator config
regulator: of: Lower the severity of the error with no container
Linus Torvalds [Fri, 7 Nov 2014 19:54:44 +0000 (11:54 -0800)]
Merge tag 'spi-v3.18-rc3' of git://git./linux/kernel/git/broonie/spi
Pull spi bugfixes from Mark Brown:
"A couple of small driver fixes for v3.18, both quite problematic if
you hit a use case that's affected"
* tag 'spi-v3.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: pxa2xx: toggle clocks on suspend if not disabled by runtime PM
spi: fsl-dspi: Fix CTAR selection
Johannes Berg [Thu, 30 Oct 2014 09:00:35 +0000 (10:00 +0100)]
tiny: rename ENABLE_DEV_COREDUMP to ALLOW_DEV_COREDUMP
The ENABLE_DEV_COREDUMP option is misleading as it implies that
it gets the framework enabled, this isn't true it just allows it
to get enabled if a driver needs it.
Rename it to ALLOW_DEV_COREDUMP to better capture its semantics.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Acked-by: Aristeu Rozanski <aris@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Aristeu Rozanski [Thu, 16 Oct 2014 15:49:49 +0000 (11:49 -0400)]
tiny: reverse logic for DISABLE_DEV_COREDUMP
It's desirable for allnconfig and tinyconfig targets to result in the
least amount of code possible. DISABLE_DEV_COREDUMP exists as a way to
switch off DEV_COREDUMP regardless if any drivers select
WANT_DEV_COREDUMP.
This patch renames the option to ENABLE_DEV_COREDUMP and setting it to
'n' (as in allnconfig or tinyconfig) will effectively disable device
coredump.
Cc: Josh Triplett <josh@joshtriplett.org>
Reviewed-by: Josh Triplett <josh@joshtriplett.org>
Signed-off-by: Aristeu Rozanski <arozansk@redhat.com>
Reviewed-by: Johannes Berg <johannes@sipsolutions.net>
Acked-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Laurent Pinchart [Thu, 30 Oct 2014 13:59:37 +0000 (15:59 +0200)]
i2c: core: Dispose OF IRQ mapping at client removal time
Clients instantiated from OF get an IRQ mapping created at device
registration time. Dispose the mapping when the client is removed.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
Wolfram Sang [Mon, 3 Nov 2014 20:16:16 +0000 (21:16 +0100)]
i2c: at91: don't account as iowait
iowait is for blkio [1]. I2C shouldn't use it.
[1] https://lkml.org/lkml/2014/11/3/317
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Cc: stable@kernel.org
Wolfram Sang [Tue, 4 Nov 2014 22:46:27 +0000 (23:46 +0100)]
i2c: remove FSF address
We have a central copy of the GPL for that. Some addresses were already
outdated.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Mark Knibbs [Tue, 4 Nov 2014 13:00:15 +0000 (13:00 +0000)]
USB: Update default usb-storage delay_use value in kernel-parameters.txt
Back in 2010 the default usb-storage delay_use time was reduced from 5 to 1
second (commit
a4a47bc03fe520e95e0c4212bf97c86545fb14f9), but
kernel-parameters.txt wasn't updated to reflect that.
Signed-off-by: Mark Knibbs <markk@clara.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Yijing Wang [Fri, 7 Nov 2014 04:05:49 +0000 (12:05 +0800)]
sysfs: driver core: Fix glue dir race condition by gdp_mutex
There is a race condition when removing glue directory.
It can be reproduced in following test:
path 1: Add first child device
device_add()
get_device_parent()
/*find parent from glue_dirs.list*/
list_for_each_entry(k, &dev->class->p->glue_dirs.list, entry)
if (k->parent == parent_kobj) {
kobj = kobject_get(k);
break;
}
....
class_dir_create_and_add()
path2: Remove last child device under glue dir
device_del()
cleanup_device_parent()
cleanup_glue_dir()
kobject_put(glue_dir);
If path2 has been called cleanup_glue_dir(), but not
call kobject_put(glue_dir), the glue dir is still
in parent's kset list. Meanwhile, path1 find the glue
dir from the glue_dirs.list. Path2 may release glue dir
before path1 call kobject_get(). So kernel will report
the warning and bug_on.
This is a "classic" problem we have of a kref in a list
that can be found while the last instance could be removed
at the same time.
This patch reuse gdp_mutex to fix this race condition.
The following calltrace is captured in kernel 3.4, but
the latest kernel still has this bug.
-----------------------------------------------------
<4>[ 3965.441471] WARNING: at ...include/linux/kref.h:41 kobject_get+0x33/0x40()
<4>[ 3965.441474] Hardware name: Romley
<4>[ 3965.441475] Modules linked in: isd_iop(O) isd_xda(O)...
...
<4>[ 3965.441605] Call Trace:
<4>[ 3965.441611] [<
ffffffff8103717a>] warn_slowpath_common+0x7a/0xb0
<4>[ 3965.441615] [<
ffffffff810371c5>] warn_slowpath_null+0x15/0x20
<4>[ 3965.441618] [<
ffffffff81215963>] kobject_get+0x33/0x40
<4>[ 3965.441624] [<
ffffffff812d1e45>] get_device_parent.isra.11+0x135/0x1f0
<4>[ 3965.441627] [<
ffffffff812d22d4>] device_add+0xd4/0x6d0
<4>[ 3965.441631] [<
ffffffff812d0dbc>] ? dev_set_name+0x3c/0x40
....
<2>[ 3965.441912] kernel BUG at ..../fs/sysfs/group.c:65!
<4>[ 3965.441915] invalid opcode: 0000 [#1] SMP
...
<4>[ 3965.686743] [<
ffffffff811a677e>] sysfs_create_group+0xe/0x10
<4>[ 3965.686748] [<
ffffffff810cfb04>] blk_trace_init_sysfs+0x14/0x20
<4>[ 3965.686753] [<
ffffffff811fcabb>] blk_register_queue+0x3b/0x120
<4>[ 3965.686756] [<
ffffffff812030bc>] add_disk+0x1cc/0x490
....
-------------------------------------------------------
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Weng Meiling <wengmeiling.weng@huawei.com>
Cc: <stable@vger.kernel.org> #3.4+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Manuel Lauss [Fri, 7 Nov 2014 13:13:54 +0000 (14:13 +0100)]
MIPS: Fix build with binutils 2.24.51+
Starting with version 2.24.51.
20140728 MIPS binutils complain loudly
about mixing soft-float and hard-float object files, leading to this
build failure since GCC is invoked with "-msoft-float" on MIPS:
{standard input}: Warning: .gnu_attribute 4,3 requires `softfloat'
LD arch/mips/alchemy/common/built-in.o
mipsel-softfloat-linux-gnu-ld: Warning: arch/mips/alchemy/common/built-in.o
uses -msoft-float (set by arch/mips/alchemy/common/prom.o),
arch/mips/alchemy/common/sleeper.o uses -mhard-float
To fix this, we detect if GAS is new enough to support "-msoft-float" command
option, and if it does, we can let GCC pass it to GAS; but then we also need
to sprinkle the files which make use of floating point registers with the
necessary ".set hardfloat" directives.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Cc: Markos Chandras <Markos.Chandras@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8355/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Dave Chinner [Thu, 6 Nov 2014 21:33:52 +0000 (08:33 +1100)]
xfs: track bulkstat progress by agino
The bulkstat main loop progress is tracked by the "lastino"
variable, which is a full 64 bit inode. However, the loop actually
works on agno/agino pairs, and so there's a significant disconnect
between the rest of the loop and the main cursor. Convert this to
use the agino, and pass the agino into the chunk formatting function
and convert it too.
This gets rid of the inconsistency in the loop processing, and
finally makes it simple for us to skip inodes at any point in the
loop simply by incrementing the agino cursor.
cc: <stable@vger.kernel.org> # 3.17
Signed-off-by: Dave Chinner <dchinner@redhat.com>
Reviewed-by: Brian Foster <bfoster@redhat.com>
Signed-off-by: Dave Chinner <david@fromorbit.com>
Dave Chinner [Thu, 6 Nov 2014 21:31:15 +0000 (08:31 +1100)]
xfs: bulkstat error handling is broken
The error propagation is a horror - xfs_bulkstat() returns
a rval variable which is only set if there are formatter errors. Any
sort of btree walk error or corruption will cause the bulkstat walk
to terminate but will not pass an error back to userspace. Worse
is the fact that formatter errors will also be ignored if any inodes
were correctly formatted into the user buffer.
Hence bulkstat can fail badly yet still report success to userspace.
This causes significant issues with xfsdump not dumping everything
in the filesystem yet reporting success. It's not until a restore
fails that there is any indication that the dump was bad and tha
bulkstat failed. This patch now triggers xfsdump to fail with
bulkstat errors rather than silently missing files in the dump.
This now causes bulkstat to fail when the lastino cookie does not
fall inside an existing inode chunk. The pre-3.17 code tolerated
that error by allowing the code to move to the next inode chunk
as the agino target is guaranteed to fall into the next btree
record.
With the fixes up to this point in the series, xfsdump now passes on
the troublesome filesystem image that exposes all these bugs.
cc: <stable@vger.kernel.org>
Signed-off-by: Dave Chinner <dchinner@redhat.com>
Reviewed-by: Brian Foster <bfoster@redhat.com>
Dave Chinner [Thu, 6 Nov 2014 21:31:13 +0000 (08:31 +1100)]
xfs: bulkstat main loop logic is a mess
There are a bunch of variables tha tare more wildy scoped than they
need to be, obfuscated user buffer checks and tortured "next inode"
tracking. This all needs cleaning up to expose the real issues that
need fixing.
cc: <stable@vger.kernel.org> # 3.17
Signed-off-by: Dave Chinner <dchinner@redhat.com>
Reviewed-by: Brian Foster <bfoster@redhat.com>
Signed-off-by: Dave Chinner <david@fromorbit.com>
Dave Chinner [Thu, 6 Nov 2014 21:30:58 +0000 (08:30 +1100)]
xfs: bulkstat chunk-formatter has issues
The loop construct has issues:
- clustidx is completely unused, so remove it.
- the loop tries to be smart by terminating when the
"freecount" tells it that all inodes are free. Just drop
it as in most cases we have to scan all inodes in the
chunk anyway.
- move the "user buffer left" condition check to the only
point where we consume space int eh user buffer.
- move the initialisation of agino out of the loop, leaving
just a simple loop control logic using the clusteridx.
Also, double handling of the user buffer variables leads to problems
tracking the current state - use the cursor variables directly
rather than keeping local copies and then having to update the
cursor before returning.
cc: <stable@vger.kernel.org> # 3.17
Signed-off-by: Dave Chinner <dchinner@redhat.com>
Reviewed-by: Brian Foster <bfoster@redhat.com>
Signed-off-by: Dave Chinner <david@fromorbit.com>
Dave Chinner [Thu, 6 Nov 2014 21:30:30 +0000 (08:30 +1100)]
xfs: bulkstat chunk formatting cursor is broken
The xfs_bulkstat_agichunk formatting cursor takes buffer values from
the main loop and passes them via the structure to the chunk
formatter, and the writes the changed values back into the main loop
local variables. Unfortunately, this complex dance is full of corner
cases that aren't handled correctly.
The biggest problem is that it is double handling the information in
both the main loop and the chunk formatting function, leading to
inconsistent updates and endless loops where progress is not made.
To fix this, push the struct xfs_bulkstat_agichunk outwards to be
the primary holder of user buffer information. this removes the
double handling in the main loop.
Also, pass the last inode processed by the chunk formatter as a
separate parameter as it purely an output variable and is not
related to the user buffer consumption cursor.
Finally, the chunk formatting code is not shared by anyone, so make
it local to xfs_itable.c.
cc: <stable@vger.kernel.org> # 3.17
Signed-off-by: Dave Chinner <dchinner@redhat.com>
Reviewed-by: Brian Foster <bfoster@redhat.com>
Signed-off-by: Dave Chinner <david@fromorbit.com>
Dave Chinner [Thu, 6 Nov 2014 21:29:57 +0000 (08:29 +1100)]
xfs: bulkstat btree walk doesn't terminate
The bulkstat code has several different ways of detecting the end of
an AG when doing a walk. They are not consistently detected, and the
code that checks for the end of AG conditions is not consistently
coded. Hence the are conditions where the walk code can get stuck in
an endless loop making no progress and not triggering any
termination conditions.
Convert all the "tmp/i" status return codes from btree operations
to a common name (stat) and apply end-of-ag detection to these
operations consistently.
cc: <stable@vger.kernel.org> # 3.17
Signed-off-by: Dave Chinner <dchinner@redhat.com>
Reviewed-by: Brian Foster <bfoster@redhat.com>
Signed-off-by: Dave Chinner <david@fromorbit.com>
Jan Kara [Thu, 6 Nov 2014 21:29:25 +0000 (08:29 +1100)]
mm: Fix comment before truncate_setsize()
XFS doesn't always hold i_mutex when calling truncate_setsize() and it
uses a different lock to serialize truncates and writes. So fix the
comment before truncate_setsize().
Reported-by: Jan Beulich <JBeulich@suse.com>
Signed-off-by: Jan Kara <jack@suse.cz>
Signed-off-by: Dave Chinner <david@fromorbit.com>