GitHub/moto-9609/android_kernel_motorola_exynos9610.git
11 years agodrm/qxl: add support for > 1 output
Dave Airlie [Tue, 2 Jul 2013 05:37:13 +0000 (06:37 +0100)]
drm/qxl: add support for > 1 output

This adds support for a default of 4 heads, with a command line
parameter to change the default number.

It also overhauls the modesetting code to handle this case properly,
and send the correct things to the hardware at the right time.

Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm/qxl: make dynamic resizing work properly.
Dave Airlie [Mon, 1 Jul 2013 04:14:38 +0000 (14:14 +1000)]
drm/qxl: make dynamic resizing work properly.

qxl has a feature to allow the userspace driver do arbitrary resizes
when the viewer resizes, this fixes it by removing unnecessary code
from the kernel side.

Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm/mm: kill color_search_free/get_block
Daniel Vetter [Mon, 1 Jul 2013 20:05:53 +0000 (22:05 +0200)]
drm/mm: kill color_search_free/get_block

drm/i915 is the only user of the color allocation handling and
switched to insert_node a while ago. So we can ditch this.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm: fix print format of sequence in trace point
Seung-Woo Kim [Mon, 1 Jul 2013 10:44:14 +0000 (19:44 +0900)]
drm: fix print format of sequence in trace point

seq of a trace point is unsigned int but print format was %d. So
it fixes the format as %u.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm: fix error routines in drm_open_helper
Seung-Woo Kim [Tue, 2 Jul 2013 00:53:28 +0000 (09:53 +0900)]
drm: fix error routines in drm_open_helper

There are missing parts to handle error in drm_open_helper().
The priv->minor, assigned by idr_find() which can return NULL,
should be checked whether it is NULL or not before referencing it.
put_pid(), drm_gem_release(), and drm_prime_destory_file_private()
should be called when error happens after their pair functions are
called. If an error occurs after executing dev->driver->open()
which allocates driver specific per-file private data, then the
private data should be released.

Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Chris Wilson <chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm: add assertion for checking null edid to drm_edid_block_valid
Seung-Woo Kim [Tue, 2 Jul 2013 08:57:04 +0000 (17:57 +0900)]
drm: add assertion for checking null edid to drm_edid_block_valid

If raw_edid of drm_edid_block_vaild() is null, it will crash, so
checking in bad label is removed and instead assertion is added at
the top of the function.
The type of return for the function is bool, so it fixes to return
true and false instead of 1 and 0.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm: Convert drm class driver from legacy pm ops to dev_pm_ops
Shuah Khan [Mon, 1 Jul 2013 22:06:02 +0000 (16:06 -0600)]
drm: Convert drm class driver from legacy pm ops to dev_pm_ops

Convert drivers/gpu/drm class to use dev_pm_ops for power management and
remove Legacy PM ops hooks. With this change, drm class registers
suspend/resume callbacks via class->pm (dev_pm_ops) instead of Legacy
class->suspend/resume. When __device_suspend() runs call-backs, it will
find class->pm ops for the drm class.

drm_class_suspend() hook calls driver legacy ops with the state information.
e.g: drm_class_suspend() calls into driver suspend routines
via drm_dev->driver->suspend(drm_dev, state).

Once drm_class_suspend() is converted to dev_pm_ops, it will no longer
have access to pm_transition which it has to pass into driver legacy
suspend calls. A new freeze and suspend hooks are added to address the not
having access to the state information. The new freeze and suspend hooks
simply call __drm_class_suspend() with the appropriate pm state information.
__drm_class_suspend() is the original suspend hook with a new name.

Signed-off-by: Shuah Khan <shuah.kh@samsung.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agoMerge tag 'drm-intel-fixes-2013-07-03' of git://people.freedesktop.org/~danvet/drm...
Dave Airlie [Thu, 4 Jul 2013 00:46:17 +0000 (10:46 +1000)]
Merge tag 'drm-intel-fixes-2013-07-03' of git://people.freedesktop.org/~danvet/drm-intel into drm-next

Pile of fixes for 3.11. A bit large in patch count, but that's simply due
to two fixes being split up into really small parts. Also I've included a
few more vlv patches than I'd have included for other platforms. But since
vlv is officially supported for the first time only in 3.11 that shouldn't
result in unbearable risks.

Highlights:
- ghost eDP fixes for hsw from Paulo
- fix PCH detection in virtualized enviroments (Rui Guo)
- duct-tape dma sg construction when swiotlb is in use (Konrad), dupe with
  a patch in your drm-fixes branch
- fix sdvo hotplug on i965g
- tune down a bunch of dmesg ERRORs which can be hit under normal
  conditions
- detect invalid pitches for tiled scanout buffers (Chris)
- a pile of vlv fixes from Ville: rps improvements, fixes for the dpll
  LPF, fixup the sprite mmio offsets
- fix context size on hsw (Ben)
- locking fixes for the hotplug code, specifically the storm handling
- fix get_config on CPT (Xiong Zhang)
- Fix the domain tracking when an unlocked seqno wait was interrupt
  (Chris), this seems to explain tons of little corruption bugs in the
  ddx. Chris also added a nice igt to exercise this.
- work around stack-corrupting vnsprintf in our error state dumper

* tag 'drm-intel-fixes-2013-07-03' of git://people.freedesktop.org/~danvet/drm-intel: (39 commits)
  drm/i915: Don't try to tear down the stolen drm_mm if it's not there
  drm/i915: Break up the large vsnprintf() in print_error_buffers()
  drm/i915: Refactor the wait_rendering completion into a common routine
  drm/i915: Only clear write-domains after a successful wait-seqno
  drm/i915: correct intel_dp_get_config() function for DevCPT
  drm/i915: fix hpd interrupt register locking
  drm/i915: fold the no-irq check into intel_hpd_irq_handler
  drm/i915: fold the queue_work into intel_hpd_irq_handler
  drm/i915: fold the hpd_irq_setup call into intel_hpd_irq_handler
  drm/i915: s/hotplug_irq_storm_detect/intel_hpd_irq_handler/
  drm/i915: close tiny race in the ilk pcu even interrupt setup
  drm/i915: fix locking around ironlake_enable|disable_display_irq
  drm/i915: Fix context sizes on HSW
  drm/i915: Fix VLV sprite register offsets
  Revert "drm/i915: Don't use the HDMI port color range bit on Valleyview"
  drm/i915: s/LFP/LPF in DPIO PLL register names
  drm/i915: Fix VLV PLL LPF coefficients for DAC
  drm/i915: Jump to at least RPe on VLV when increasing the GPU frequency
  drm/i915: Don't increase the GPU frequency from the delayed VLV rps timer
  drm/i915: GEN6_RP_INTERRUPT_LIMITS doesn't seem to exist on VLV
  ...

11 years agoMerge branch 'drm-next-3.11' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Thu, 4 Jul 2013 00:44:06 +0000 (10:44 +1000)]
Merge branch 'drm-next-3.11' of git://people.freedesktop.org/~agd5f/linux into drm-next

A few more DPM fixes.

* 'drm-next-3.11' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon/sumo: implement support for disable_gfx_power_gating_in_uvd flag
  drm/radeon/tn: disable PG when changing UVD clocks
  drm/radeon/sumo: disable PG when changing UVD clocks
  drm/radeon/aruba: disable additional rlc features
  drm/radeon: fix endian bug in radeon_atom_get_mclk_range_table()
  drm/radeon/dpm: fix compilation with certain versions of gcc
  drm/radeon/dpm: clarify debugfs warning

11 years agodrm/mm: WARN for unclean mm takedown
Daniel Vetter [Mon, 1 Jul 2013 20:01:04 +0000 (22:01 +0200)]
drm/mm: WARN for unclean mm takedown

The usual drm driver has tons of different drm_mm memory managers so the drm
error message in dmesg is pretty useless. WARN instead so that we have the full
backtrace.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm/mm: fix debug table BUG
Daniel Vetter [Mon, 1 Jul 2013 20:01:02 +0000 (22:01 +0200)]
drm/mm: fix debug table BUG

In

commit 3a359f0b21ab218c1bf7a6a1b638b6fd143d0b99
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Sat Apr 20 12:08:11 2013 +0200

    drm/mm: fix dump table BUG

I've failed to fix both instances of the regression introduced in

commit 9e8944ab564f2e3dde90a518cd32048c58918608
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Thu Nov 15 11:32:17 2012 +0000

   drm: Introduce an iterator over holes in the drm_mm range manager

Patch this up in the same way by extracting the hole debug logic
into it's own function, since that'll also clarify the logic a bit.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm/prime: fix up handle_to_fd ioctl return value
Daniel Vetter [Tue, 2 Jul 2013 07:18:39 +0000 (09:18 +0200)]
drm/prime: fix up handle_to_fd ioctl return value

In

commit da34242e5e0638312130f5bd5d2d277afbc6f806
Author: YoungJun Cho <yj44.cho@samsung.com>
Date:   Wed Jun 26 10:21:42 2013 +0900

    drm/prime: add return check for dma_buf_fd

the failure case handling was fixed up. But in the case when we
already had the buffer exported it changed the return value:
Previously we've return 0 on success, now we return the fd.

This ABI change has been caught by i-g-t/prime_self_import/with_one_bo.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66436
Cc: YoungJun Cho <yj44.cho@samsung.com>
Cc: Seung-Woo Kim <sw0312.kim@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: lu hua <huax.lu@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: YoungJun Cho <yj44.cho@samsung.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agodrm/radeon/sumo: implement support for disable_gfx_power_gating_in_uvd flag
Alex Deucher [Wed, 3 Jul 2013 19:14:25 +0000 (15:14 -0400)]
drm/radeon/sumo: implement support for disable_gfx_power_gating_in_uvd flag

Some asic revisions need to disable PG when UVD is active.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/tn: disable PG when changing UVD clocks
Alex Deucher [Wed, 3 Jul 2013 19:01:45 +0000 (15:01 -0400)]
drm/radeon/tn: disable PG when changing UVD clocks

Causes hangs for some people.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/sumo: disable PG when changing UVD clocks
Alex Deucher [Wed, 3 Jul 2013 19:07:28 +0000 (15:07 -0400)]
drm/radeon/sumo: disable PG when changing UVD clocks

Causes hangs for some people.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/aruba: disable additional rlc features
Alex Deucher [Wed, 3 Jul 2013 16:02:10 +0000 (12:02 -0400)]
drm/radeon/aruba: disable additional rlc features

They cause problems with dynamic clocking.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: fix endian bug in radeon_atom_get_mclk_range_table()
Alex Deucher [Wed, 3 Jul 2013 15:18:08 +0000 (11:18 -0400)]
drm/radeon: fix endian bug in radeon_atom_get_mclk_range_table()

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: fix compilation with certain versions of gcc
Mike Lothian [Tue, 2 Jul 2013 21:38:11 +0000 (17:38 -0400)]
drm/radeon/dpm: fix compilation with certain versions of gcc

Add #include <linux/seq_file.h> to *_dpm.c files

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: clarify debugfs warning
Alex Deucher [Tue, 2 Jul 2013 13:11:39 +0000 (09:11 -0400)]
drm/radeon/dpm: clarify debugfs warning

For chips without debugfs dpm support say that it's not
implemented rather than not supported to avoid confusion
about DPM support in general.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/i915: Don't try to tear down the stolen drm_mm if it's not there
Daniel Vetter [Tue, 2 Jul 2013 08:48:31 +0000 (10:48 +0200)]
drm/i915: Don't try to tear down the stolen drm_mm if it's not there

Every other place properly checks whether we've managed to set
up the stolen allocator at boot-up properly, with the exception
of the cleanup code. Which results in an ugly

*ERROR* Memory manager not clean. Delaying takedown

at module unload time since the drm_mm isn't initialized at all.

v2: While at it check whether the stolen drm_mm is initialized instead
of the more obscure stolen_base == 0 check.

v3: Fix up the logic. Also we need to keep the stolen_base check in
i915_gem_object_create_stolen_for_preallocated since that can be
called before stolen memory is fully set up. Spotted by Chris Wilson.

v4: Readd the conversion in i915_gem_object_create_stolen_for_preallocated,
the check is for the dev_priv->mm.gtt_space drm_mm, the stolen
allocatot must already be initialized when calling that function (if
we indeed have stolen memory).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65953
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: lu hua <huax.lu@intel.com> (v3)
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm: make drm_mm_init() return void
David Herrmann [Mon, 1 Jul 2013 18:32:58 +0000 (20:32 +0200)]
drm: make drm_mm_init() return void

There is no reason to return "int" as this function never fails.
Furthermore, several drivers (ast, sis) already depend on this.

Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
11 years agoMerge branch 'drm-next-3.11' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Tue, 2 Jul 2013 03:31:26 +0000 (13:31 +1000)]
Merge branch 'drm-next-3.11' of git://people.freedesktop.org/~agd5f/linux into drm-next

A few more patches for 3.11:
- add debugfs interface to check current DPM state
- Fix a bug that caused problems with DPM on BTC+ asics.

* 'drm-next-3.11' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon/dpm: add debugfs support for SI
  drm/radeon/dpm: add debugfs support for cayman
  drm/radeon/dpm: add debugfs support for TN
  drm/radeon/dpm: add debugfs support for ON/LN
  drm/radeon/dpm: add debugfs support for 7xx/evergreen/btc
  drm/radeon/dpm: add debugfs support for rv6xx
  drm/radeon/dpm: add infrastructure to support debugfs info
  drm/radeon/dpm: re-enable state transitions for Cayman
  drm/radeon/dpm: re-enable state transitions for BTC
  drm/radeon: fix typo in radeon_atom_init_mc_reg_table()
  drm/radeon/atom: fix endian bug in radeon_atom_init_mc_reg_table()
  drm/radeon: remove sumo dpm/uvd bringup leftovers

11 years agodrm/radeon/dpm: add debugfs support for SI
Alex Deucher [Fri, 28 Jun 2013 22:02:19 +0000 (18:02 -0400)]
drm/radeon/dpm: add debugfs support for SI

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add debugfs support for cayman
Alex Deucher [Fri, 28 Jun 2013 21:49:02 +0000 (17:49 -0400)]
drm/radeon/dpm: add debugfs support for cayman

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add debugfs support for TN
Alex Deucher [Fri, 28 Jun 2013 16:01:38 +0000 (12:01 -0400)]
drm/radeon/dpm: add debugfs support for TN

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add debugfs support for ON/LN
Alex Deucher [Fri, 28 Jun 2013 14:47:56 +0000 (10:47 -0400)]
drm/radeon/dpm: add debugfs support for ON/LN

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add debugfs support for 7xx/evergreen/btc
Alex Deucher [Fri, 28 Jun 2013 14:06:26 +0000 (10:06 -0400)]
drm/radeon/dpm: add debugfs support for 7xx/evergreen/btc

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add debugfs support for rv6xx
Alex Deucher [Fri, 28 Jun 2013 18:20:53 +0000 (14:20 -0400)]
drm/radeon/dpm: add debugfs support for rv6xx

This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: add infrastructure to support debugfs info
Alex Deucher [Fri, 28 Jun 2013 13:28:39 +0000 (09:28 -0400)]
drm/radeon/dpm: add infrastructure to support debugfs info

This lays the frameworks to report realtime power level
feedback.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: re-enable state transitions for Cayman
Alex Deucher [Mon, 1 Jul 2013 20:07:18 +0000 (16:07 -0400)]
drm/radeon/dpm: re-enable state transitions for Cayman

Was disabled due to stability issues on certain boards
caused by the a bug in the parsing of the atom mc reg tables.
That's fixed now so re-enable.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/dpm: re-enable state transitions for BTC
Alex Deucher [Mon, 1 Jul 2013 20:04:02 +0000 (16:04 -0400)]
drm/radeon/dpm: re-enable state transitions for BTC

Was disabled due to stability issues on certain boards
caused by the a bug in the parsing of the atom mc reg tables.
That's fixed now so re-enable.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: fix typo in radeon_atom_init_mc_reg_table()
Alex Deucher [Mon, 1 Jul 2013 17:33:53 +0000 (13:33 -0400)]
drm/radeon: fix typo in radeon_atom_init_mc_reg_table()

Bad pointer math.  Fixes hangs in state transitions with
BTC+ asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon/atom: fix endian bug in radeon_atom_init_mc_reg_table()
Alex Deucher [Mon, 1 Jul 2013 17:32:49 +0000 (13:32 -0400)]
drm/radeon/atom: fix endian bug in radeon_atom_init_mc_reg_table()

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/radeon: remove sumo dpm/uvd bringup leftovers
Alex Deucher [Fri, 28 Jun 2013 16:55:48 +0000 (12:55 -0400)]
drm/radeon: remove sumo dpm/uvd bringup leftovers

Function doesn't do anything useful.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
11 years agodrm/i915: Break up the large vsnprintf() in print_error_buffers()
Chris Wilson [Sat, 29 Jun 2013 22:26:50 +0000 (23:26 +0100)]
drm/i915: Break up the large vsnprintf() in print_error_buffers()

So it appears that I have encountered some bogosity when trying to call
i915_error_printf() with many arguments from print_error_buffers(). The
symptom is that the vsnprintf parser tries to interpret an integer arg
as a character string, the resulting OOPS indicating stack corruption.
Replacing the single call with its 13 format specifiers and arguments
with multiple calls to i915_error_printf() worked fine. This patch goes
one step further and introduced i915_error_puts() to pass the strings
simply.

It may not fix the root cause, but it does prevent my box from dying and
I think helps make print_error_buffers() more friendly.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66077
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Refactor the wait_rendering completion into a common routine
Chris Wilson [Sat, 29 Jun 2013 21:05:26 +0000 (22:05 +0100)]
drm/i915: Refactor the wait_rendering completion into a common routine

Harmonise the completion logic between the non-blocking and normal
wait_rendering paths, and move that logic into a common function.

In the process, we note that the last_write_seqno is by definition the
earlier of the two read/write seqnos and so all successful waits will
have passed the last_write_seqno. Therefore we can unconditionally clear
the write seqno and its domains in the completion logic.

v2: Add the missing ring parameter, because sometimes it is good to have
things compile.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Only clear write-domains after a successful wait-seqno
Chris Wilson [Fri, 28 Jun 2013 15:54:08 +0000 (16:54 +0100)]
drm/i915: Only clear write-domains after a successful wait-seqno

In the introduction of the non-blocking wait, I cut'n'pasted the wait
completion code from normal locked path. Unfortunately, this neglected
that the normal path returned early if the wait returned early. The
result is that read-only waits may return whilst the GPU is still
writing to the bo.

Fixes regression from
commit 3236f57a0162391f84b93f39fc1882c49a8998c7 [v3.7]
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Fri Aug 24 09:35:09 2012 +0100

    drm/i915: Use a non-blocking wait for set-to-domain ioctl

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66163
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: correct intel_dp_get_config() function for DevCPT
Xiong Zhang [Fri, 28 Jun 2013 04:59:06 +0000 (12:59 +0800)]
drm/i915: correct intel_dp_get_config() function for DevCPT

On DevCPT, the control register for Transcoder DP Sync Polarity is
TRANS_DP_CTL, not DP_CTL.
Without this patch, Many call trace occur on CPT machine with DP monitor.
The call trace is like: *ERROR* mismatch in adjusted_mode.flags(expected X,found X)

v2: use intel-crtc to simple patch, suggested by Daniel.

Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
[danvet: Extend the encoder->get_config comment to specify that we now
also depend upon intel_encoder->base.crtc being correct. Also bikeshed
s/intel_crtc/crtc/.]
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65287
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: fix hpd interrupt register locking
Daniel Vetter [Thu, 27 Jun 2013 15:52:15 +0000 (17:52 +0200)]
drm/i915: fix hpd interrupt register locking

Our interrupt handler (in hardirq context) could race with the timer
(in softirq context), hence we need to hold the spinlock around the
call to ->hdp_irq_setup in intel_hpd_irq_handler, too.

But as an optimization (and more so to clarify things) we don't need
to do the irqsave/restore dance in the hardirq context.

Note also that on ilk+ the race isn't just against the hotplug
reenable timer, but also against the fifo underrun reporting. That one
also modifies the SDEIMR register (again protected by the same
dev_priv->irq_lock).

To lock things down again sprinkle a assert_spin_locked. But exclude
the functions touching SDEIMR for now, I want to extract them all into
a new helper function (like we do already for pipestate, display
interrupts and all the various gt interrupts).

v2: Add the missing 't' Egbert spotted in a comment.

v3: Actually fix the right misspelled comment (Paulo).

Cc: Egbert Eich <eich@suse.de>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: fold the no-irq check into intel_hpd_irq_handler
Daniel Vetter [Thu, 27 Jun 2013 15:52:14 +0000 (17:52 +0200)]
drm/i915: fold the no-irq check into intel_hpd_irq_handler

The usual pattern for our sub-function irq_handlers is that they check
for the no-irq case themselves. This results in more streamlined code
in the upper irq handlers.

v2: Rebase on top of the i965g/gm sdvo hpd fix.

Cc: Egbert Eich <eich@suse.de>
Reviewed-by: Egbert Eich <eich@suse.de>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: fold the queue_work into intel_hpd_irq_handler
Daniel Vetter [Thu, 27 Jun 2013 15:52:13 +0000 (17:52 +0200)]
drm/i915: fold the queue_work into intel_hpd_irq_handler

Everywhere the same.

Note that this patch leaves unnecessary braces behind, but the next
patch will kill those all anyway (including the if itself) so I've
figured I can keep the diff a bit smaller.

v2: Rebase on top of the i965g/gm sdvo hpd fix.

Cc: Egbert Eich <eich@suse.de>
Reviewed-by: Egbert Eich <eich@suse.de>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: fold the hpd_irq_setup call into intel_hpd_irq_handler
Daniel Vetter [Thu, 27 Jun 2013 15:52:12 +0000 (17:52 +0200)]
drm/i915: fold the hpd_irq_setup call into intel_hpd_irq_handler

We already have a vfunc for this (and other parts of the hpd storm
handling code already use it).

v2: Rebase on top of the i965g/gm sdvo hpd fix.

Cc: Egbert Eich <eich@suse.de>
Reviewed-by: Egbert Eich <eich@suse.de>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: s/hotplug_irq_storm_detect/intel_hpd_irq_handler/
Daniel Vetter [Thu, 27 Jun 2013 15:52:11 +0000 (17:52 +0200)]
drm/i915: s/hotplug_irq_storm_detect/intel_hpd_irq_handler/

The combination of Paulo's fifo underrun detection code and Egbert's
hpd storm handling code unfortunately made the hpd storm handling code
racy.

To avoid duplicating tricky interrupt locking code over all platforms
start with a bit of refactoring. This patch is the very first step
since in the end the irq storm handling code will handle all hotplug
logic (and so also encapsulate the locking nicely).

v2: Rebase on top of the i965g/gm sdvo hpd fix.

Cc: Egbert Eich <eich@suse.de>
Reviewed-by: Egbert Eich <eich@suse.de>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: close tiny race in the ilk pcu even interrupt setup
Daniel Vetter [Thu, 27 Jun 2013 11:44:59 +0000 (13:44 +0200)]
drm/i915: close tiny race in the ilk pcu even interrupt setup

By the time we write DEIER in the postinstall hook the interrupt
handler could run any time. And it does modify DEIER to handle
interrupts.

Hence the DEIER read-modify-write cycle for enabling the PCU event
source is racy. Close this races the same way we handle vblank
interrupts: Unconditionally enable the interrupt in the IER register,
but conditionally mask it in IMR. The later poses no such race since
the interrupt handler does not touch DEIMR.

Also update the comment, the clearing has already happened
unconditionally above.

v2: Actually shove the updated comment into the right train^W commit,
as spotted by Paulo.

Cc: Paulo Zanoni <przanoni@gmail.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: fix locking around ironlake_enable|disable_display_irq
Daniel Vetter [Thu, 27 Jun 2013 11:44:58 +0000 (13:44 +0200)]
drm/i915: fix locking around ironlake_enable|disable_display_irq

The haswell unclaimed register handling code forgot to take the
spinlock. Since this is in the context of the non-rentrant interupt
handler and we only have one interrupt handler it is sufficient to
just grab the spinlock - we do not need to exclude any other
interrupts from running on the same cpu.

To prevent such gaffles in the future sprinkle assert_spin_locked over
these functions. Unfornately this requires us to hold the spinlock in
the ironlake postinstall hook where it is not strictly required:
Currently that is run in single-threaded context and with userspace
exlcuded from running concurrent ioctls. Add a comment explaining
this.

v2: ivb_can_enable_err_int also needs to be protected by the spinlock.
To ensure this won't happen in the future again also sprinkle a
spinlock assert in there.

v3: Kill the 2nd call to ivb_can_enable_err_int I've accidentally left
behind, spotted by Paulo.

Cc: Paulo Zanoni <przanoni@gmail.com>
Reviewed-by: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Fix context sizes on HSW
Ben Widawsky [Wed, 26 Jun 2013 04:53:40 +0000 (21:53 -0700)]
drm/i915: Fix context sizes on HSW

With updates to the spec, we can actually see the context layout, and
how many dwords are allocated. That table suggests we need 70720 bytes
per HW context. Rounded up, this is 18 pages. Looking at what lives
after the current 4 pages we use, I can't see too much important (mostly
it's d3d related), but there are a couple of things which look scary. I
am hopeful this can explain some of our odd HSW failures.

v2: Make the context only 17 pages. The power context space isn't used
ever, and execlists aren't used in our driver, making the actual total
66944 bytes.

v3: Add a comment to the code. (Jesse & Paulo)

Reported-by: "Azad, Vinit" <vinit.azad@intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Fix VLV sprite register offsets
Ville Syrjälä [Tue, 25 Jun 2013 11:16:35 +0000 (14:16 +0300)]
drm/i915: Fix VLV sprite register offsets

We forgot to add VLV_DISPLAY_BASE to the VLV sprite registers, which
caused the sprites to not work at all.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agoRevert "drm/i915: Don't use the HDMI port color range bit on Valleyview"
Ville Syrjälä [Tue, 25 Jun 2013 11:16:34 +0000 (14:16 +0300)]
Revert "drm/i915: Don't use the HDMI port color range bit on Valleyview"

The PIPECONF color range bit doesn't appear to be effective, on HDMI
outputs at least. The color range bit in the port register works though,
so let's use it.

I have not yet verified whether the PIPECONF bit works on DP outputs.

This reverts commit 83a2af88f80ebf8104c9e083b786668b00f5b9ce.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: s/LFP/LPF in DPIO PLL register names
Ville Syrjälä [Fri, 14 Jun 2013 11:02:53 +0000 (14:02 +0300)]
drm/i915: s/LFP/LPF in DPIO PLL register names

LPF is short for "low pass filter".

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Fix VLV PLL LPF coefficients for DAC
Ville Syrjälä [Fri, 14 Jun 2013 11:02:52 +0000 (14:02 +0300)]
drm/i915: Fix VLV PLL LPF coefficients for DAC

The current PLL settings produce a rather unstable picture when
I hook up a VLV to my HP ZR24w display via a VGA cable.

According to VLV2A0_DP_eDP_HDMI_DPIO_driver_vbios_notes_9, we should
use the the same LPF coefficients for DAC as we do for HDMI and RBR DP.
And indeed that seems to cure the shivers.

v2: Add the name of the relevant document to the commit message

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Jump to at least RPe on VLV when increasing the GPU frequency
Ville Syrjälä [Tue, 25 Jun 2013 18:38:11 +0000 (21:38 +0300)]
drm/i915: Jump to at least RPe on VLV when increasing the GPU frequency

If the current GPU frquency is below RPe, and we're asked to increase
it, just go directly to RPe. This should provide better performance
faster than letting the frequency trickle up in response to the up
threshold interrupts.

For now just do it for VLV, since that matches quite closely how VLV
used to operate when the rps delayed timer kept things at RPe always.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Don't increase the GPU frequency from the delayed VLV rps timer
Ville Syrjälä [Tue, 25 Jun 2013 18:38:10 +0000 (21:38 +0300)]
drm/i915: Don't increase the GPU frequency from the delayed VLV rps timer

There's little point in increasing the GPU frequency from the delayed
rps work on VLV. Now when the GPU is idle, the GPU frequency actually
keeps dropping gradually until it hits the minimum, whereas previously
it just ping-ponged constantly between RPe and RPe-1.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: GEN6_RP_INTERRUPT_LIMITS doesn't seem to exist on VLV
Ville Syrjälä [Tue, 25 Jun 2013 16:21:06 +0000 (19:21 +0300)]
drm/i915: GEN6_RP_INTERRUPT_LIMITS doesn't seem to exist on VLV

I can't find GEN6_RP_INTERRUPT_LIMITS (0xA014) anywhere in VLV docs.
Reading it always returns zero from what I can tell, and eliminating
it doesn't seem to make any difference to the behaviour of the system.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Make the rps new_delay comparison more readable
Ville Syrjälä [Tue, 25 Jun 2013 16:21:05 +0000 (19:21 +0300)]
drm/i915: Make the rps new_delay comparison more readable

Eliminate the weird inverted logic from the rps new_delay comparison.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Don't wait for Punit after each freq change on VLV
Ville Syrjälä [Tue, 25 Jun 2013 16:21:02 +0000 (19:21 +0300)]
drm/i915: Don't wait for Punit after each freq change on VLV

It seems that even though Punit reports the frequency change to have
been completed, it still reports the old frequency in the status
register for some time.

So rather than polling for Punit to complete the frequency change after
each request, poll before. This gets rid of the spurious "Punit overrode
GPU freq" messages.

This also lets us continue working while Punit is performing the actual
frequency change. As a result, openarena demo088-test1 timedemo average
fps is increased by ~5 fps, and the slowest frame duration is reduced
by ~25%.

The sysfs cur_freq file always reads the current frequency from Punit
anyway, so having rps.cur_delay be slightly off at times doesn't matter.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Clean up VLV rps code a bit
Ville Syrjälä [Tue, 25 Jun 2013 16:21:01 +0000 (19:21 +0300)]
drm/i915: Clean up VLV rps code a bit

Always print both the MHz value and raw register value for rps stuff.

Also kill a somewhat pointless local 'rpe' variable and just use
dev_priv->rps.rpe_delay.

While at it clean up the caps in "GPU" and "Punit" debug messages.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Detect invalid scanout pitches
Chris Wilson [Tue, 25 Jun 2013 16:26:45 +0000 (17:26 +0100)]
drm/i915: Detect invalid scanout pitches

Report back the user error of attempting to setup a CRTC with an invalid
framebuffer pitch. This is trickier than it should be as on gen4, there
is a restriction that tiled surfaces must have a stride less than 16k -
which is less than the largest supported CRTC size.

v2: Fix the limits for gen3
v3: Move check into intel_framebuffer_init() and fix VLV limits. (vsyrjala)
v4: Use idiomatic '>=' for generation checks

References: https://bugs.freedesktop.org/show_bug.cgi?id=65099
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Remove duplicated WaForceL3Serialization:vlv
Ville Syrjälä [Tue, 25 Jun 2013 13:38:21 +0000 (16:38 +0300)]
drm/i915: Remove duplicated WaForceL3Serialization:vlv

No need to apply WaForceL3Serialization:vlv twice.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: don't scream into dmesg when a modeset fails
Daniel Vetter [Tue, 25 Jun 2013 09:06:52 +0000 (11:06 +0200)]
drm/i915: don't scream into dmesg when a modeset fails

There are legit cases, e.g. when userspace asks for something
impossible. So tune it down to debug output like we do with all other
userspace-triggerable warnings.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66111#c5
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Rebased.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Fix up sdvo hpd pins for i965g/gm
Daniel Vetter [Mon, 24 Jun 2013 19:33:28 +0000 (21:33 +0200)]
drm/i915: Fix up sdvo hpd pins for i965g/gm

Bspec seems to be full of lies, at least it disagress with reality:
Two systems corrobated that SDVO hpd bits are the same as on gen3.

v2: Update comment a bit.

Cc: Arthur Ranyan <arthur.j.runyan@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: Chris Wilson <chris@chris-wilson.co.uk>
Reported-and-tested-by: Alex Fiestas <afiestas@kde.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58405
Cc: stable@vger.kernel.org
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Introduce an HAS_IPS() macro
Damien Lespiau [Mon, 24 Jun 2013 17:29:34 +0000 (18:29 +0100)]
drm/i915: Introduce an HAS_IPS() macro

Follow the trend and don't code conditions with platforms but with
features.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: fix build warning on format specifier mismatch
Jani Nikula [Fri, 7 Jun 2013 13:03:50 +0000 (16:03 +0300)]
drm/i915: fix build warning on format specifier mismatch

drivers/gpu/drm/i915/i915_gem.c: In function ‘i915_gem_object_bind_to_gtt’:
drivers/gpu/drm/i915/i915_gem.c:3002:3: warning: format ‘%ld’ expects
argument of type ‘long int’, but argument 5 has type ‘size_t’ [-Wformat]

v2: Use %zu instead of %d. Two char patch, and 100% wrong. (Ville)

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: tune down DIDL warning about too many outputs
Daniel Vetter [Mon, 24 Jun 2013 16:32:36 +0000 (18:32 +0200)]
drm/i915: tune down DIDL warning about too many outputs

Nothing the user (nor we) really can do about this, but upsets a nice
quiet boot.

Note that this happens mostly on SDVs where OEMs obviously haven't had
a chance yet to appropriately trim the output list.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65988
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
[danvet: Amend commit message a bit to clarify a question from Paulo.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: make compact dma scatter lists creation work with SWIOTLB backend.
Konrad Rzeszutek Wilk [Mon, 24 Jun 2013 15:47:48 +0000 (11:47 -0400)]
drm/i915: make compact dma scatter lists creation work with SWIOTLB backend.

Git commit 90797e6d1ec0dfde6ba62a48b9ee3803887d6ed4
("drm/i915: create compact dma scatter lists for gem objects") makes
certain assumptions about the under laying DMA API that are not always
correct.

On a ThinkPad X230 with an Intel HD 4000 with Xen during the bootup
I see:

[drm:intel_pipe_set_base] *ERROR* pin & fence failed
[drm:intel_crtc_set_config] *ERROR* failed to set mode on [CRTC:3], err = -28

Bit of debugging traced it down to dma_map_sg failing (in
i915_gem_gtt_prepare_object) as some of the SG entries were huge (3MB).

That unfortunately are sizes that the SWIOTLB is incapable of handling -
the maximum it can handle is a an entry of 512KB of virtual contiguous
memory for its bounce buffer. (See IO_TLB_SEGSIZE).

Previous to the above mention git commit the SG entries were of 4KB, and
the code introduced by above git commit squashed the CPU contiguous PFNs
in one big virtual address provided to DMA API.

This patch is a simple semi-revert - were we emulate the old behavior
if we detect that SWIOTLB is online. If it is not online then we continue
on with the new compact scatter gather mechanism.

An alternative solution would be for the the '.get_pages' and the
i915_gem_gtt_prepare_object to retry with smaller max gap of the
amount of PFNs that can be combined together - but with this issue
discovered during rc7 that might be too risky.

Reported-and-Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
CC: Chris Wilson <chris@chris-wilson.co.uk>
CC: Imre Deak <imre.deak@intel.com>
CC: Daniel Vetter <daniel.vetter@ffwll.ch>
CC: David Airlie <airlied@linux.ie>
CC: <dri-devel@lists.freedesktop.org>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: Fix PCH detect with multiple ISA bridges in VM
Rui Guo [Wed, 19 Jun 2013 13:10:23 +0000 (21:10 +0800)]
drm/i915: Fix PCH detect with multiple ISA bridges in VM

In some virtualized environments (e.g. XEN), there is irrelevant ISA bridge in
the system. To work reliably, we should scan trhough all the ISA bridge
devices and check for the first match, instead of only checking the first one.

Signed-off-by: Rui Guo <firemeteor@users.sourceforge.net>
[danvet: Fixup conflict with the num_pch_pll removal. And add
subsystem header to the commit message headline.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agodrm/i915: rename intel_dp_destroy to intel_dp_connector_destroy
Paulo Zanoni [Wed, 12 Jun 2013 20:27:30 +0000 (17:27 -0300)]
drm/i915: rename intel_dp_destroy to intel_dp_connector_destroy

Because it's the function that destroys the connector, not the
encoder. And we already have intel_dp_encoder_destroy.

This has annoyed me for a long time.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Zoltan Nyul <zoltan.nyul@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
11 years agoMerge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux...
Dave Airlie [Mon, 1 Jul 2013 04:10:20 +0000 (14:10 +1000)]
Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next

- Various fixes that make surviving concurrent piglit more possible.
- Buffer object deletion no longer synchronous
- Context/register initialisation updates that have been reported to
solve some stability issues (particularly on some problematic GF119
chips)
- Kernel side support for VP2 video decoding engines

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (44 commits)
  drm/nvd0-/disp: handle case where display engine is missing/disabled
  drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4
  drm/nouveau/bsp/nv84: initial vp2 engine implementation
  drm/nouveau/vp/nv84: initial vp2 engine implementation
  drm/nouveau/core: xtensa engine base class implementation
  drm/nouveau/vdec: fork vp3 implementations from vp2
  drm/nouveau/core: move falcon class to engine/
  drm/nouveau/kms: don't fail if there's no dcb table entries
  drm/nouveau: remove limit on gart
  drm/nouveau/vm: perform a bar flush when flushing vm
  drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches
  drm/nvc8/gr: update initial register/context values
  drm/nvc4/gr: update initial register/context values
  drm/nvc1/gr: update initial register/context values
  drm/nvc3/gr: update initial register/context values
  drm/nvc0/gr: update initial register/context values
  drm/nvd9/gr: update initial register/context values
  drm/nve4/gr: update initial register/context values
  drm/nvc0-/gr: bump maximum gpc/tpc limits
  drm/nvf0/gr: initial register/context setup
  ...

11 years agodrm/nvd0-/disp: handle case where display engine is missing/disabled
Maarten Lankhorst [Thu, 27 Jun 2013 07:35:53 +0000 (17:35 +1000)]
drm/nvd0-/disp: handle case where display engine is missing/disabled

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4
Ben Skeggs [Wed, 5 Jun 2013 00:28:12 +0000 (10:28 +1000)]
drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4

No code changes, proven by envyas producing identical binaries.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/bsp/nv84: initial vp2 engine implementation
Ilia Mirkin [Thu, 27 Jun 2013 04:14:01 +0000 (14:14 +1000)]
drm/nouveau/bsp/nv84: initial vp2 engine implementation

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/vp/nv84: initial vp2 engine implementation
Ilia Mirkin [Thu, 27 Jun 2013 04:12:46 +0000 (14:12 +1000)]
drm/nouveau/vp/nv84: initial vp2 engine implementation

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/core: xtensa engine base class implementation
Ilia Mirkin [Thu, 27 Jun 2013 04:08:22 +0000 (14:08 +1000)]
drm/nouveau/core: xtensa engine base class implementation

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/vdec: fork vp3 implementations from vp2
Ilia Mirkin [Thu, 27 Jun 2013 04:04:20 +0000 (14:04 +1000)]
drm/nouveau/vdec: fork vp3 implementations from vp2

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/core: move falcon class to engine/
Ben Skeggs [Thu, 27 Jun 2013 03:59:01 +0000 (13:59 +1000)]
drm/nouveau/core: move falcon class to engine/

Not really "core" per-se.  About to merge Ilia's work adding another
similar class for the VP2 xtensa engines, so, seems like a good time to
move all these to engine/.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/kms: don't fail if there's no dcb table entries
Ben Skeggs [Tue, 25 Jun 2013 02:26:42 +0000 (12:26 +1000)]
drm/nouveau/kms: don't fail if there's no dcb table entries

Fixes module not loading on Tesla K20.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau: remove limit on gart
Maarten Lankhorst [Mon, 17 Jun 2013 13:09:09 +0000 (15:09 +0200)]
drm/nouveau: remove limit on gart

Most graphics cards nowadays have a multiple of this limit as their vram,
so limiting GART doesn't seem to make much sense.

Signed-off-by: Maarten >Lnkhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/vm: perform a bar flush when flushing vm
Maarten Lankhorst [Tue, 11 Jun 2013 12:17:25 +0000 (14:17 +0200)]
drm/nouveau/vm: perform a bar flush when flushing vm

Appears to fix the regression from "drm/nvc0/vm: handle bar tlb flushes
internally".

nvidia always seems to do this flush after writing values.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches
Ben Skeggs [Tue, 14 May 2013 03:09:28 +0000 (13:09 +1000)]
drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc8/gr: update initial register/context values
Ben Skeggs [Tue, 14 May 2013 00:54:32 +0000 (10:54 +1000)]
drm/nvc8/gr: update initial register/context values

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc4/gr: update initial register/context values
Ben Skeggs [Mon, 13 May 2013 23:23:52 +0000 (09:23 +1000)]
drm/nvc4/gr: update initial register/context values

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc1/gr: update initial register/context values
Ben Skeggs [Mon, 13 May 2013 08:29:02 +0000 (18:29 +1000)]
drm/nvc1/gr: update initial register/context values

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc3/gr: update initial register/context values
Ben Skeggs [Mon, 13 May 2013 04:45:56 +0000 (14:45 +1000)]
drm/nvc3/gr: update initial register/context values

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc0/gr: update initial register/context values
Ben Skeggs [Mon, 13 May 2013 02:57:10 +0000 (12:57 +1000)]
drm/nvc0/gr: update initial register/context values

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvd9/gr: update initial register/context values
Ben Skeggs [Sun, 12 May 2013 22:33:52 +0000 (08:33 +1000)]
drm/nvd9/gr: update initial register/context values

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nve4/gr: update initial register/context values
Ben Skeggs [Tue, 7 May 2013 04:30:52 +0000 (14:30 +1000)]
drm/nve4/gr: update initial register/context values

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc0-/gr: bump maximum gpc/tpc limits
Ben Skeggs [Mon, 6 May 2013 06:44:17 +0000 (16:44 +1000)]
drm/nvc0-/gr: bump maximum gpc/tpc limits

Needed for GK110, separate commit to catch any unexpected breaks to
other parts of the code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvf0/gr: initial register/context setup
Ben Skeggs [Mon, 6 May 2013 06:00:20 +0000 (16:00 +1000)]
drm/nvf0/gr: initial register/context setup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nve7/gr: update initial register/context values
Ben Skeggs [Mon, 6 May 2013 05:27:44 +0000 (15:27 +1000)]
drm/nve7/gr: update initial register/context values

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nve6/gr: update initial register/context values
Ben Skeggs [Mon, 6 May 2013 01:35:37 +0000 (11:35 +1000)]
drm/nve6/gr: update initial register/context values

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau: delay busy bo vma removal until fence signals
Ben Skeggs [Mon, 6 May 2013 23:48:30 +0000 (09:48 +1000)]
drm/nouveau: delay busy bo vma removal until fence signals

As opposed to an explicit wait.  Allows userspace to not stall waiting
on buffer deletion.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/vm: make each vma take a reference on its parent vm
Ben Skeggs [Mon, 6 May 2013 22:36:33 +0000 (08:36 +1000)]
drm/nouveau/vm: make each vma take a reference on its parent vm

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/core: remove nouveau_mm.mutex, no more users
Ben Skeggs [Mon, 13 May 2013 12:30:56 +0000 (22:30 +1000)]
drm/nouveau/core: remove nouveau_mm.mutex, no more users

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nouveau/vm: take subdev mutex, not the mm, protects against race with vm/nvc0
Ben Skeggs [Mon, 13 May 2013 12:26:26 +0000 (22:26 +1000)]
drm/nouveau/vm: take subdev mutex, not the mm, protects against race with vm/nvc0

nvc0_vm_flush() accesses the pgd list, which will soon be able to race
with vm_unlink() during channel destruction.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc0/vm: handle bar tlb flushes internally
Ben Skeggs [Mon, 13 May 2013 12:07:16 +0000 (22:07 +1000)]
drm/nvc0/vm: handle bar tlb flushes internally

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nv50-/vm: take mutex rather than irqsave spinlock
Ben Skeggs [Mon, 13 May 2013 11:13:15 +0000 (21:13 +1000)]
drm/nv50-/vm: take mutex rather than irqsave spinlock

These operations can take quite some time, and we really don't want to
have to hold a spinlock for too long.

Now that the lock ordering for vm and the gr/nv84 hw bug workaround has
been reversed, it's possible to use a mutex here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nv50/vm: remove explicit vm knowledge from engines
Ben Skeggs [Mon, 13 May 2013 10:55:46 +0000 (20:55 +1000)]
drm/nv50/vm: remove explicit vm knowledge from engines

This reverses the lock ordering between VM and gr/nv84:nvc0.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nv50/vm: handle bar tlb flushes internally
Ben Skeggs [Mon, 13 May 2013 10:41:18 +0000 (20:41 +1000)]
drm/nv50/vm: handle bar tlb flushes internally

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nvc0/gr: port mp trap handling from calim's kepler code
Ben Skeggs [Mon, 13 May 2013 01:54:05 +0000 (11:54 +1000)]
drm/nvc0/gr: port mp trap handling from calim's kepler code

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nve0/gr: attempt to resume after sm traps
Ben Skeggs [Tue, 7 May 2013 03:13:41 +0000 (13:13 +1000)]
drm/nve0/gr: attempt to resume after sm traps

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11 years agodrm/nve0/gr: s/tp/tpc/
Ben Skeggs [Tue, 7 May 2013 03:04:18 +0000 (13:04 +1000)]
drm/nve0/gr: s/tp/tpc/

NVIDIA's name...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>