GitHub/exynos8895/android_kernel_samsung_universal8895.git
12 years agodrm/i915: Clear the pending_gpu_fenced_access flag at the start of execbuffer
Chris Wilson [Fri, 20 Jul 2012 11:41:07 +0000 (12:41 +0100)]
drm/i915: Clear the pending_gpu_fenced_access flag at the start of execbuffer

Otherwise once we use the buffer with a BLT command on gen2/3, we will
always regard future command submissions as continuing the fenced
access. However, now that we flush/invalidate between every batch we can
drop this pessimism.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Replace the complex flushing logic with simple invalidate/flush all
Daniel Vetter [Sat, 21 Jul 2012 10:25:01 +0000 (12:25 +0200)]
drm/i915: Replace the complex flushing logic with simple invalidate/flush all

Now that we unconditionally flush and invalidate between every batch
buffer, we no longer need the complex logic to decide which domains
require flushing. Remove it and rejoice.

v2 (danvet): Keep around the flip waiting logic. It's gross and
broken, I know, but we can't just kill that thing ... even if we just
keep it around as a reminder that things are broken.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Remove the explicit flush of the GPU write domain
Chris Wilson [Fri, 20 Jul 2012 11:41:05 +0000 (12:41 +0100)]
drm/i915: Remove the explicit flush of the GPU write domain

Rely instead on the insertion of the implicit flush before the seqno
breadcrumb.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Remove explicit flush from i915_gem_object_flush_fence()
Chris Wilson [Fri, 20 Jul 2012 11:41:04 +0000 (12:41 +0100)]
drm/i915: Remove explicit flush from i915_gem_object_flush_fence()

As the flush is either performed explictly immediately after the
execbuffer dispatch, or before the serialisation of last_fenced_seqno we
can forgo the explict i915_gem_flush_ring().

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Remove the per-ring write list
Chris Wilson [Fri, 20 Jul 2012 11:41:03 +0000 (12:41 +0100)]
drm/i915: Remove the per-ring write list

This is now handled by a global flag to ensure we emit a flush before
the next serialisation point (if we failed to queue one previously).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Remove the defunct flushing list
Chris Wilson [Fri, 20 Jul 2012 11:41:02 +0000 (12:41 +0100)]
drm/i915: Remove the defunct flushing list

As we guarantee to emit a flush before emitting the breadcrumb or
the next batchbuffer, there is no further need for the flushing list.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Replace the pending_gpu_write flag with an explicit seqno
Chris Wilson [Fri, 20 Jul 2012 11:41:01 +0000 (12:41 +0100)]
drm/i915: Replace the pending_gpu_write flag with an explicit seqno

As we always flush the GPU cache prior to emitting the breadcrumb, we no
longer have to worry about the deferred flush causing the
pending_gpu_write to be delayed. So we can instead utilize the known
last_write_seqno to hopefully minimise the wait times.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Remove assertion over write domain after i915_gem_object_sync()
Chris Wilson [Fri, 20 Jul 2012 11:41:00 +0000 (12:41 +0100)]
drm/i915: Remove assertion over write domain after i915_gem_object_sync()

As we move to lazily clearing the GPU write domain only when the buffer
becomes inactive, this leaves a window of opportunity for
i915_gem_object_pin_to_display_plane() to detect a seemingly
inconsistent value. This function is special as it tries to pipeline the
operation to avoid the stall and so may not retires the buffer and we
may not get the opportunity to clear the write domain. However, we know
all is good, so drop the assertion.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Allow late allocation of request for i915_add_request()
Chris Wilson [Fri, 20 Jul 2012 11:40:59 +0000 (12:40 +0100)]
drm/i915: Allow late allocation of request for i915_add_request()

Request preallocation was added to i915_add_request() in order to
support the overlay. However, not all users care and can quite happily
ignore the failure to allocate the request as they will simply repeat
the request in the future.

By pushing the allocation down into i915_add_request(), we can then
remove some rather ugly error handling in the callers.

v2: Nullify request->file_priv otherwise we chase a garbage pointer
when retiring requests.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: add inte_crt->adpa_reg
Daniel Vetter [Wed, 11 Jul 2012 14:27:57 +0000 (16:27 +0200)]
drm/i915: add inte_crt->adpa_reg

With the base addresses shifting around, this is easier to handle.
Also move to the real reg offset on vlv.

Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: create VLV_DSIPLAY_BASE #define
Daniel Vetter [Wed, 11 Jul 2012 14:27:55 +0000 (16:27 +0200)]
drm/i915: create VLV_DSIPLAY_BASE #define

Will be used more in the next patch.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Return a mask of the active rings in the high word of busy_ioctl
Chris Wilson [Wed, 4 Jul 2012 11:25:08 +0000 (12:25 +0100)]
drm/i915: Return a mask of the active rings in the high word of busy_ioctl

The intention is to help select which engine to use for copies with
interoperating clients - such as a GL client making a request to the X
server to perform a SwapBuffers, which may require copying from the
active GL back buffer to the X front buffer.

We choose to report a mask of the active rings to future proof the
interface against any changes which may allow for the object to reside
upon multiple rings.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: bikeshed away the write ring mask and add the explanation
Chris sent in a follow-up mail why we decided to use masks.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: add register read IOCTL
Ben Widawsky [Thu, 12 Jul 2012 18:01:05 +0000 (11:01 -0700)]
drm/i915: add register read IOCTL

The interface's immediate purpose is to do synchronous timestamp queries
as required by GL_TIMESTAMP. The GPU has a register for reading the
timestamp but because that would normally require root access through
libpciaccess, the IOCTL can provide this service instead.

Currently the implementation whitelists only the render ring timestamp
register, because that is the only thing we need to expose at this time.

v2: make size implicit based on the register offset
Add a generation check

Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: Jacek Lawrynowicz <jacek.lawrynowicz@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: fixup the ioctl numerb:]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Reserve ioctl numbers for set/get_caching
Daniel Vetter [Wed, 18 Jul 2012 18:03:05 +0000 (20:03 +0200)]
drm/i915: Reserve ioctl numbers for set/get_caching

I'm planing to merge this next week for 3.7, but I'd like to avoid
stupid conflicts with the exsting userspace when merging the new
reg_read ioctl (which doesn't have userspace yet, but this caching
interface has).

Header extracted from Chris Wilson's patch, but fix up the copy&pasted
comment in the interface struct.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Support for ns2501-DVO
Thomas Richter [Wed, 18 Jul 2012 17:22:30 +0000 (19:22 +0200)]
drm/i915: Support for ns2501-DVO

This patch adds support for the ns2501 DVO, found in some older Fujitsu/Siemens Labtops.
It is in the state of "works for me".
Includes now proper DPMS support. Includes switching between resolutions -
from 640x480 to 1024x768.
Currently assumes that the native display resolution is 1024x768.

The ns2501 seems to be rather critical - if the output PLL is not
running, the chip doesn't seem to be clocked and then doesn't react
on i2c messages. Thus, a quick'n-dirty trick ensures that the DVO
is active before submitting any i2c messages to it. This is
probably to be reviewed.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=17902
Signed-off-by: Thomas Richter <thor@math.tu-berlin.de>
[danvet: fixup whitespace fail.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: add port field to struct intel_dp and use it
Paulo Zanoni [Tue, 17 Jul 2012 20:53:45 +0000 (17:53 -0300)]
drm/i915: add port field to struct intel_dp and use it

This will be needed for Haswell, but already has its uses here.

This patch started as a small patch written patch by Shobhit Kumar,
but it has changed so much that none of its original lines remain.

Credits-to: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: move common code to intel_dp_set_link_train
Paulo Zanoni [Tue, 17 Jul 2012 19:55:16 +0000 (16:55 -0300)]
drm/i915: move common code to intel_dp_set_link_train

We have some common code that we always run before calling
intel_dp_set_link_train. This common code sets the correct training
patterns to the DP variable. If we add more calls to
intel_dp_set_link_train, we'll also have to duplicate this common
code. So instead of repeating this code whenever we call
intel_dp_set_link_train, we move the code to inside the function: now
we check which training pattern we're going to set and then we set the
DP register according to it.

One of the side-effects of this change is that now we never forget to
mask the training pattern bits before changing them. It looks like
this was working before because we were first masking the bits, then
writing 00, 01 and then 11.

This patch also enables us to use the intel_dp_set_link_train function
when disabling link training: in this case we need to avoid writing
the DP_TRAINING_LANE*_SET AUX commands.

As a bonus, the big intel_dp_{start,complete}_link_train functions
will get smaller and a little bit easier to read.

Version 2 changes:
 - Rewrite commit message.
 - Also clear the training pattern bits before changing them.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: add port parameter to intel_hdmi_init
Daniel Vetter [Thu, 12 Jul 2012 18:19:59 +0000 (20:19 +0200)]
drm/i915: add port parameter to intel_hdmi_init

Instead of having a giant if cascade to figure this out according to
the passed-in register. We could do quite a bit more cleaning up and
all by using the port at more places, but I think this should be part
of a bigger rework to introduce a struct intel_digital_port which
would keep track of all these things. I guess this will be part of
some haswell-DP-induced refactoring.

For now this rips out the big cascade, which is what annoyed me so
much.

v2: Add port variable name back for the func decl (I've tried to trick
myself below the 80 char limit).

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: simplify possible_clones computation
Daniel Vetter [Thu, 12 Jul 2012 18:08:18 +0000 (20:08 +0200)]
drm/i915: simplify possible_clones computation

Intel hw only has one MUX for encoders, so outputs are either not
cloneable or all in the same group of cloneable outputs. This neatly
simplifies the code and allows us to ditch some ugly if cascades in
the dp and hdmi init code (well, we need these if cascades for other
stuff still, but that can be taken care of in follow-up patches).

Note that this changes two things:
- dvo can now be cloned with sdvo, but dvo is gen2 whereas sdvo is
  gen3+, so no problem. Note that the old code had a bug and didn't
  allow cloning crt with dvo (but only the other way round).
- sdvo-lvds can now be cloned with sdvo-non-tv. Spec says this won't
  work, but the only reason I've found is that you can't use the
  panel-fitter (used for lvds upscaling) with anything else. But we
  don't use the panel fitter for sdvo-lvds. Imo this part of Bspec is
  a) rather confusing b) mostly as a guideline to implementors (i.e.
  explicitly stating what is already implicit from the spec, without
  always going into the details of why). So I think we can ignore this
  - worst case we'll get a bug report from a user with with sdvo-lvds
  and sdvo-tmds and have to add that special case back in.

Because sdvo lvds is a bit special explain in comments why sdvo LVDS
outputs can be cloned, but native LVDS and eDP can't be cloned - we
use the panel fitter for the later, but not for sdvo.

Note that this also uncoditionally initializes the panel_vdd work used
by eDP. Trying to be clever doesn't buy us anything (but strange bugs)
and this way we can kill the is_edp check.

v2: Incorporate review from Paulo
- Add in a missing space.
- Pimp comment message to address his concerns.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: group ADPA #defines together
Daniel Vetter [Wed, 11 Jul 2012 14:27:56 +0000 (16:27 +0200)]
drm/i915: group ADPA #defines together

Splitting them up between pch and gmch variants just makes it harder
to find things. Especially since the hotplug bits are actually valid
on earlier chips, too.

v2: Fixed the comment as pointed out by Paulo Zanoni.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Cleanup context switching through do_switch()
Chris Wilson [Sun, 15 Jul 2012 11:34:24 +0000 (12:34 +0100)]
drm/i915: Cleanup context switching through do_switch()

When bug hunting, I found the interface to do_switch() overly
complicated and I believe festered the earlier bug. This aims to make
the code a little clearer.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Move DP structs to shared location
Shobhit Kumar [Fri, 29 Jun 2012 19:03:35 +0000 (16:03 -0300)]
drm/i915: Move DP structs to shared location

Move the DP structure to shared location so that it can be used from
within the ddi module.

Changes from Paulo:
- Move less code to intel_drv.h
- Remove #include statement
- Replace a tab with a space in train_set

Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: unbreak lastclose for failed driver init
Daniel Vetter [Sat, 21 Jul 2012 14:47:09 +0000 (16:47 +0200)]
drm/i915: unbreak lastclose for failed driver init

We now refuse to load on gen6+ if kms is not enabled:

commit 26394d9251879231b85e6c8cf899fa43e75c68f1
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Mon Mar 26 21:33:18 2012 +0200

    drm/i915: refuse to load on gen6+ without kms

Which results in the drm core calling our lastclose function to clean
up the mess, but that one is neatly broken for such failure cases
since kms has been introduced in

commit 79e539453b34e35f39299a899d263b0a1f1670bd
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Fri Nov 7 14:24:08 2008 -0800

    DRM: i915: add mode setting support

Reported-and-tested-by: Paulo Zanoni <przanoni@gmail.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Set the context before setting up regs for the context.
Eric Anholt [Mon, 23 Jul 2012 19:33:55 +0000 (12:33 -0700)]
drm/i915: Set the context before setting up regs for the context.

Fixes failures in transform feedback on gen7 because our SOL_RESET
flag was setting the transform feedback offsets in the old context
(occasionally happened to be ours) instead of the new context.

Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: constify mode in crtc_mode_fixup
Daniel Vetter [Fri, 20 Jul 2012 08:30:45 +0000 (10:30 +0200)]
drm/i915: constify mode in crtc_mode_fixup

Laurent Pinchart missed this when sending in is giant constify patch:

commit e811f5ae19043b2ac2c28e147a4274038e655598
Author: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Date:   Tue Jul 17 17:56:50 2012 +0200

    drm: Make the .mode_fixup() operations mode argument a const pointer

Acked-by; Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915/lvds: ditch ->prepare special case
Daniel Vetter [Wed, 11 Jul 2012 14:27:52 +0000 (16:27 +0200)]
drm/i915/lvds: ditch ->prepare special case

LVDS is the first output where dpms on/off and prepare/commit don't
perfectly match. Now the idea behind this special case seems to be
that for simple resolution changes on the LVDS we don't need to stop
the pipe, because (at least on newer chips) we can adjust the panel
fitter on the fly.

There are a few problems with the current code though:
- We still stop and restart the pipe unconditionally, because the crtc
  helper code isn't flexible enough.
- We show some ugly flickering, especially when changing crtcs (this
  the crtc helper would actually take into account, but we don't
  implement the encoder->get_crtc callback required to make this work
  properly).

So it doesn't even work as advertised. I agree that it would be nice
to do resolution changes on LVDS (and also eDP) whithout blacking the
screen where the panel fitter allows to do that. But imo we should
implement this as a special case a few layers up in the mode set code,
akin to how we already detect simple framebuffer changes (and only
update the required registers with ->mode_set_base).

Until this is all in place, make our lives easier and just rip it out.

Also note that this seems to fix actual bugs with enabling the lvds
output, see:

http://lists.freedesktop.org/archives/intel-gfx/2012-July/018614.html

Cc: Takashi Iwai <tiwai@suse.de>
Cc: Giacomo Comes <comes@naic.edu>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Tested-by: Takashi Iwai <tiwai@suse.de>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: dereferencing an error pointer
Dan Carpenter [Tue, 17 Jul 2012 06:44:49 +0000 (09:44 +0300)]
drm/i915: dereferencing an error pointer

We need to check that "ctx" is a valid pointer before dereferencing it.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: fix invalid reference handling of the default ctx obj
Chris Wilson [Sun, 15 Jul 2012 11:34:23 +0000 (12:34 +0100)]
drm/i915: fix invalid reference handling of the default ctx obj

Otherwise we end up trying to unpin a freed object and BUG.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Add -EIO to the list of known errors for __wait_seqno
Chris Wilson [Mon, 16 Jul 2012 12:05:34 +0000 (13:05 +0100)]
drm/i915: Add -EIO to the list of known errors for __wait_seqno

This prevents a WARN introduced with

  commit de2b998552c1534e87bfbc51ec5734b02bc89020
  Author: Daniel Vetter <daniel.vetter@ffwll.ch>
  Date:   Wed Jul 4 22:52:50 2012 +0200

      drm/i915: don't return a spurious -EIO from intel_ring_begin

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Flush the context object from the CPU caches upon switching
Chris Wilson [Sun, 15 Jul 2012 11:34:22 +0000 (12:34 +0100)]
drm/i915: Flush the context object from the CPU caches upon switching

The issue is that we stale data in the CPU caches, when we come to
swap-out the object, the CPU may short-circuit the reads from those
cacheline and so corrupt the context object.

Secondary, leaving the context object as being marked in the CPU write
domain whilst on the GPU active list is a bad idea and will throw
warnings later.

Note: Thanks to calling set_to_gtt_domain with write = false and not
setting any gpu write domain when putting a context object onto the
active list (when we switch away from it) the set_to_gtt_domain call
won't block.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Added a note to the commit message and a comment in the code
to explain the clever non-blocking trick.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Make the lock for pageflips interruptible
Chris Wilson [Wed, 23 May 2012 10:13:58 +0000 (11:13 +0100)]
drm/i915: Make the lock for pageflips interruptible

As we take the struct_mutex lock to access the command-stream, there is
a possibility that we may need to wait for a GPU hang and so should make
the lock both interruptible and error-checking.

References: https://bugs.freedesktop.org/show_bug.cgi?id=50069
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: don't forget the PCH backlight registers
Paulo Zanoni [Sat, 14 Jul 2012 14:57:12 +0000 (11:57 -0300)]
drm/i915: don't forget the PCH backlight registers

When we enable/disable the CPU backlight registers we can't forget to
enable/disable the PCH backlight registers. Since we're using the CPU
registers we should also unset the override bit.

Fixes a regression on the following commit:
  drm/i915: properly enable the blc controller on the right pipe

The commit just deleted the code that sets the PCH registers, so it
was relying on the values set by the BIOS. I told my BIOS to boot on
the DVI monitor instead of the LVDS panel, so I noticed the bug.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Insert a flush between batches if the breadcrumb was dropped
Chris Wilson [Fri, 13 Jul 2012 13:14:08 +0000 (14:14 +0100)]
drm/i915: Insert a flush between batches if the breadcrumb was dropped

If we drop the breadcrumb request after a batch due to a signal for
example we aim to fix it up at the next opportunity. In this case we
emit a second batchbuffer with no waits upon the first and so no
opportunity to insert the missing request, so we need to emit the
missing flush for coherency. (Note that that invalidating the render
cache is the same as flushing it, so there should have been no
observable corruption.)

Note that beside simply adding the missing flush, avoiding potential
render corruption, this will also fix at least parts of the problem
introduced by some funny interaction of these two commits:

commit de2b998552c1534e87bfbc51ec5734b02bc89020
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Jul 4 22:52:50 2012 +0200

    drm/i915: don't return a spurious -EIO from intel_ring_begin

which allowed intel_ring_begin to return -ERESTARTSYS and

commit cc889e0f6ce6a63c62db17d702ecfed86d58083f
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Jun 13 20:45:19 2012 +0200

    drm/i915: disable flushing_list/gpu_write_list

which essentially disabled the flushing list.

The issue happens when we submit a batch & emit it, but get
interrupted (thanks to the first patch) while trying to emit the
flush. On the next batch we still assume that the full gpu domain
handling is in effect and hence compute the invalidate&flushing
domains. But thanks to the 2nd patch we totally ignore these and only
invalidate all gpu domains, presuming that any required flushes have
been issued already.  Which is wrong and eventually results in us
updating the new write_domain values with the computed
pending_write_domain values, which leaves an object with write_domain
== 0 on the gpu_write_list.

As soon as we try to unbind that object, things blow up.

Fix this by emitting the missing flush according to the new
ring->gpu_caches_dirty flag.

Note that this does _not_ fix all the current cases where we end up
with an object on the flushing_list that can't be flushed.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52040
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Add bug explanation to commit message.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: missing error case in init status page
Ben Widawsky [Fri, 13 Jul 2012 06:16:12 +0000 (23:16 -0700)]
drm/i915: missing error case in init status page

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: mask tiled bit when updating ILK sprites
Ander Conselvan de Oliveira [Fri, 13 Jul 2012 12:50:33 +0000 (15:50 +0300)]
drm/i915: mask tiled bit when updating ILK sprites

Or going from tiled to untiled may break.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: try to train DP even harder
Paulo Zanoni [Fri, 29 Jun 2012 19:03:34 +0000 (16:03 -0300)]
drm/i915: try to train DP even harder

While debugging Haswell link train failures I observed that we never
try the maximum voltage configuration more than once consecutively. We
start the training, the monitor keeps telling us to increase the
voltage, then when we reach the maximum we just go back to the start
(because of the "memset" above "voltage_tries = 0"). When we reach
this point, we keep alternating between the maximum and the minimum
voltages until we give up.

The DP spec suggests that we should try the same voltage 5 times
before giving up. This patch makes us try the maximum voltage at
least 5 times before going back to the minimum voltages.

This patch does not fix any particular bug I'm aware of.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: kill intel_ddc_probe
Daniel Vetter [Wed, 11 Jul 2012 10:31:53 +0000 (12:31 +0200)]
drm/i915: kill intel_ddc_probe

We have way too much lying hardware to rely on a simple "does someone
answer on the ddc i2c address?" check. And now it's unused, so just
kill it.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: check whether we actually received an edid in detect_ddc
Daniel Vetter [Wed, 11 Jul 2012 10:31:52 +0000 (12:31 +0200)]
drm/i915: check whether we actually received an edid in detect_ddc

Somehow detect_ddc manages to fall through all checks when we think
that something responds on the ddc i2c address, but the edid read
failed. Fix this up by explicitly checking for this case.

This fixes a regression on newer chips because since

commit aaa377302b2994fcc2c66741b47da33feb489dca
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Sat Jun 16 15:30:32 2012 +0200

    drm/i915/crt: Do not rely upon the HPD presence pin

we use ddc detection also on hotplug capable platforms. And one of
these reads all 0s for any i2c transaction if nothing is connected to
the vga port.

v2: Implement Chris Wilson's review:
- simplify logic, default to "nothing detected"
- kill stale comment
- BUG_ON(!crt->type != ANALOG)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51900
Tested-by: Yang Guang <guang.a.yang@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: fix up PCH backlight #define mixup
Daniel Vetter [Tue, 10 Jul 2012 22:31:06 +0000 (00:31 +0200)]
drm/i915: fix up PCH backlight #define mixup

I so totally suck.

This can cause a black screen if (for whatever reason) the bios
hasn't set this bit itself.

This regression has been introduced in

commit 7cf4160148136deb31ee5f2802857dd935a38529
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Tue Jun 5 10:07:09 2012 +0200

    drm/i915: clear up backlight #define confusion on gen4+

Tested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Add comments to explain the BSD tail write workaround
Chris Wilson [Thu, 5 Jul 2012 16:14:01 +0000 (17:14 +0100)]
drm/i915: Add comments to explain the BSD tail write workaround

Having had to dive into the bspec to understand what each stage of the
workaround meant, and how that the ring broadcasting IDLE corresponded
with the GT powering down the ring (i.e. rc6) add comments to aide
the next reader.

And since the register "is used to control all aspects of PSMI and power
saving functions" that makes it quite interesting to inspect with
regards to RC6 hangs, so add it to the error-state.

v2: Rediscover the piece of magic, set the RNCID to 0 before waiting for
the ring to wake up.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Disable the BLT on pre-production SNB hardware
Chris Wilson [Thu, 5 Jul 2012 22:49:40 +0000 (23:49 +0100)]
drm/i915: Disable the BLT on pre-production SNB hardware

It never quite worked despite the numerous workarounds, yet I still see
people trying to use this hardware and filing bug reports. As we no
longer even try to implement the workarounds, since 6a233c78878
(drm/i915/ringbuffer: kill snb blt workaround), simply disable the ring.

v2: Add a message to inform the user about the limited capabilities of
their pre-production hardware.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: initialize power wells in modeset_init_hw
Eugeni Dodonov [Fri, 6 Jul 2012 18:42:36 +0000 (15:42 -0300)]
drm/i915: initialize power wells in modeset_init_hw

This initializes power wells within the modeset_init_hw routine.
Testing has shown that this works for both driver load time and for
suspend-resume code paths.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915: Only request PM interrupts for the events we handled
Chris Wilson [Thu, 5 Jul 2012 14:02:17 +0000 (15:02 +0100)]
drm/i915: Only request PM interrupts for the events we handled

There is little point waking up every 10ms to service an interrupt which
we then promptly ignore. So only program the the PMIER to enable
interrupts for those events which we do handle, not all of them!

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Eugeni Dodonov <eugeni.dodonov@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915/context: Add missing IVB context sizes
Ben Widawsky [Wed, 18 Jul 2012 17:10:10 +0000 (10:10 -0700)]
drm/i915/context: Add missing IVB context sizes

There were some fields missed. Daniel pointed this out in review, and I
know I fixed it, but something happened somehow and some time.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/i915/context/: s/CTX/CXT
Ben Widawsky [Wed, 18 Jul 2012 17:10:09 +0000 (10:10 -0700)]
drm/i915/context/: s/CTX/CXT

*sigh* the docs had it spelled wrong, corrected it, and then proceeded
to re-do the original error. The original code preserved this history,
and this patch attempts to keep in sync with the current docs.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 years agodrm/sis: fixup sis_mm ioctl structs
Daniel Vetter [Sun, 24 Jun 2012 17:57:24 +0000 (19:57 +0200)]
drm/sis: fixup sis_mm ioctl structs

Userspace uses long in quite a few places more than the kernel. Which
gives me neat proof that I'm the only guy on this side of the galaxy
who ever tried to run glxgears on a 64bit machine with sis graphics on
linux.

Note that the longs in drm_sis_mem_t aren't aligned properly, so this
won't even work with 32bit userspace on 64bit kernel as-is. Hence the
patch can't break that, either.

Nope, I'm not nuts enough to write the 32bit ioctl compat layer for
this and test it with some wine app. Even though hunting the ebay
dungeons for a sis card actually supported by the mesa drivers casts
some doubts on this ...

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: kill i915/i830 ids from drm_pciids.h
Daniel Vetter [Tue, 25 Oct 2011 23:03:05 +0000 (01:03 +0200)]
drm: kill i915/i830 ids from drm_pciids.h

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: unconditionally clean up dma buffers of closing clients
Daniel Vetter [Tue, 25 Oct 2011 22:31:26 +0000 (00:31 +0200)]
drm: unconditionally clean up dma buffers of closing clients

With the last patch to ditch DMA_QUEUE support, we should be able
to call the dma cleanup uncoditionally, even when the master has
disappeared.

Do so because it just makes more sense.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: kill dma queue support
Daniel Vetter [Tue, 25 Oct 2011 22:54:41 +0000 (00:54 +0200)]
drm: kill dma queue support

Absolutely unused. All the values are only ever initialized and
then used at most in some debug printout functions.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: ditch strange DRIVER_DMA_QUEUE only error bail-out
Daniel Vetter [Tue, 25 Oct 2011 22:53:57 +0000 (00:53 +0200)]
drm: ditch strange DRIVER_DMA_QUEUE only error bail-out

Only one driver (i810) even sets that flag. Now the actual locking
code uncoditionally promotes lock->context to an unsigned int.

Closer inspection of the userspace reveals that the drm lock context
is defined as an unsigned int (at least on linux). I suspect we just
have a strange case of signedness confusion going on.

Tested on my i815, doesn't seem to break anything.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: kill reclaim_buffers callback
Daniel Vetter [Tue, 25 Oct 2011 22:20:57 +0000 (00:20 +0200)]
drm: kill reclaim_buffers callback

All leftover users either haven't set DRIVER_HAVE_DMA, in which
case this will never be called, or use the drm_core implementation.

Call that directly in the only callsite.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/savage: clean up reclaim_buffers
Daniel Vetter [Tue, 25 Oct 2011 22:14:15 +0000 (00:14 +0200)]
drm/savage: clean up reclaim_buffers

The reclaim_buffers function of the savage driver actually wants to run
with the hw_lock held - at least there are printks in the call-chain
to that effect. But the drm core only calls reclaim_buffers as used
by savage _after_ forcefully dropping the hwlock (in case it's still
hold by the closing fd).

So do the same idlelock dance as for the other dma drivers and hope
that papers over any issues.

v2: Don't let the idlelock linger around.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Tested-by: Tormod Volden <debian.tormod@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: kill reclaim_buffers_locked
Daniel Vetter [Tue, 25 Oct 2011 21:57:28 +0000 (23:57 +0200)]
drm: kill reclaim_buffers_locked

i810 was the last user of this code, with that gone, kill it.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agoRevert "Revert "drm/i810: cleanup reclaim_buffers""
Daniel Vetter [Mon, 11 Jun 2012 19:50:23 +0000 (21:50 +0200)]
Revert "Revert "drm/i810: cleanup reclaim_buffers""

This reverts commit 6e877b576ddf7cde5db2e9a6dcb56fef0ea77e64,
reinstating the original commit:

commit 87499ffdcb1c70f66988cd8febc4ead0ba2f9118
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Tue Oct 25 23:51:24 2011 +0200

    drm/i810: cleanup reclaim_buffers

    My dear old i815 always hits the deadlocked on reclaim_buffers
    warning. Switch over to the idlelock duct-tape on hope that
    works better. I've fired up my i815 and now closing glxgears doesn't
    take 5 seconds anymore. \o/

The original problem with that was that I've moved it ahead in the
series so that it could be included despite some patches not being
ready quite yet. The little problem is that this patch required some
of the previous rework to work correctly.

Now that everything is in the right order again, this actually works
on my i810 and does speed up closing gl apps as the original commit
claimed. Without hanging the machine, as the revert says.

Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: kill reclaim_buffers_idlelocked functions
Daniel Vetter [Tue, 25 Oct 2011 21:42:29 +0000 (23:42 +0200)]
drm: kill reclaim_buffers_idlelocked functions

The only two users are now folded into the drivers preclose functions,
so this is unused.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/sis: clean up reclaim_buffers
Daniel Vetter [Tue, 25 Oct 2011 21:42:59 +0000 (23:42 +0200)]
drm/sis: clean up reclaim_buffers

Like for via.

v2: Actually drop the idlelock again if taken.

v3: Fixup.

v4: Fixup the "has master" vs. "is master" confusion the refactor
introduced.

v5: Drop the idlelock in the early return path.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/via: clean up reclaim_buffers
Daniel Vetter [Tue, 25 Oct 2011 21:37:09 +0000 (23:37 +0200)]
drm/via: clean up reclaim_buffers

A few things
- kill reclaim_buffers, it's never ever called because via does not set
  DRIVER_HAVE_DMA
- inline the idlelock dance into the buffer reclaim logic and make it
  a simple preclose cleanup function
- directly call the the dma_quiescent function and kill the needless
  if check.

v2: Actually drop the idlelock when we take it. Reported by James
Simmons.

v3: Rebased onto latest drm-next.

v4: Fixup the refactor.

v5: More fixup the refactor - I've accidentally changed the check for
any master to checking whether the closing fd is the master.

v6: Don't forget to drop the idlelock in the early return path, too.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/udl: port over blanking code from udlfb.
Dave Airlie [Tue, 26 Jun 2012 13:53:07 +0000 (14:53 +0100)]
drm/udl: port over blanking code from udlfb.

This ports over the dpms code from udlfb, and should mean
a better chance of turning on some udl devices.

Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon/kms: auto detect pcie link speed from root port
Dave Airlie [Wed, 27 Jun 2012 07:35:54 +0000 (08:35 +0100)]
drm/radeon/kms: auto detect pcie link speed from root port

This check the root ports supported link speeds and enables
GEN2 mode if the 5.0 GT link speed is available.

The first 3.0 cards are SI so they will probably need more investigation.

Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/pci: add support for getting the supported link bw.
Dave Airlie [Wed, 27 Jun 2012 07:35:53 +0000 (08:35 +0100)]
drm/pci: add support for getting the supported link bw.

This should work for PCIE3.0 as well.

Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agopci_regs: define LNKSTA2 pcie cap + bits.
Dave Airlie [Wed, 27 Jun 2012 07:35:52 +0000 (08:35 +0100)]
pci_regs: define LNKSTA2 pcie cap + bits.

We need these for detecting the max link speed for drm drivers.

Acked-by: Bjorn Helgaas <bhelgass@google.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: improve GPU lockup debugging info on r6xx/r7xx/r8xx/r9xx
Jerome Glisse [Wed, 27 Jun 2012 16:25:01 +0000 (12:25 -0400)]
drm/radeon: improve GPU lockup debugging info on r6xx/r7xx/r8xx/r9xx

Print various CP register that have valuable informations regarding
GPU lockup.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/mgag200: fix null pointer dereference
Devendra Naga [Sat, 7 Jul 2012 09:22:15 +0000 (09:22 +0000)]
drm/mgag200: fix null pointer dereference

we are referencing the pointer after doing alloc_apertures,
as alloc_apertures kzallocs, the kzalloc may fail and we get a NULL.

so we need to check for NULL before we dereference this pointer

Signed-off-by: Devendra Naga <devendra.aaru@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/radeon: Try harder to avoid HW cursor ending on a multiple of 128 columns.
Michel Dänzer [Tue, 17 Jul 2012 17:02:09 +0000 (19:02 +0200)]
drm/radeon: Try harder to avoid HW cursor ending on a multiple of 128 columns.

This could previously fail if either of the enabled displays was using a
horizontal resolution that is a multiple of 128, and only the leftmost column
of the cursor was (supposed to be) visible at the right edge of that display.

The solution is to move the cursor one pixel to the left in that case.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=33183

Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: Make the .mode_fixup() operations mode argument a const pointer
Laurent Pinchart [Tue, 17 Jul 2012 15:56:50 +0000 (17:56 +0200)]
drm: Make the .mode_fixup() operations mode argument a const pointer

The passed mode must not be modified by the operation, make it const.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm: remove the list_head from drm_mode_set
Daniel Vetter [Wed, 11 Jul 2012 14:28:08 +0000 (16:28 +0200)]
drm: remove the list_head from drm_mode_set

It's unused. At it confused me quite a bit until I've discovered that.

Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/fb helper: don't call drm_crtc_helper_set_config
Daniel Vetter [Wed, 11 Jul 2012 14:28:07 +0000 (16:28 +0200)]
drm/fb helper: don't call drm_crtc_helper_set_config

Go through the interface vtable instead, because not everyone might be
using the crtc helper code.

Cc: dri-devel@lists.freedesktop.org
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agodrm/fb-helper: delay hotplug handling when partially bound
Daniel Vetter [Fri, 15 Jun 2012 09:01:22 +0000 (11:01 +0200)]
drm/fb-helper: delay hotplug handling when partially bound

Ok, this requires quite a dance to actually hit:
1) We plug in a 2nd screen, enable it in both X and (by vt-switching)
in the fbcon.
2) We disable that screen again in with xrandr.
3) We vt-switch again, so that fbcon displays on the 2nd screen, but X
on the first screen. This obviously needs a driver that doesn't switch
off unused functions when regaining the VT.
3) When X controls the vt, we unplug that screen.

Now drm_fb_helper_hotplug_event we noticed that that some crtcs are
bound, but because we still have the fbcon on the 2nd screeen we also
have bound set. Which means the fbcon wrongly assumes it's in control
of everything an happily disables the output on the 2nd screen, but
enables its fb on the first screen.

Work around this issue by counting how many crtcs are bound and how
many are bound to fbcon and assuming that when fbcon isn't bound to
all of them, it better not touch the output configuration.

Conceptually this is the same as only restoring the fbcon output
configuration on the driver's ->lastclose, when we're sure that no one
else is using kms. So this should be consistent with existing kms
drivers.

Chris has created a separate patch for the intel ddx, but I think we
should fix this issue here regardless - the fbcon messing with the
output config while it's not fully in control simply isn't a too
polite behaviour.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50772
Tested-by: Maxim A. Nikulin <M.A.Nikulin@gmail.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agoMerge branch 'next' of git://people.freedesktop.org/~deathsimple/linux into drm-next
Dave Airlie [Fri, 20 Jul 2012 01:20:54 +0000 (21:20 -0400)]
Merge branch 'next' of git://people.freedesktop.org/~deathsimple/linux into drm-next

This contains all the radeon documentation rebased on top of the ib fixes.

* 'next' of git://people.freedesktop.org/~deathsimple/linux:
  drm/radeon: fix SS setup for DCPLL
  drm/radeon: fix up pll selection on DCE5/6
  drm/radeon: start to document evergreen.c
  drm/radeon: start to document the functions r100.c
  drm/radeon: document VM functions in radeon_gart.c (v3)
  drm/radeon: document non-VM functions in radeon_gart.c (v2)
  drm/radeon: document radeon_ring.c (v4)
  drm/radeon: document radeon_fence.c (v2)
  drm/radeon: document radeon_asic.c
  drm/radeon: document radeon_irq_kms.c
  drm/radeon: document radeon_kms.c
  drm/radeon: document radeon_device.c (v2)
  drm/radeon: add rptr save support for r1xx-r5xx
  drm/radeon: update rptr saving logic for memory buffers
  drm/radeon: remove radeon_ring_index()
  drm/radeon: update ib_execute for SI (v2)
  drm/radeon: fix const IB handling v2
  drm/radeon: let sa manager block for fences to wait for v2
  drm/radeon: return an error if there is nothing to wait for

12 years agodrm/radeon: fix SS setup for DCPLL
Alex Deucher [Tue, 17 Jul 2012 18:02:44 +0000 (14:02 -0400)]
drm/radeon: fix SS setup for DCPLL

Need to actually set the SS parameters rather than just 0.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: fix up pll selection on DCE5/6
Alex Deucher [Tue, 17 Jul 2012 18:02:43 +0000 (14:02 -0400)]
drm/radeon: fix up pll selection on DCE5/6

Selecting ATOM_PPLL_INVALID should be equivalent as the
DCPLL or PPLL0 are already programmed for the DISPCLK, but
the preferred method is to always specify the PLL selected.
SetPixelClock will check the parameters and skip the
programming if the PLL is already set up.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: start to document evergreen.c
Alex Deucher [Tue, 17 Jul 2012 18:02:42 +0000 (14:02 -0400)]
drm/radeon: start to document evergreen.c

Still a lot to do.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: start to document the functions r100.c
Alex Deucher [Tue, 17 Jul 2012 18:02:41 +0000 (14:02 -0400)]
drm/radeon: start to document the functions r100.c

Still a lot more to do.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: document VM functions in radeon_gart.c (v3)
Alex Deucher [Tue, 17 Jul 2012 18:02:40 +0000 (14:02 -0400)]
drm/radeon: document VM functions in radeon_gart.c (v3)

Document the VM functions in radeon_gart.c

v2: adjust per Christian's suggestions
v3: adjust to Christians's latest changes

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: document non-VM functions in radeon_gart.c (v2)
Alex Deucher [Tue, 17 Jul 2012 18:02:39 +0000 (14:02 -0400)]
drm/radeon: document non-VM functions in radeon_gart.c (v2)

Document the non-VM functions in radeon_gart.c

v2: adjust per Christian's suggestions

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: document radeon_ring.c (v4)
Alex Deucher [Tue, 17 Jul 2012 18:02:38 +0000 (14:02 -0400)]
drm/radeon: document radeon_ring.c (v4)

Adds documentation to most of the functions in
radeon_ring.c

v2: adjust per Christian's suggestions
v3: adjust per Christian's latest patches
v4: adjust per my latest changes

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: document radeon_fence.c (v2)
Alex Deucher [Tue, 17 Jul 2012 18:02:37 +0000 (14:02 -0400)]
drm/radeon: document radeon_fence.c (v2)

Adds documentation to most of the functions in
radeon_fence.c

v2: address Christian's comments:
- split common concept description into it's own comment
- fix description of intr parameter
- Improve description of -EDEADLK error

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: document radeon_asic.c
Alex Deucher [Tue, 17 Jul 2012 18:02:36 +0000 (14:02 -0400)]
drm/radeon: document radeon_asic.c

Adds documentation to most of the functions in
radeon_asic.c

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: document radeon_irq_kms.c
Alex Deucher [Tue, 17 Jul 2012 18:02:35 +0000 (14:02 -0400)]
drm/radeon: document radeon_irq_kms.c

Adds documentation to most of the functions in
radeon_irq_kms.c

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: document radeon_kms.c
Alex Deucher [Tue, 17 Jul 2012 18:02:34 +0000 (14:02 -0400)]
drm/radeon: document radeon_kms.c

Adds documentation to most of the functions in
radeon_kms.c

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: document radeon_device.c (v2)
Alex Deucher [Tue, 17 Jul 2012 18:02:33 +0000 (14:02 -0400)]
drm/radeon: document radeon_device.c (v2)

Adds documentation to most of the functions in
radeon_device.c

v2: split out general descriptions as per Christian's
comments.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: add rptr save support for r1xx-r5xx
Alex Deucher [Tue, 17 Jul 2012 18:02:32 +0000 (14:02 -0400)]
drm/radeon: add rptr save support for r1xx-r5xx

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: update rptr saving logic for memory buffers
Alex Deucher [Tue, 17 Jul 2012 18:02:31 +0000 (14:02 -0400)]
drm/radeon: update rptr saving logic for memory buffers

Add support for using memory buffers rather than
scratch registers.  Some rings may not be able to
write to scratch registers.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: remove radeon_ring_index()
Alex Deucher [Tue, 17 Jul 2012 18:02:30 +0000 (14:02 -0400)]
drm/radeon: remove radeon_ring_index()

Just store the index in the ring structure.
Idea taken from one of Jerome's wip rptr patches.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: update ib_execute for SI (v2)
Alex Deucher [Tue, 17 Jul 2012 18:02:29 +0000 (14:02 -0400)]
drm/radeon: update ib_execute for SI (v2)

When submitting a CONST_IB, emit a SWITCH_BUFFER
packet before the CONST_IB.  This isn't strictly necessary
(the driver will work fine without it), but is good practice
and allows for more flexible DE/CE sychronization options
in the future.  Current userspace drivers do not take
advantage of the CE yet.

v2: - clean up code flow a bit
    - no need to flush caches for CONST IB

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
12 years agodrm/radeon: fix const IB handling v2
Christian König [Fri, 13 Jul 2012 11:06:00 +0000 (13:06 +0200)]
drm/radeon: fix const IB handling v2

Const IBs are executed on the CE not the CP, so we can't
fence them in the normal way.

So submit them directly before the IB instead, just as
the documentation says.

v2: keep the extra documentation

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: let sa manager block for fences to wait for v2
Christian König [Wed, 11 Jul 2012 19:07:57 +0000 (21:07 +0200)]
drm/radeon: let sa manager block for fences to wait for v2

Otherwise we can encounter out of memory situations under extreme load.

v2: add documentation for the new function

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: return an error if there is nothing to wait for
Christian König [Wed, 11 Jul 2012 15:12:11 +0000 (17:12 +0200)]
drm/radeon: return an error if there is nothing to wait for

Otherwise the sa managers out of memory
handling doesn't work.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm: Disallow DRM_IOCTL_MODESET_CTL for KMS drivers
Laurent Pinchart [Tue, 29 May 2012 22:58:09 +0000 (00:58 +0200)]
drm: Disallow DRM_IOCTL_MODESET_CTL for KMS drivers

DRM_IOCTL_MODESET_CTL must only be used for UMS drivers. Make it a no-op
for KMS drivers.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Michel Dänzer <michel@daenzer.net>
Signed-off-by: Dave Airlie <airlied@gmail.com>
12 years agoMerge branch 'next' of git://people.freedesktop.org/~deathsimple/linux into drm-next
Dave Airlie [Tue, 17 Jul 2012 09:46:49 +0000 (19:46 +1000)]
Merge branch 'next' of git://people.freedesktop.org/~deathsimple/linux into drm-next

This merges Christian work that has been hanging around on the list.

12 years agodrm/radeon: implement ring saving on reset v4
Christian König [Mon, 9 Jul 2012 09:52:44 +0000 (11:52 +0200)]
drm/radeon: implement ring saving on reset v4

Try to save whatever is on the rings when
we encounter an lockup.

v2: Fix spelling error. Free saved ring data if reset fails.
    Add documentation for the new functions.
v3: Some more spelling fixes
v4: It doesn't make sense to save anything if all fences
    are signaled

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: record what is next valid wptr for each ring v4
Christian König [Fri, 6 Jul 2012 14:22:55 +0000 (16:22 +0200)]
drm/radeon: record what is next valid wptr for each ring v4

Before emitting any indirect buffer, emit the offset of the next
valid ring content if any. This allow code that want to resume
ring to resume ring right after ib that caused GPU lockup.

v2: use scratch registers instead of storing it into memory
v3: skip over the surface sync for ni and si as well
v4: use SET_CONFIG_REG instead of PACKET0

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: move radeon_ib_ring_tests out of chipset code
Christian König [Sat, 7 Jul 2012 10:47:58 +0000 (12:47 +0200)]
drm/radeon: move radeon_ib_ring_tests out of chipset code

Making it easier to control when it is executed.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: remove vm_manager start/suspend
Christian König [Thu, 5 Jul 2012 12:32:00 +0000 (14:32 +0200)]
drm/radeon: remove vm_manager start/suspend

Just restore the page table instead. Addressing three
problem with this change:

1. Calling vm_manager_suspend in the suspend path is
   problematic cause it wants to wait for the VM use
   to end, which in case of a lockup never happens.

2. In case of a locked up memory controller
   unbinding the VM seems to make it even more
   unstable, creating an unrecoverable lockup
   in the end.

3. If we want to backup/restore the leftover ring
   content we must not unbind VMs in between.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: remove r600_blit_suspend
Christian König [Thu, 5 Jul 2012 14:05:28 +0000 (16:05 +0200)]
drm/radeon: remove r600_blit_suspend

Just reinitialize the shader content on resume instead.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: remove ip_pool start/suspend
Christian König [Thu, 5 Jul 2012 09:55:34 +0000 (11:55 +0200)]
drm/radeon: remove ip_pool start/suspend

The IB pool is in gart memory, so it is completely
superfluous to unpin / repin it on suspend / resume.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: make cp init on cayman more robust
Christian König [Wed, 4 Jul 2012 19:36:53 +0000 (21:36 +0200)]
drm/radeon: make cp init on cayman more robust

It's not critical, but the current code isn't
100% correct.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: remove FIXME comment from chipset suspend
Christian König [Thu, 5 Jul 2012 11:33:41 +0000 (13:33 +0200)]
drm/radeon: remove FIXME comment from chipset suspend

For a normal suspend/resume we allready wait for
the rings to be empty, and for a suspend/reasume
in case of a lockup we REALLY don't want to wait
for anything.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: fix fence init after resume
Christian König [Sat, 7 Jul 2012 11:10:39 +0000 (13:10 +0200)]
drm/radeon: fix fence init after resume

Start with last signaled fence number instead
of last emitted one.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
12 years agodrm/radeon: fix fence value access
Christian König [Mon, 9 Jul 2012 08:52:39 +0000 (10:52 +0200)]
drm/radeon: fix fence value access

It is possible that radeon_fence_process is called
after writeback is disabled for suspend, leading
to an invalid read of register 0x0.

This fixes a problem for me where the fence value
is temporary incremented by 0x100000000 on
suspend/resume.

Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>