From: Rodrigo Vivi Date: Fri, 9 Jun 2017 22:26:14 +0000 (-0700) Subject: drm/i915/cnl: LSPCON support is gen9+ X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=ff15947e0f02ceccfffa8f342472765404d161b6;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git drm/i915/cnl: LSPCON support is gen9+ There is no platform specific change needed for LSPCON support on Cannonlake. So let's make it gen9+. Cc: Shashank Sharma Signed-off-by: Rodrigo Vivi Reviewed-by: Shashank Sharma Link: http://patchwork.freedesktop.org/patch/msgid/1497047175-27250-17-git-send-email-rodrigo.vivi@intel.com --- diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index dd22f3d0d9d6..c3ea485cb82a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3002,7 +3002,7 @@ intel_info(const struct drm_i915_private *dev_priv) #define HAS_GMCH_DISPLAY(dev_priv) ((dev_priv)->info.has_gmch_display) -#define HAS_LSPCON(dev_priv) (IS_GEN9(dev_priv)) +#define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9) /* DPF == dynamic parity feature */ #define HAS_L3_DPF(dev_priv) ((dev_priv)->info.has_l3_dpf)